10. Radio Data System (RDS)

Introduction

Entertainment and education are the principal objectives of most television and radio broadcasting organizations. Various proposals have been made for broadcast stations to carry additional material to provide further usage of both the channel space and the transmission equipment. In the case of television signals, spare time exists in the FBI between each video field allowing data signals, such as teletext, to be added without causing any interference to the normal video or sound signals.

Analogue radio broadcasting signals do not have such a spare time slot and therefore any additional services require a sub-carrier located well above or below the audio signals. Data with very limited information rate can be transmitted as phase modulation of the carrier frequency. Such a system, called ‘Teleswitching’, is used in the UK, on the BBC longwave transmitter, for switching certain electrical power circuits a few times each day.

The modulation bandwidth of frequency modulated (FM) transmitters is typically about 90 kHz but the required bandwidth for stereo sound signals is some 53 kHz. Space is therefore available for information channels using sub-carriers well above 53 kHz. However, considerations of potential co-channel and adjacent channel interference limit the additional signals that can be accommodated. This is especially so in Europe where a very large number of FM stations operate in close proximity to each other.

For some years an information service concerning motoring conditions has been used in Germany. This operates with a suppressed carrier on a frequency of 57 kHz (three times the stereo tone pilot frequency). The service is called Autofahrer Rundfunk Information (ARI) and it is exclusively used for communicating motoring information for reception on car radio receivers which incorporate the necessary special decoder.

Over the period from about 1974 to 1982 a programme of work coordinated by the European Broadcasting Union (EBU) was undertaken by several broadcasting organizations. The objectives were to establish a data transmission system which would meet the stringent requirements placed upon it by the need for compatabil-ity and ruggedness when such a signal is carried on a sub-carrier alongside high quality stereo VHF-FM broadcasts. The labora-tory work was backed up by over-the-air field tests conducted outside of programme hours, using a wide range of receivers. Once confidence had been gained in its compatability, the experimental system was put on-air from a number of transmitters in various European countries. These experimental transmissions, spanning several years, gave further confidence that the system had adequate compatability with the widest range of receivers and receiving conditions.

The final system having been designed, tested and agreed by the working group and formally endorsed by the EBU, Tech. Specification 3244-E was published by the EBU [25]. The system is known as the Radio Data System (RDS) and conforms with CCIR Recommendation 450/1. The EBU have now published Technical Document 3260, Guidelines for the Implementation of the RDS system [26]. Much of the development work undertaken during the development of the system is described; in addition, recommenda-tions for practical implementation are provided.

The data sub-carrier

The frequency chosen for the data sub-carrier is 57 kHz, three times the frequency of the stereo pilot tone and synchronized in quadrature to its third harmonic during stereo broadcasts. During monophonic broadcasts the data sub-carrier is unsynchronized but retains the same close tolerance on its frequency as for stereo, that is +/-6Hz. This fixed relationship to the pilot tone makes an important contribution to compatibility, minimizing the audibility of any beats generated under multipath conditions, or in receivers that are not properly aligned. The sub-carrier is modulated by shaped biphase-coded symbols, representing the binary data stream. The modulation system used is two-phase phase-shift keying, with a phase deviation of 90 degrees. This system gives rise to a null at the sub-carrier frequency itself, with all the energy concentrated around a pair of side-bands separated from the centre frequency by the data rate. It is this spectrum-shaping which ensures compatibility with the German ARI system, which uses tones around 57 kHz. Figure 10.1 shows the baseband spectrum of the composite audio and RDS signal, and Figure 10.2 shows detail of the spectrum.

Figure 10.1 Stereo-sound MPX signal spectrum showing location of the RDS signal

Figure 10.2 Spectrum of biphase coded radio data pulses

The amplitude of the data signal is also an important parameter. The larger the amplitude of the data signal the easier the reception; but, on the other hand, a larger data signal is liable to produce cross-talk or interference with the audio channel, particularly under non-ideal reception conditions. As a result of laboratory tests and on-air field trials, the data level is broadcast at 3% of the peak audio signal.

The data signal

The data rate of the signal used to modulate the sub-carrier is 1187.5 bits per second. This rate is derived from the sub-carrier frequency by division by 48. The phase locking of all the signals in this way leads to a simplification in the design of decoders. The data rate itself is constrained by considerations of compatibility and ruggedness, but the figure adopted gives adequate capacity for the various planned applications as well as allowing scope for future developments. The data is in two categories, fixed data that provides details of the particular transmitter frequency and station identity and possibly the frequencies of adjacent transmitters and variable data for different applications or services.

The RDS coder is normally situated at the transmitter and the variable data signals are fed to it over a telecom link. The fixed data is normally held in EPROM in the coder. A functional diagram of an RDS coder is shown in Figure 10.3. The various data entry ports for different services are connected to the system processor, which has its operating software held in EPROM.

Figure 10.3 RDS coder

The data from these external inputs is checked for errors in the usual way, and entered into the RAM memory. The processor selects the relevant data from the memories, calculates the CRC check word for transmission, where required, and the ‘assembler’ arranges the data into the specified format of data blocks for transmission. This data format is specified so that any RDS decoder can decode the data into a data block for processing according to the required application. In this respect the radio data system acts as a one-way modem. Update information can also be used to control the frequency and order in which the various fixed data groups are generated, and a simple command can be sent to the processor to initiate the actual transmission at the required time.

Referring again to Figure 10.3, the composite stereo sound multiplexed signal is applied to the MPX processor, which performs two functions. Firstly, it selects the 19 kHz pilot tone and locks the phase of the 57 kHz RDS carrier to it. This carrier signal is applied to the RDS modulator. The modulated RDS signal is applied to the MPX processor where it is added to the stereo-sound MPX signal at the appropriate level. The output from this unit drives the transmitter. Bi-phase coding is used for the data: a transition from positive to negative indicates a 1 and negative to positive a 0. The time-function for such data pulses is shown in Figure 10.4.

Figure 10.4 Time-function of a single biphase symbol

The general principle of RDS data coding is illustrated in Figure 10.5. The RDS carrier frequency of 57 kHz is first divided by 24 to produce a signal at 2375 Hz, and then divided by two to produce the data clock at 1187.5 Hz.

Figure 10.5 Principle of RDS data coding

When the data signal is demodulated in a receiver it may be inverted (unlike television, where the polarity is determined by the video signal), and differential coding is used so that the data is correct irrespective of polarity. The data is coded according to the expression:

Input (t) + input (t - td) = Output (t)

0 + 0 =0
1 + 0 =1
0 + 1 =1
1 + 1 =0
where td = 1 bit period.

When the input is 0 the output remains unchanged from the previous output, but when an input 1 occurs, the new output bit is the complement of the previous bit.

Differentially coded data (waveform 2, Figure 10.5), is produced by feeding the input data to an exclusive OR gate, the other input being the input data delayed by one bit period. The NRZ symbol generator produces positive pulses for each bit period when the input is high and negative pulses when input is low (waveform 3). The bi-phase symbol generator produces a negative going pulse td/2 after each positive pulse and a positive pulse after every negative pulse (waveform 4). After passing through the shaping filter, which has a bandwidth of approximately 5 kHz, centred on 57 kHz, the RDS modulation (waveform 5) is obtained. This signal is then added to the multiplexed stereo signal at an amplitude which is approximately 3% of that due to the sound signals. Commercial RDS coders usually use a digital filter to obtain optimum pulse shape.

The functional diagram of a coder based on a BBC design is shown in Figure 10.6. The master clock oscillator frequency is 3.648 MHz and is phase-locked to the third harmonic of the 19 kHz pilot tone. It is divided by four to generate a 912 kHz clock for digital generation of the data signal. This clock is further divided by 16 to produce the 57 kHz carrier, by 48 to produce a clock at 3.562 kHz, and by three to produce the bit rate clock at 1187.5 Hz.

Figure 10.6 RDS coder with digital filter

The input data is clocked and differentially coded to feed a 5-bit shift register. The shift register makes available, relative to a ‘middle’ bit, the two preceding bits and the next two bits to be transmitted. These are needed to generate the intersymbol components of the data waveform. These five bits are fed to an EPROM containing a ‘look-up’ table corresponding to the RDS data shape. This data is clocked out using an address generated from the internal clock locked to a multiple of the RDS data rate. The modulation process to form the final suppressed carrier signal is achieved by inverting the five data bits fed to the EPROM once every half cycle of 57 kHz. This changes the output of the EPROM from a simple RDS wave shape to a suppressed carrier double side-band signal, based on 57 kHz. The output is passed through a latch, to remove ‘glitches’, and then fed to a digital-to-analogue converter. The data waveform has now become the envelope of a 57 kHz suppressed carrier signal but is rich in harmonics. It is further shaped by imposing a half sine-wave shape on each half cycle. An eight-input analogue multiplexer selects the correct attenuation for the rectangular data signal eight times every half cycle of the 57 kHz signal. This signal is then buffered and band filtered to produce the RDS output signal.

Decoding the RDS signal

The input signal for the decoder is taken from the demodulator prior to any de-emphasis filtering and is band-filtered to separate the 57 kHz RDS signal. This signal is synchronously demodulated using a locally generated 57 kHz sub-carrier. A 2.4  kHz low pass filter is then used to separate the RDS modulation.

The principle of decoding RDS data is illustrated in Figure 10.7. The reference clock is regenerated from the data signal, or can be obtained by division of the 57 kHz carrier used to drive the synchronous demodulator. The phase of the reference clock is important as the transitions must coincide with the cross-over points of the RDS data waveform as illustrated in waveforms 1 and 2. (In the coder the clock is in phase with the peaks of the modulation.)

A switching circuit, driven by the regenerated clock, is used to invert every half cycle of the RDS waveform that corresponds to the positive clock period, as illustrated, waveform 3. A logic ‘1’ symbol at the input corresponds to two positive half cycles at the output of the inverter (see Figure 10.4). The differentially coded data could be obtained from this waveform directly but the signal-to-noise ratio is significantly improved by using an integration circuit. The integrating circuit is switched by the regenerated clock so that after each complete clock cycle the output is returned to zero and the potential at the end of the integration cycle is stored. The actual potential reached at the end of each integration cycle will vary and therefore a slicing circuit is used to produce constant amplitude pulses as illustrated by waveform 5. A flip-flop circuit which changes state only when the pulses change polarity is used to produce the differentially coded data (waveform 6).

The regenerated clock could be 180 degrees out-of-phase which would produce an inverted data signal at this point (waveform 6). The output data is produced by the differential decoding circuit, as shown in Figure 10.7, the output data being independent of the clock polarity.

Figure 10.7 Principle of decoding RDS data

Decoding is according to the expression:

Input (t) + input (t - td) = Output (t)
(0)
0 + 0 =0
1 + 0 =1
1 + 1 =0
0 + 1 =1
or if inverted
(1)
1 + 1 =0
0 + 1 =1
0 + 0 =0
1 + 0 =1
where td = 1 bit period.

The decoded data and clock signals are fed to the data processing circuits in the receiver, or via a suitable drive circuit to an external PC.

Commercial receivers use hybrid decoding circuits which contain the 57 kHz band-pass filter, synchronous demodulator, bi-phase symbol generator and differential decoder as a single element. The multiplex signal derived from the demodulator is normally applied directly to the hybrid circuit and the raw data and clock are generated at logic levels, so they can be applied directly to a suitable processor circuit. The only external components required are the crystal, typically 4.332MHz, for the phase-locked loop. This frequency is 76 times that of the RDS sub-carrier.

A decoder often forms part of an RDS coder at the transmitter. The transmitted data can then be checked automatically by comparison with data in the assembler. If an error is detected it can cause the data to be retransmitted or raise an alarm. It also allows RDS data received from a neighbouring transmitter to be decoded and used as an update source for the RDS coder.

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