#Build: Synplify Pro L-2016.09L+ice40, Build 077R, Dec  2 2016
#install: /home/shaos/iCEcube2/synpbase
#OS: Linux 
#Hostname: shaos

# Wed Dec 12 21:48:09 2018

#Implementation: retro1t_Implmnt

Synopsys HDL Compiler, version comp2016q3p1, Build 141R, built Dec  5 2016
@N: :  | Running in 64-bit mode 
Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.

Synopsys Verilog Compiler, version comp2016q3p1, Build 141R, built Dec  5 2016
@N: :  | Running in 64-bit mode 
Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.

Running on host :shaos
@I::"/home/shaos/iCEcube2/synpbase/lib/generic/sb_ice40.v" (library work)
@I::"/home/shaos/iCEcube2/synpbase/lib/vlog/hypermods.v" (library __hyper__lib__)
@I::"/home/shaos/iCEcube2/synpbase/lib/vlog/umr_capim.v" (library snps_haps)
@I::"/home/shaos/iCEcube2/synpbase/lib/vlog/scemi_objects.v" (library snps_haps)
@I::"/home/shaos/iCEcube2/synpbase/lib/vlog/scemi_pipes.svh" (library snps_haps)
@I::"/home/shaos/iCEcube2/examples/retro1t/retro.v" (library work)
@I::"/home/shaos/iCEcube2/examples/retro1t/rom.v" (library work)
@I::"/home/shaos/iCEcube2/examples/retro1t/top.v" (library work)
Verilog syntax check successful!
File /home/shaos/iCEcube2/examples/retro1t/rom.v changed - recompiling
File /home/shaos/iCEcube2/examples/retro1t/top.v changed - recompiling
Selecting top level module top
@N:CG364 : sb_ice40.v(4020) | Synthesizing module SB_HFOSC in library work.

@N:CG364 : retro.v(21) | Synthesizing module retro in library work.

@N:CG179 : retro.v(247) | Removing redundant assignment.
@N:CG179 : retro.v(272) | Removing redundant assignment.
@W:CG532 : retro.v(664) | Within an initial block, only Verilog force statements and memory $readmemh/$readmemb initialization statements are recognized, and all other content is ignored.
@W:CL169 : retro.v(55) | Pruning unused register errop. Make sure that there are no unused intermediate registers.
@W:CL271 : retro.v(55) | Pruning unused bits 31 to 24 of inst[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.
@N:CL134 : retro.v(55) | Found RAM regs, depth=32, width=32
@N:CL134 : retro.v(55) | Found RAM regs, depth=32, width=32
@N:CG364 : rom.v(1) | Synthesizing module rom in library work.

@N:CG364 : sb_ice40.v(4120) | Synthesizing module SB_RGBA_DRV in library work.

@N:CG364 : top.v(1) | Synthesizing module top in library work.

@N:CL201 : retro.v(55) | Trying to extract state machine for register op.

At c_ver Exit (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 94MB peak: 108MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Wed Dec 12 21:48:11 2018

###########################################################]
Synopsys Netlist Linker, version comp2016q3p1, Build 141R, built Dec  5 2016
@N: :  | Running in 64-bit mode 
@N:NF107 : top.v(1) | Selected library: work cell: top view verilog as top level
@N:NF107 : top.v(1) | Selected library: work cell: top view verilog as top level

At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 68MB peak: 69MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Wed Dec 12 21:48:11 2018

###########################################################]
@END

At c_hdl Exit (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 3MB peak: 4MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Wed Dec 12 21:48:11 2018

###########################################################]
Synopsys Netlist Linker, version comp2016q3p1, Build 141R, built Dec  5 2016
@N: :  | Running in 64-bit mode 
File /home/shaos/iCEcube2/examples/retro1t/retro1t_Implmnt/synwork/retro1t_comp.srs changed - recompiling
@N:NF107 : top.v(1) | Selected library: work cell: top view verilog as top level
@N:NF107 : top.v(1) | Selected library: work cell: top view verilog as top level

At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 68MB peak: 69MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime

Process completed successfully.
# Wed Dec 12 21:48:12 2018

###########################################################]
Pre-mapping Report

# Wed Dec 12 21:48:12 2018

Synopsys Lattice Technology Pre-mapping, Version maplat, Build 1612R, Built Dec  5 2016 09:30:53
Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
Product Version L-2016.09L+ice40

Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 98MB peak: 99MB)

@A:MF827 :  | No constraint file specified. 
Linked File: retro1t_scck.rpt
Printing clock  summary report in "/home/shaos/iCEcube2/examples/retro1t/retro1t_Implmnt/retro1t_scck.rpt" file 
@N:MF248 :  | Running in 64-bit mode. 
@N:MF666 :  | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.) 

Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 101MB peak: 103MB)


Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 101MB peak: 103MB)


Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 102MB peak: 103MB)


Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 102MB peak: 104MB)

ICG Latch Removal Summary:
Number of ICG latches removed:	0
Number of ICG latches not removed:	0
syn_allowed_resources : blockrams=30  set on top level netlist top

Finished netlist restructuring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 138MB peak: 139MB)



Clock Summary
*****************

Start                                         Requested     Requested     Clock                                         Clock                     Clock
Clock                                         Frequency     Period        Type                                          Group                     Load 
-------------------------------------------------------------------------------------------------------------------------------------------------------
System                                        1.0 MHz       1000.000      system                                        system_clkgroup           0    
top|frequency_counter_i_derived_clock[23]     178.9 MHz     5.590         derived (from top|int_osc_inferred_clock)     Autoconstr_clkgroup_0     352  
top|int_osc_inferred_clock                    48.0 MHz      20.830        inferred                                      Autoconstr_clkgroup_0     24   
=======================================================================================================================================================

@W:MT529 : top.v(29) | Found inferred clock top|int_osc_inferred_clock which controls 24 sequential elements including frequency_counter_i[23:0]. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance. 

Finished Pre Mapping Phase.
@N:BN225 :  | Writing default property annotation file /home/shaos/iCEcube2/examples/retro1t/retro1t_Implmnt/retro1t.sap. 

Starting constraint checker (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 137MB peak: 139MB)

None
None

Finished constraint checker (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 137MB peak: 139MB)

Pre-mapping successful!

At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 51MB peak: 139MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Wed Dec 12 21:48:13 2018

###########################################################]
Map & Optimize Report

# Wed Dec 12 21:48:13 2018

Synopsys Lattice Technology Mapper, Version maplat, Build 1612R, Built Dec  5 2016 09:30:53
Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
Product Version L-2016.09L+ice40

Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 98MB peak: 99MB)

@N:MF248 :  | Running in 64-bit mode. 
@N:MF666 :  | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.) 

Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 98MB peak: 100MB)


Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 98MB peak: 100MB)


Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 100MB peak: 100MB)


Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 100MB peak: 102MB)



Starting Optimization and Mapping (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 133MB peak: 136MB)


Available hyper_sources - for debug and ip models
	None Found

@N:MT206 :  | Auto Constrain mode is enabled 

Finished RTL optimizations (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 134MB peak: 136MB)

@W:FX107 : retro.v(55) | RAM regs_1[31:0] (in view: work.retro(verilog)) does not have a read/write conflict check. Possible simulation mismatch. To resolve a read/write conflict, either set syn_ramstyle = rw_check, or enable the "Read Write Check on RAM" Implementation Option. For more information, search for "read/write conflict check" in Online Help.
@W:FX107 : retro.v(55) | RAM regs[31:0] (in view: work.retro(verilog)) does not have a read/write conflict check. Possible simulation mismatch. To resolve a read/write conflict, either set syn_ramstyle = rw_check, or enable the "Read Write Check on RAM" Implementation Option. For more information, search for "read/write conflict check" in Online Help.
@N:MO231 : retro.v(55) | Found counter in view:work.retro(verilog) instance extaddr[31:0] 
@N:MO231 : retro.v(649) | Found counter in view:work.retro(verilog) instance pc[31:0] 
@N:MF179 : retro.v(107) | Found 32 by 32 bit equality operator ('==') pc213 (in view: work.retro(verilog))
@N:MF794 :  | RAM regs_1[31:0] required 44 registers during mapping  
@N:MF794 :  | RAM regs[31:0] required 41 registers during mapping  

Starting factoring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 138MB peak: 140MB)


Finished factoring (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 172MB peak: 173MB)


Finished gated-clock and generated-clock conversion (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 161MB peak: 174MB)


Finished generic timing optimizations - Pass 1 (Real Time elapsed 0h:00m:05s; CPU Time elapsed 0h:00m:05s; Memory used current: 153MB peak: 174MB)


Starting Early Timing Optimization (Real Time elapsed 0h:00m:05s; CPU Time elapsed 0h:00m:05s; Memory used current: 154MB peak: 174MB)


Finished Early Timing Optimization (Real Time elapsed 0h:00m:06s; CPU Time elapsed 0h:00m:06s; Memory used current: 154MB peak: 174MB)


Finished generic timing optimizations - Pass 2 (Real Time elapsed 0h:00m:06s; CPU Time elapsed 0h:00m:06s; Memory used current: 153MB peak: 174MB)

@N:MO106 : rom.v(6) | Found ROM .delname. (in view: work.top(verilog)) with 136 words by 8 bits.
@N:MF794 :  | RAM regs_1[31:0] required 44 registers during mapping  
@N:MF794 :  | RAM regs[31:0] required 41 registers during mapping  
@N:MF794 :  | RAM regs_1[31:0] required 44 registers during mapping  
@N:MF794 :  | RAM regs[31:0] required 41 registers during mapping  

Finished preparing to map (Real Time elapsed 0h:00m:06s; CPU Time elapsed 0h:00m:06s; Memory used current: 154MB peak: 174MB)


Finished technology mapping (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 217MB peak: 220MB)

Pass		 CPU time		Worst Slack		Luts / Registers
------------------------------------------------------------
   1		0h:00m:07s		   -15.92ns		2311 /       333
   2		0h:00m:07s		   -14.93ns		2192 /       333
   3		0h:00m:08s		   -13.94ns		2192 /       333
   4		0h:00m:08s		   -12.83ns		2192 /       333
   5		0h:00m:08s		   -12.37ns		2194 /       333
   6		0h:00m:09s		   -12.29ns		2187 /       333
   7		0h:00m:09s		   -12.13ns		2188 /       333
   8		0h:00m:10s		   -12.13ns		2188 /       333
@N:FX271 : retro.v(649) | Replicating instance cpu.pc[0] (in view: work.top(verilog)) with 67 loads 3 times to improve timing.
Timing driven replication report
Added 3 Registers via timing driven replication
Added 3 LUTs via timing driven replication

   9		0h:00m:11s		   -12.13ns		2194 /       336
  10		0h:00m:11s		   -11.79ns		2204 /       336
  11		0h:00m:11s		   -11.79ns		2216 /       336


  12		0h:00m:12s		   -11.71ns		2215 /       336
  13		0h:00m:12s		   -11.71ns		2216 /       336
Re-levelizing using alternate method
Assigned 0 out of 3062 signals to level zero using alternate method
@N:FX1017 :  | SB_GB inserted on the net N_204_1. 
@N:FX1017 :  | SB_GB inserted on the net N_261. 
@N:FX1017 :  | SB_GB inserted on the net N_16. 
@N:FX1017 :  | SB_GB inserted on the net N_63. 
@N:FX1017 :  | SB_GB inserted on the net N_6. 

Finished technology timing optimizations and critical path resynthesis (Real Time elapsed 0h:00m:12s; CPU Time elapsed 0h:00m:12s; Memory used current: 189MB peak: 229MB)


Finished restoring hierarchy (Real Time elapsed 0h:00m:12s; CPU Time elapsed 0h:00m:12s; Memory used current: 190MB peak: 229MB)



@S |Clock Optimization Summary


#### START OF CLOCK OPTIMIZATION REPORT #####[

0 non-gated/non-generated clock tree(s) driving 0 clock pin(s) of sequential element(s)
2 gated/generated clock tree(s) driving 344 clock pin(s) of sequential element(s)
0 instances converted, 344 sequential instances remain driven by gated/generated clocks

======================================================================================================== Gated/Generated Clocks =========================================================================================================
Clock Tree ID     Driving Element             Drive Element Type     Fanout     Sample Instance            Explanation                                                                                                                   
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
ClockId0001        u_SB_HFOSC                  SB_HFOSC               336        frequency_counter_i[0]     Gating structure creates improper gating logic. See the Gated Clocks description in the user guide for conversion requirements
ClockId0002        frequency_counter_i[23]     SB_DFF                 8          cpu.regs_1_regs_1_0_1      No gated clock conversion method for cell cell:sb_ice.SB_RAM256x16                                                            
=========================================================================================================================================================================================================================================


##### END OF CLOCK OPTIMIZATION REPORT ######]


Start Writing Netlists (Real Time elapsed 0h:00m:12s; CPU Time elapsed 0h:00m:12s; Memory used current: 160MB peak: 229MB)

Writing Analyst data base /home/shaos/iCEcube2/examples/retro1t/retro1t_Implmnt/synwork/retro1t_m.srm

Finished Writing Netlist Databases (Real Time elapsed 0h:00m:12s; CPU Time elapsed 0h:00m:12s; Memory used current: 190MB peak: 229MB)

Writing EDIF Netlist and constraint files
@N:BW103 :  | The default time unit for the Synopsys Constraint File (SDC or FDC) is 1ns. 
@N:BW107 :  | Synopsys Constraint File capacitance units using default value of 1pF  
@N:FX1056 :  | Writing EDF file: /home/shaos/iCEcube2/examples/retro1t/retro1t_Implmnt/retro1t.edf 
@W:FX708 :  | Found invalid parameter 0  
@W:FX708 :  | Found invalid parameter 0  
L-2016.09L+ice40

Finished Writing EDIF Netlist and constraint files (Real Time elapsed 0h:00m:13s; CPU Time elapsed 0h:00m:13s; Memory used current: 191MB peak: 229MB)


Start final timing analysis (Real Time elapsed 0h:00m:13s; CPU Time elapsed 0h:00m:13s; Memory used current: 187MB peak: 229MB)

@W:MT246 : top.v(56) | Blackbox SB_RGBA_DRV is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@N:MT615 :  | Found clock top|frequency_counter_i_derived_clock[23] with period 1000.00ns  
@W:MT420 :  | Found inferred clock top|int_osc_inferred_clock with period 20.83ns. Please declare a user-defined clock on object "n:int_osc" 


##### START OF TIMING REPORT #####[
# Timing Report written on Wed Dec 12 21:48:26 2018
#


Top view:               top
Requested Frequency:    1.0 MHz
Wire load mode:         top
Paths requested:        5
Constraint File(s):    
@N:MT320 :  | This timing report is an estimate of place and route data. For final timing results, use the FPGA vendor place and route report. 

@N:MT322 :  | Clock constraints include only register-to-register paths associated with each individual clock. 



Performance Summary
*******************


Worst slack in design: -9.557

                                              Requested     Estimated     Requested     Estimated                Clock                                         Clock                
Starting Clock                                Frequency     Frequency     Period        Period        Slack      Type                                          Group                
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
top|frequency_counter_i_derived_clock[23]     1.0 MHz       0.9 MHz       1000.000      1122.655      -2.555     derived (from top|int_osc_inferred_clock)     Autoconstr_clkgroup_0
top|int_osc_inferred_clock                    48.0 MHz      32.9 MHz      20.830        30.387        -9.557     inferred                                      Autoconstr_clkgroup_0
System                                        1.0 MHz       NA            1000.000      NA            NA         system                                        system_clkgroup      
====================================================================================================================================================================================
@N:MT582 :  | Estimated period and frequency not reported for given clock unless the clock has at least one timing path which is not a false or a max delay path and that does not have excessive slack 


@W:MT116 :  | Paths from clock (top|int_osc_inferred_clock:r) to clock (top|frequency_counter_i_derived_clock[23]:r) are overconstrained because the required time of 20.83 ns is too small.   
@W:MT116 :  | Paths from clock (top|frequency_counter_i_derived_clock[23]:r) to clock (top|int_osc_inferred_clock:r) are overconstrained because the required time of 20.83 ns is too small.   



Clock Relationships
*******************

Clocks                                                                                |    rise  to  rise      |    fall  to  fall   |    rise  to  fall   |    fall  to  rise 
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Starting                                   Ending                                     |  constraint  slack     |  constraint  slack  |  constraint  slack  |  constraint  slack
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
top|int_osc_inferred_clock                 System                                     |  20.830      20.034    |  No paths    -      |  No paths    -      |  No paths    -    
top|int_osc_inferred_clock                 top|int_osc_inferred_clock                 |  20.830      -9.557    |  No paths    -      |  No paths    -      |  No paths    -    
top|int_osc_inferred_clock                 top|frequency_counter_i_derived_clock[23]  |  20.833      -1.021    |  No paths    -      |  No paths    -      |  No paths    -    
top|frequency_counter_i_derived_clock[23]  top|int_osc_inferred_clock                 |  20.833      -2.555    |  No paths    -      |  No paths    -      |  No paths    -    
top|frequency_counter_i_derived_clock[23]  top|frequency_counter_i_derived_clock[23]  |  1000.000    1989.381  |  No paths    -      |  No paths    -      |  No paths    -    
===============================================================================================================================================================================
 Note: 'No paths' indicates there are no paths in the design for that pair of clock edges.
       'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups.



Interface Information 
*********************

No IO constraint found



====================================
Detailed Report for Clock: top|frequency_counter_i_derived_clock[23]
====================================



Starting Points with Worst Slack
********************************

                          Starting                                                                                        Arrival           
Instance                  Reference                                     Type             Pin           Net                Time        Slack 
                          Clock                                                                                                             
--------------------------------------------------------------------------------------------------------------------------------------------
cpu.regs_1_regs_1_0_0     top|frequency_counter_i_derived_clock[23]     SB_RAM256x16     RDATA[2]      regs_1_reto[2]     0.920       -2.555
cpu.regs_regs_0_0         top|frequency_counter_i_derived_clock[23]     SB_RAM256x16     RDATA[0]      regs_reto[0]       0.920       -1.419
cpu.regs_1_regs_1_0_0     top|frequency_counter_i_derived_clock[23]     SB_RAM256x16     RDATA[0]      regs_1_reto[0]     0.920       -0.995
cpu.regs_1_regs_1_0_0     top|frequency_counter_i_derived_clock[23]     SB_RAM256x16     RDATA[1]      regs_1_reto[1]     0.920       -0.795
cpu.regs_regs_0_0         top|frequency_counter_i_derived_clock[23]     SB_RAM256x16     RDATA[8]      regs_reto[8]       0.920       -0.516
cpu.regs_regs_0_0         top|frequency_counter_i_derived_clock[23]     SB_RAM256x16     RDATA[9]      regs_reto[9]       0.920       -0.444
cpu.regs_regs_0_0         top|frequency_counter_i_derived_clock[23]     SB_RAM256x16     RDATA[10]     regs_reto[10]      0.920       -0.444
cpu.regs_regs_0_0         top|frequency_counter_i_derived_clock[23]     SB_RAM256x16     RDATA[12]     regs_reto[12]      0.920       -0.444
cpu.regs_1_regs_1_0_0     top|frequency_counter_i_derived_clock[23]     SB_RAM256x16     RDATA[3]      regs_1_reto[3]     0.920       -0.395
cpu.regs_regs_0_0         top|frequency_counter_i_derived_clock[23]     SB_RAM256x16     RDATA[11]     regs_reto[11]      0.920       -0.371
============================================================================================================================================


Ending Points with Worst Slack
******************************

                Starting                                                                          Required           
Instance        Reference                                     Type        Pin     Net             Time         Slack 
                Clock                                                                                                
---------------------------------------------------------------------------------------------------------------------
cpu.res[23]     top|frequency_counter_i_derived_clock[23]     SB_DFFE     D       res_140[23]     20.678       -2.555
cpu.res[21]     top|frequency_counter_i_derived_clock[23]     SB_DFFE     D       res_140[21]     20.678       -2.186
cpu.res[30]     top|frequency_counter_i_derived_clock[23]     SB_DFFE     D       res_140[30]     20.678       -1.954
cpu.res[29]     top|frequency_counter_i_derived_clock[23]     SB_DFFE     D       res_140[29]     20.678       -1.682
cpu.res[19]     top|frequency_counter_i_derived_clock[23]     SB_DFFE     D       res_140[19]     20.678       -1.652
cpu.res[18]     top|frequency_counter_i_derived_clock[23]     SB_DFFE     D       res_140[18]     20.678       -1.555
cpu.res[28]     top|frequency_counter_i_derived_clock[23]     SB_DFFE     D       res_140[28]     20.678       -1.554
cpu.res[17]     top|frequency_counter_i_derived_clock[23]     SB_DFFE     D       res_140[17]     20.678       -1.459
cpu.res[26]     top|frequency_counter_i_derived_clock[23]     SB_DFFE     D       res_140[26]     20.678       -1.419
cpu.op[0]       top|frequency_counter_i_derived_clock[23]     SB_DFFE     D       N_83_0          20.678       -1.278
=====================================================================================================================



Worst Path Information
View Worst Path in Analyst
***********************


Path information for path number 1: 
      Requested Period:                      20.833
    - Setup time:                            0.155
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         20.678

    - Propagation time:                      23.234
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (non-critical) :                 -2.555

    Number of logic level(s):                29
    Starting point:                          cpu.regs_1_regs_1_0_0 / RDATA[2]
    Ending point:                            cpu.res[23] / D
    The start point is clocked by            top|frequency_counter_i_derived_clock[23] [rising] on pin RCLK
    The end   point is clocked by            top|int_osc_inferred_clock [rising] on pin C

Instance / Net                                     Pin          Pin               Arrival     No. of    
Name                              Type             Name         Dir     Delay     Time        Fan Out(s)
--------------------------------------------------------------------------------------------------------
cpu.regs_1_regs_1_0_0             SB_RAM256x16     RDATA[2]     Out     0.920     0.920       -         
regs_1_reto[2]                    Net              -            -       2.259     -           1         
cpu.regs_1_regs_1_0_0_RNIMI3K     SB_LUT4          I1           In      -         3.179       -         
cpu.regs_1_regs_1_0_0_RNIMI3K     SB_LUT4          O            Out     0.589     3.768       -         
regs_1_reto_m[2]                  Net              -            -       1.371     -           2         
cpu.arg2_ret_RNI0SSU1[2]          SB_LUT4          I3           In      -         5.139       -         
cpu.arg2_ret_RNI0SSU1[2]          SB_LUT4          O            Out     0.465     5.604       -         
arg2[2]                           Net              -            -       1.371     -           113       
cpu.flag_RNIDF5B3                 SB_LUT4          I1           In      -         6.975       -         
cpu.flag_RNIDF5B3                 SB_LUT4          O            Out     0.589     7.564       -         
flag_RNIDF5B3                     Net              -            -       0.905     -           2         
cpu.un1_arg1_1_cry_2_c            SB_CARRY         I0           In      -         8.469       -         
cpu.un1_arg1_1_cry_2_c            SB_CARRY         CO           Out     0.380     8.849       -         
un1_arg1_1_cry_2                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_3_c            SB_CARRY         CI           In      -         8.863       -         
cpu.un1_arg1_1_cry_3_c            SB_CARRY         CO           Out     0.186     9.049       -         
un1_arg1_1_cry_3                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_4_c            SB_CARRY         CI           In      -         9.063       -         
cpu.un1_arg1_1_cry_4_c            SB_CARRY         CO           Out     0.186     9.249       -         
un1_arg1_1_cry_4                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_5_c            SB_CARRY         CI           In      -         9.263       -         
cpu.un1_arg1_1_cry_5_c            SB_CARRY         CO           Out     0.186     9.449       -         
un1_arg1_1_cry_5                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_6_c            SB_CARRY         CI           In      -         9.463       -         
cpu.un1_arg1_1_cry_6_c            SB_CARRY         CO           Out     0.186     9.649       -         
un1_arg1_1_cry_6                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_7_c            SB_CARRY         CI           In      -         9.663       -         
cpu.un1_arg1_1_cry_7_c            SB_CARRY         CO           Out     0.186     9.849       -         
un1_arg1_1_cry_7                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_8_c            SB_CARRY         CI           In      -         9.863       -         
cpu.un1_arg1_1_cry_8_c            SB_CARRY         CO           Out     0.186     10.049      -         
un1_arg1_1_cry_8                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_9_c            SB_CARRY         CI           In      -         10.063      -         
cpu.un1_arg1_1_cry_9_c            SB_CARRY         CO           Out     0.186     10.249      -         
un1_arg1_1_cry_9                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_10_c           SB_CARRY         CI           In      -         10.263      -         
cpu.un1_arg1_1_cry_10_c           SB_CARRY         CO           Out     0.186     10.449      -         
un1_arg1_1_cry_10                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_11_c           SB_CARRY         CI           In      -         10.463      -         
cpu.un1_arg1_1_cry_11_c           SB_CARRY         CO           Out     0.186     10.649      -         
un1_arg1_1_cry_11                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_12_c           SB_CARRY         CI           In      -         10.663      -         
cpu.un1_arg1_1_cry_12_c           SB_CARRY         CO           Out     0.186     10.849      -         
un1_arg1_1_cry_12                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_13_c           SB_CARRY         CI           In      -         10.863      -         
cpu.un1_arg1_1_cry_13_c           SB_CARRY         CO           Out     0.186     11.049      -         
un1_arg1_1_cry_13                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_14_c           SB_CARRY         CI           In      -         11.063      -         
cpu.un1_arg1_1_cry_14_c           SB_CARRY         CO           Out     0.186     11.249      -         
un1_arg1_1_cry_14                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_15_c           SB_CARRY         CI           In      -         11.263      -         
cpu.un1_arg1_1_cry_15_c           SB_CARRY         CO           Out     0.186     11.449      -         
un1_arg1_1_cry_15                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_16_c           SB_CARRY         CI           In      -         11.463      -         
cpu.un1_arg1_1_cry_16_c           SB_CARRY         CO           Out     0.186     11.649      -         
un1_arg1_1_cry_16                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_17_c           SB_CARRY         CI           In      -         11.663      -         
cpu.un1_arg1_1_cry_17_c           SB_CARRY         CO           Out     0.186     11.849      -         
un1_arg1_1_cry_17                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_18_c           SB_CARRY         CI           In      -         11.863      -         
cpu.un1_arg1_1_cry_18_c           SB_CARRY         CO           Out     0.186     12.049      -         
un1_arg1_1_cry_18                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_19_c           SB_CARRY         CI           In      -         12.063      -         
cpu.un1_arg1_1_cry_19_c           SB_CARRY         CO           Out     0.186     12.249      -         
un1_arg1_1_cry_19                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_20_c           SB_CARRY         CI           In      -         12.263      -         
cpu.un1_arg1_1_cry_20_c           SB_CARRY         CO           Out     0.186     12.449      -         
un1_arg1_1_cry_20                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_21_c           SB_CARRY         CI           In      -         12.463      -         
cpu.un1_arg1_1_cry_21_c           SB_CARRY         CO           Out     0.186     12.649      -         
un1_arg1_1_cry_21                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_22_c           SB_CARRY         CI           In      -         12.663      -         
cpu.un1_arg1_1_cry_22_c           SB_CARRY         CO           Out     0.186     12.849      -         
un1_arg1_1_cry_22                 Net              -            -       0.386     -           2         
cpu.res_RNO_17[23]                SB_LUT4          I3           In      -         13.235      -         
cpu.res_RNO_17[23]                SB_LUT4          O            Out     0.465     13.700      -         
res_RNO_17[23]                    Net              -            -       1.371     -           1         
cpu.res_RNO_9[23]                 SB_LUT4          I0           In      -         15.071      -         
cpu.res_RNO_9[23]                 SB_LUT4          O            Out     0.661     15.732      -         
res_RNO_9[23]                     Net              -            -       1.371     -           1         
cpu.res_RNO_4[23]                 SB_LUT4          I0           In      -         17.104      -         
cpu.res_RNO_4[23]                 SB_LUT4          O            Out     0.661     17.765      -         
N_1489                            Net              -            -       1.371     -           1         
cpu.res_RNO_0[23]                 SB_LUT4          I2           In      -         19.136      -         
cpu.res_RNO_0[23]                 SB_LUT4          O            Out     0.558     19.694      -         
res_RNO_0[23]                     Net              -            -       1.371     -           1         
cpu.res_RNO[23]                   SB_LUT4          I0           In      -         21.065      -         
cpu.res_RNO[23]                   SB_LUT4          O            Out     0.661     21.727      -         
res_140[23]                       Net              -            -       1.507     -           1         
cpu.res[23]                       SB_DFFE          D            In      -         23.234      -         
========================================================================================================
Total path delay (propagation time + setup) of 23.389 is 9.826(42.0%) logic and 13.563(58.0%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value


Path information for path number 2: 
      Requested Period:                      20.833
    - Setup time:                            0.155
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         20.678

    - Propagation time:                      22.865
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (non-critical) :                 -2.186

    Number of logic level(s):                27
    Starting point:                          cpu.regs_1_regs_1_0_0 / RDATA[2]
    Ending point:                            cpu.res[21] / D
    The start point is clocked by            top|frequency_counter_i_derived_clock[23] [rising] on pin RCLK
    The end   point is clocked by            top|int_osc_inferred_clock [rising] on pin C

Instance / Net                                     Pin          Pin               Arrival     No. of    
Name                              Type             Name         Dir     Delay     Time        Fan Out(s)
--------------------------------------------------------------------------------------------------------
cpu.regs_1_regs_1_0_0             SB_RAM256x16     RDATA[2]     Out     0.920     0.920       -         
regs_1_reto[2]                    Net              -            -       2.259     -           1         
cpu.regs_1_regs_1_0_0_RNIMI3K     SB_LUT4          I1           In      -         3.179       -         
cpu.regs_1_regs_1_0_0_RNIMI3K     SB_LUT4          O            Out     0.589     3.768       -         
regs_1_reto_m[2]                  Net              -            -       1.371     -           2         
cpu.arg2_ret_RNI0SSU1[2]          SB_LUT4          I3           In      -         5.139       -         
cpu.arg2_ret_RNI0SSU1[2]          SB_LUT4          O            Out     0.465     5.604       -         
arg2[2]                           Net              -            -       1.371     -           113       
cpu.flag_RNIDF5B3                 SB_LUT4          I1           In      -         6.975       -         
cpu.flag_RNIDF5B3                 SB_LUT4          O            Out     0.589     7.564       -         
flag_RNIDF5B3                     Net              -            -       0.905     -           2         
cpu.un1_arg1_1_cry_2_c            SB_CARRY         I0           In      -         8.469       -         
cpu.un1_arg1_1_cry_2_c            SB_CARRY         CO           Out     0.380     8.849       -         
un1_arg1_1_cry_2                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_3_c            SB_CARRY         CI           In      -         8.863       -         
cpu.un1_arg1_1_cry_3_c            SB_CARRY         CO           Out     0.186     9.049       -         
un1_arg1_1_cry_3                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_4_c            SB_CARRY         CI           In      -         9.063       -         
cpu.un1_arg1_1_cry_4_c            SB_CARRY         CO           Out     0.186     9.249       -         
un1_arg1_1_cry_4                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_5_c            SB_CARRY         CI           In      -         9.263       -         
cpu.un1_arg1_1_cry_5_c            SB_CARRY         CO           Out     0.186     9.449       -         
un1_arg1_1_cry_5                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_6_c            SB_CARRY         CI           In      -         9.463       -         
cpu.un1_arg1_1_cry_6_c            SB_CARRY         CO           Out     0.186     9.649       -         
un1_arg1_1_cry_6                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_7_c            SB_CARRY         CI           In      -         9.663       -         
cpu.un1_arg1_1_cry_7_c            SB_CARRY         CO           Out     0.186     9.849       -         
un1_arg1_1_cry_7                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_8_c            SB_CARRY         CI           In      -         9.863       -         
cpu.un1_arg1_1_cry_8_c            SB_CARRY         CO           Out     0.186     10.049      -         
un1_arg1_1_cry_8                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_9_c            SB_CARRY         CI           In      -         10.063      -         
cpu.un1_arg1_1_cry_9_c            SB_CARRY         CO           Out     0.186     10.249      -         
un1_arg1_1_cry_9                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_10_c           SB_CARRY         CI           In      -         10.263      -         
cpu.un1_arg1_1_cry_10_c           SB_CARRY         CO           Out     0.186     10.449      -         
un1_arg1_1_cry_10                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_11_c           SB_CARRY         CI           In      -         10.463      -         
cpu.un1_arg1_1_cry_11_c           SB_CARRY         CO           Out     0.186     10.649      -         
un1_arg1_1_cry_11                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_12_c           SB_CARRY         CI           In      -         10.663      -         
cpu.un1_arg1_1_cry_12_c           SB_CARRY         CO           Out     0.186     10.849      -         
un1_arg1_1_cry_12                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_13_c           SB_CARRY         CI           In      -         10.863      -         
cpu.un1_arg1_1_cry_13_c           SB_CARRY         CO           Out     0.186     11.049      -         
un1_arg1_1_cry_13                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_14_c           SB_CARRY         CI           In      -         11.063      -         
cpu.un1_arg1_1_cry_14_c           SB_CARRY         CO           Out     0.186     11.249      -         
un1_arg1_1_cry_14                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_15_c           SB_CARRY         CI           In      -         11.263      -         
cpu.un1_arg1_1_cry_15_c           SB_CARRY         CO           Out     0.186     11.449      -         
un1_arg1_1_cry_15                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_16_c           SB_CARRY         CI           In      -         11.463      -         
cpu.un1_arg1_1_cry_16_c           SB_CARRY         CO           Out     0.186     11.649      -         
un1_arg1_1_cry_16                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_17_c           SB_CARRY         CI           In      -         11.663      -         
cpu.un1_arg1_1_cry_17_c           SB_CARRY         CO           Out     0.186     11.849      -         
un1_arg1_1_cry_17                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_18_c           SB_CARRY         CI           In      -         11.863      -         
cpu.un1_arg1_1_cry_18_c           SB_CARRY         CO           Out     0.186     12.049      -         
un1_arg1_1_cry_18                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_19_c           SB_CARRY         CI           In      -         12.063      -         
cpu.un1_arg1_1_cry_19_c           SB_CARRY         CO           Out     0.186     12.249      -         
un1_arg1_1_cry_19                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_20_c           SB_CARRY         CI           In      -         12.263      -         
cpu.un1_arg1_1_cry_20_c           SB_CARRY         CO           Out     0.186     12.449      -         
un1_arg1_1_cry_20                 Net              -            -       0.386     -           2         
cpu.res_RNO_15[21]                SB_LUT4          I3           In      -         12.835      -         
cpu.res_RNO_15[21]                SB_LUT4          O            Out     0.465     13.300      -         
res_RNO_15[21]                    Net              -            -       1.371     -           1         
cpu.res_RNO_8[21]                 SB_LUT4          I0           In      -         14.671      -         
cpu.res_RNO_8[21]                 SB_LUT4          O            Out     0.661     15.333      -         
res_RNO_8[21]                     Net              -            -       1.371     -           1         
cpu.res_RNO_3[21]                 SB_LUT4          I1           In      -         16.704      -         
cpu.res_RNO_3[21]                 SB_LUT4          O            Out     0.589     17.293      -         
N_1861                            Net              -            -       1.371     -           1         
cpu.res_RNO_0[21]                 SB_LUT4          I0           In      -         18.664      -         
cpu.res_RNO_0[21]                 SB_LUT4          O            Out     0.661     19.325      -         
res_RNO_0[21]                     Net              -            -       1.371     -           1         
cpu.res_RNO[21]                   SB_LUT4          I0           In      -         20.696      -         
cpu.res_RNO[21]                   SB_LUT4          O            Out     0.661     21.358      -         
res_140[21]                       Net              -            -       1.507     -           1         
cpu.res[21]                       SB_DFFE          D            In      -         22.865      -         
========================================================================================================
Total path delay (propagation time + setup) of 23.020 is 9.485(41.2%) logic and 13.535(58.8%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value


Path information for path number 3: 
      Requested Period:                      20.833
    - Setup time:                            0.155
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         20.678

    - Propagation time:                      22.632
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (non-critical) :                 -1.954

    Number of logic level(s):                35
    Starting point:                          cpu.regs_1_regs_1_0_0 / RDATA[2]
    Ending point:                            cpu.res[30] / D
    The start point is clocked by            top|frequency_counter_i_derived_clock[23] [rising] on pin RCLK
    The end   point is clocked by            top|int_osc_inferred_clock [rising] on pin C

Instance / Net                                     Pin          Pin               Arrival     No. of    
Name                              Type             Name         Dir     Delay     Time        Fan Out(s)
--------------------------------------------------------------------------------------------------------
cpu.regs_1_regs_1_0_0             SB_RAM256x16     RDATA[2]     Out     0.920     0.920       -         
regs_1_reto[2]                    Net              -            -       2.259     -           1         
cpu.regs_1_regs_1_0_0_RNIMI3K     SB_LUT4          I1           In      -         3.179       -         
cpu.regs_1_regs_1_0_0_RNIMI3K     SB_LUT4          O            Out     0.589     3.768       -         
regs_1_reto_m[2]                  Net              -            -       1.371     -           2         
cpu.arg2_ret_RNI0SSU1[2]          SB_LUT4          I3           In      -         5.139       -         
cpu.arg2_ret_RNI0SSU1[2]          SB_LUT4          O            Out     0.465     5.604       -         
arg2[2]                           Net              -            -       1.371     -           113       
cpu.flag_RNIDF5B3                 SB_LUT4          I1           In      -         6.975       -         
cpu.flag_RNIDF5B3                 SB_LUT4          O            Out     0.589     7.564       -         
flag_RNIDF5B3                     Net              -            -       0.905     -           2         
cpu.un1_arg1_1_cry_2_c            SB_CARRY         I0           In      -         8.469       -         
cpu.un1_arg1_1_cry_2_c            SB_CARRY         CO           Out     0.380     8.849       -         
un1_arg1_1_cry_2                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_3_c            SB_CARRY         CI           In      -         8.863       -         
cpu.un1_arg1_1_cry_3_c            SB_CARRY         CO           Out     0.186     9.049       -         
un1_arg1_1_cry_3                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_4_c            SB_CARRY         CI           In      -         9.063       -         
cpu.un1_arg1_1_cry_4_c            SB_CARRY         CO           Out     0.186     9.249       -         
un1_arg1_1_cry_4                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_5_c            SB_CARRY         CI           In      -         9.263       -         
cpu.un1_arg1_1_cry_5_c            SB_CARRY         CO           Out     0.186     9.449       -         
un1_arg1_1_cry_5                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_6_c            SB_CARRY         CI           In      -         9.463       -         
cpu.un1_arg1_1_cry_6_c            SB_CARRY         CO           Out     0.186     9.649       -         
un1_arg1_1_cry_6                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_7_c            SB_CARRY         CI           In      -         9.663       -         
cpu.un1_arg1_1_cry_7_c            SB_CARRY         CO           Out     0.186     9.849       -         
un1_arg1_1_cry_7                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_8_c            SB_CARRY         CI           In      -         9.863       -         
cpu.un1_arg1_1_cry_8_c            SB_CARRY         CO           Out     0.186     10.049      -         
un1_arg1_1_cry_8                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_9_c            SB_CARRY         CI           In      -         10.063      -         
cpu.un1_arg1_1_cry_9_c            SB_CARRY         CO           Out     0.186     10.249      -         
un1_arg1_1_cry_9                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_10_c           SB_CARRY         CI           In      -         10.263      -         
cpu.un1_arg1_1_cry_10_c           SB_CARRY         CO           Out     0.186     10.449      -         
un1_arg1_1_cry_10                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_11_c           SB_CARRY         CI           In      -         10.463      -         
cpu.un1_arg1_1_cry_11_c           SB_CARRY         CO           Out     0.186     10.649      -         
un1_arg1_1_cry_11                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_12_c           SB_CARRY         CI           In      -         10.663      -         
cpu.un1_arg1_1_cry_12_c           SB_CARRY         CO           Out     0.186     10.849      -         
un1_arg1_1_cry_12                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_13_c           SB_CARRY         CI           In      -         10.863      -         
cpu.un1_arg1_1_cry_13_c           SB_CARRY         CO           Out     0.186     11.049      -         
un1_arg1_1_cry_13                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_14_c           SB_CARRY         CI           In      -         11.063      -         
cpu.un1_arg1_1_cry_14_c           SB_CARRY         CO           Out     0.186     11.249      -         
un1_arg1_1_cry_14                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_15_c           SB_CARRY         CI           In      -         11.263      -         
cpu.un1_arg1_1_cry_15_c           SB_CARRY         CO           Out     0.186     11.449      -         
un1_arg1_1_cry_15                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_16_c           SB_CARRY         CI           In      -         11.463      -         
cpu.un1_arg1_1_cry_16_c           SB_CARRY         CO           Out     0.186     11.649      -         
un1_arg1_1_cry_16                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_17_c           SB_CARRY         CI           In      -         11.663      -         
cpu.un1_arg1_1_cry_17_c           SB_CARRY         CO           Out     0.186     11.849      -         
un1_arg1_1_cry_17                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_18_c           SB_CARRY         CI           In      -         11.863      -         
cpu.un1_arg1_1_cry_18_c           SB_CARRY         CO           Out     0.186     12.049      -         
un1_arg1_1_cry_18                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_19_c           SB_CARRY         CI           In      -         12.063      -         
cpu.un1_arg1_1_cry_19_c           SB_CARRY         CO           Out     0.186     12.249      -         
un1_arg1_1_cry_19                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_20_c           SB_CARRY         CI           In      -         12.263      -         
cpu.un1_arg1_1_cry_20_c           SB_CARRY         CO           Out     0.186     12.449      -         
un1_arg1_1_cry_20                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_21_c           SB_CARRY         CI           In      -         12.463      -         
cpu.un1_arg1_1_cry_21_c           SB_CARRY         CO           Out     0.186     12.649      -         
un1_arg1_1_cry_21                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_22_c           SB_CARRY         CI           In      -         12.663      -         
cpu.un1_arg1_1_cry_22_c           SB_CARRY         CO           Out     0.186     12.849      -         
un1_arg1_1_cry_22                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_23_c           SB_CARRY         CI           In      -         12.863      -         
cpu.un1_arg1_1_cry_23_c           SB_CARRY         CO           Out     0.186     13.049      -         
un1_arg1_1_cry_23                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_24_c           SB_CARRY         CI           In      -         13.063      -         
cpu.un1_arg1_1_cry_24_c           SB_CARRY         CO           Out     0.186     13.249      -         
un1_arg1_1_cry_24                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_25_c           SB_CARRY         CI           In      -         13.263      -         
cpu.un1_arg1_1_cry_25_c           SB_CARRY         CO           Out     0.186     13.449      -         
un1_arg1_1_cry_25                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_26_c           SB_CARRY         CI           In      -         13.463      -         
cpu.un1_arg1_1_cry_26_c           SB_CARRY         CO           Out     0.186     13.649      -         
un1_arg1_1_cry_26                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_27_c           SB_CARRY         CI           In      -         13.663      -         
cpu.un1_arg1_1_cry_27_c           SB_CARRY         CO           Out     0.186     13.849      -         
un1_arg1_1_cry_27                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_28_c           SB_CARRY         CI           In      -         13.863      -         
cpu.un1_arg1_1_cry_28_c           SB_CARRY         CO           Out     0.186     14.049      -         
un1_arg1_1_cry_28                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_29_c           SB_CARRY         CI           In      -         14.063      -         
cpu.un1_arg1_1_cry_29_c           SB_CARRY         CO           Out     0.186     14.249      -         
un1_arg1_1_cry_29                 Net              -            -       0.386     -           2         
cpu.res_RNO_11[30]                SB_LUT4          I3           In      -         14.635      -         
cpu.res_RNO_11[30]                SB_LUT4          O            Out     0.465     15.100      -         
res_RNO_11[30]                    Net              -            -       1.371     -           1         
cpu.res_RNO_5[30]                 SB_LUT4          I0           In      -         16.471      -         
cpu.res_RNO_5[30]                 SB_LUT4          O            Out     0.661     17.133      -         
res_RNO_5[30]                     Net              -            -       1.371     -           1         
cpu.res_RNO_1[30]                 SB_LUT4          I0           In      -         18.504      -         
cpu.res_RNO_1[30]                 SB_LUT4          O            Out     0.661     19.165      -         
res_RNO_1[30]                     Net              -            -       1.371     -           1         
cpu.res_RNO[30]                   SB_LUT4          I1           In      -         20.536      -         
cpu.res_RNO[30]                   SB_LUT4          O            Out     0.589     21.125      -         
res_140[30]                       Net              -            -       1.507     -           1         
cpu.res[30]                       SB_DFFE          D            In      -         22.632      -         
========================================================================================================
Total path delay (propagation time + setup) of 22.787 is 10.497(46.1%) logic and 12.290(53.9%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value


Path information for path number 4: 
      Requested Period:                      20.833
    - Setup time:                            0.155
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         20.678

    - Propagation time:                      22.360
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (non-critical) :                 -1.682

    Number of logic level(s):                34
    Starting point:                          cpu.regs_1_regs_1_0_0 / RDATA[2]
    Ending point:                            cpu.res[29] / D
    The start point is clocked by            top|frequency_counter_i_derived_clock[23] [rising] on pin RCLK
    The end   point is clocked by            top|int_osc_inferred_clock [rising] on pin C

Instance / Net                                     Pin          Pin               Arrival     No. of    
Name                              Type             Name         Dir     Delay     Time        Fan Out(s)
--------------------------------------------------------------------------------------------------------
cpu.regs_1_regs_1_0_0             SB_RAM256x16     RDATA[2]     Out     0.920     0.920       -         
regs_1_reto[2]                    Net              -            -       2.259     -           1         
cpu.regs_1_regs_1_0_0_RNIMI3K     SB_LUT4          I1           In      -         3.179       -         
cpu.regs_1_regs_1_0_0_RNIMI3K     SB_LUT4          O            Out     0.589     3.768       -         
regs_1_reto_m[2]                  Net              -            -       1.371     -           2         
cpu.arg2_ret_RNI0SSU1[2]          SB_LUT4          I3           In      -         5.139       -         
cpu.arg2_ret_RNI0SSU1[2]          SB_LUT4          O            Out     0.465     5.604       -         
arg2[2]                           Net              -            -       1.371     -           113       
cpu.flag_RNIDF5B3                 SB_LUT4          I1           In      -         6.975       -         
cpu.flag_RNIDF5B3                 SB_LUT4          O            Out     0.589     7.564       -         
flag_RNIDF5B3                     Net              -            -       0.905     -           2         
cpu.un1_arg1_1_cry_2_c            SB_CARRY         I0           In      -         8.469       -         
cpu.un1_arg1_1_cry_2_c            SB_CARRY         CO           Out     0.380     8.849       -         
un1_arg1_1_cry_2                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_3_c            SB_CARRY         CI           In      -         8.863       -         
cpu.un1_arg1_1_cry_3_c            SB_CARRY         CO           Out     0.186     9.049       -         
un1_arg1_1_cry_3                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_4_c            SB_CARRY         CI           In      -         9.063       -         
cpu.un1_arg1_1_cry_4_c            SB_CARRY         CO           Out     0.186     9.249       -         
un1_arg1_1_cry_4                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_5_c            SB_CARRY         CI           In      -         9.263       -         
cpu.un1_arg1_1_cry_5_c            SB_CARRY         CO           Out     0.186     9.449       -         
un1_arg1_1_cry_5                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_6_c            SB_CARRY         CI           In      -         9.463       -         
cpu.un1_arg1_1_cry_6_c            SB_CARRY         CO           Out     0.186     9.649       -         
un1_arg1_1_cry_6                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_7_c            SB_CARRY         CI           In      -         9.663       -         
cpu.un1_arg1_1_cry_7_c            SB_CARRY         CO           Out     0.186     9.849       -         
un1_arg1_1_cry_7                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_8_c            SB_CARRY         CI           In      -         9.863       -         
cpu.un1_arg1_1_cry_8_c            SB_CARRY         CO           Out     0.186     10.049      -         
un1_arg1_1_cry_8                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_9_c            SB_CARRY         CI           In      -         10.063      -         
cpu.un1_arg1_1_cry_9_c            SB_CARRY         CO           Out     0.186     10.249      -         
un1_arg1_1_cry_9                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_10_c           SB_CARRY         CI           In      -         10.263      -         
cpu.un1_arg1_1_cry_10_c           SB_CARRY         CO           Out     0.186     10.449      -         
un1_arg1_1_cry_10                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_11_c           SB_CARRY         CI           In      -         10.463      -         
cpu.un1_arg1_1_cry_11_c           SB_CARRY         CO           Out     0.186     10.649      -         
un1_arg1_1_cry_11                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_12_c           SB_CARRY         CI           In      -         10.663      -         
cpu.un1_arg1_1_cry_12_c           SB_CARRY         CO           Out     0.186     10.849      -         
un1_arg1_1_cry_12                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_13_c           SB_CARRY         CI           In      -         10.863      -         
cpu.un1_arg1_1_cry_13_c           SB_CARRY         CO           Out     0.186     11.049      -         
un1_arg1_1_cry_13                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_14_c           SB_CARRY         CI           In      -         11.063      -         
cpu.un1_arg1_1_cry_14_c           SB_CARRY         CO           Out     0.186     11.249      -         
un1_arg1_1_cry_14                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_15_c           SB_CARRY         CI           In      -         11.263      -         
cpu.un1_arg1_1_cry_15_c           SB_CARRY         CO           Out     0.186     11.449      -         
un1_arg1_1_cry_15                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_16_c           SB_CARRY         CI           In      -         11.463      -         
cpu.un1_arg1_1_cry_16_c           SB_CARRY         CO           Out     0.186     11.649      -         
un1_arg1_1_cry_16                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_17_c           SB_CARRY         CI           In      -         11.663      -         
cpu.un1_arg1_1_cry_17_c           SB_CARRY         CO           Out     0.186     11.849      -         
un1_arg1_1_cry_17                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_18_c           SB_CARRY         CI           In      -         11.863      -         
cpu.un1_arg1_1_cry_18_c           SB_CARRY         CO           Out     0.186     12.049      -         
un1_arg1_1_cry_18                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_19_c           SB_CARRY         CI           In      -         12.063      -         
cpu.un1_arg1_1_cry_19_c           SB_CARRY         CO           Out     0.186     12.249      -         
un1_arg1_1_cry_19                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_20_c           SB_CARRY         CI           In      -         12.263      -         
cpu.un1_arg1_1_cry_20_c           SB_CARRY         CO           Out     0.186     12.449      -         
un1_arg1_1_cry_20                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_21_c           SB_CARRY         CI           In      -         12.463      -         
cpu.un1_arg1_1_cry_21_c           SB_CARRY         CO           Out     0.186     12.649      -         
un1_arg1_1_cry_21                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_22_c           SB_CARRY         CI           In      -         12.663      -         
cpu.un1_arg1_1_cry_22_c           SB_CARRY         CO           Out     0.186     12.849      -         
un1_arg1_1_cry_22                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_23_c           SB_CARRY         CI           In      -         12.863      -         
cpu.un1_arg1_1_cry_23_c           SB_CARRY         CO           Out     0.186     13.049      -         
un1_arg1_1_cry_23                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_24_c           SB_CARRY         CI           In      -         13.063      -         
cpu.un1_arg1_1_cry_24_c           SB_CARRY         CO           Out     0.186     13.249      -         
un1_arg1_1_cry_24                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_25_c           SB_CARRY         CI           In      -         13.263      -         
cpu.un1_arg1_1_cry_25_c           SB_CARRY         CO           Out     0.186     13.449      -         
un1_arg1_1_cry_25                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_26_c           SB_CARRY         CI           In      -         13.463      -         
cpu.un1_arg1_1_cry_26_c           SB_CARRY         CO           Out     0.186     13.649      -         
un1_arg1_1_cry_26                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_27_c           SB_CARRY         CI           In      -         13.663      -         
cpu.un1_arg1_1_cry_27_c           SB_CARRY         CO           Out     0.186     13.849      -         
un1_arg1_1_cry_27                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_28_c           SB_CARRY         CI           In      -         13.863      -         
cpu.un1_arg1_1_cry_28_c           SB_CARRY         CO           Out     0.186     14.049      -         
un1_arg1_1_cry_28                 Net              -            -       0.386     -           2         
cpu.res_RNO_14[29]                SB_LUT4          I3           In      -         14.435      -         
cpu.res_RNO_14[29]                SB_LUT4          O            Out     0.465     14.900      -         
res_RNO_14[29]                    Net              -            -       1.371     -           1         
cpu.res_RNO_6[29]                 SB_LUT4          I0           In      -         16.271      -         
cpu.res_RNO_6[29]                 SB_LUT4          O            Out     0.661     16.933      -         
N_613                             Net              -            -       1.371     -           1         
cpu.res_RNO_1[29]                 SB_LUT4          I1           In      -         18.303      -         
cpu.res_RNO_1[29]                 SB_LUT4          O            Out     0.589     18.893      -         
N_1869                            Net              -            -       1.371     -           1         
cpu.res_RNO[29]                   SB_LUT4          I1           In      -         20.264      -         
cpu.res_RNO[29]                   SB_LUT4          O            Out     0.589     20.853      -         
res_140[29]                       Net              -            -       1.507     -           1         
cpu.res[29]                       SB_DFFE          D            In      -         22.360      -         
========================================================================================================
Total path delay (propagation time + setup) of 22.515 is 10.239(45.5%) logic and 12.276(54.5%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value


Path information for path number 5: 
      Requested Period:                      20.833
    - Setup time:                            0.155
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         20.678

    - Propagation time:                      22.330
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (non-critical) :                 -1.652

    Number of logic level(s):                25
    Starting point:                          cpu.regs_1_regs_1_0_0 / RDATA[2]
    Ending point:                            cpu.res[19] / D
    The start point is clocked by            top|frequency_counter_i_derived_clock[23] [rising] on pin RCLK
    The end   point is clocked by            top|int_osc_inferred_clock [rising] on pin C

Instance / Net                                     Pin          Pin               Arrival     No. of    
Name                              Type             Name         Dir     Delay     Time        Fan Out(s)
--------------------------------------------------------------------------------------------------------
cpu.regs_1_regs_1_0_0             SB_RAM256x16     RDATA[2]     Out     0.920     0.920       -         
regs_1_reto[2]                    Net              -            -       2.259     -           1         
cpu.regs_1_regs_1_0_0_RNIMI3K     SB_LUT4          I1           In      -         3.179       -         
cpu.regs_1_regs_1_0_0_RNIMI3K     SB_LUT4          O            Out     0.589     3.768       -         
regs_1_reto_m[2]                  Net              -            -       1.371     -           2         
cpu.arg2_ret_RNI0SSU1[2]          SB_LUT4          I3           In      -         5.139       -         
cpu.arg2_ret_RNI0SSU1[2]          SB_LUT4          O            Out     0.465     5.604       -         
arg2[2]                           Net              -            -       1.371     -           113       
cpu.flag_RNIDF5B3                 SB_LUT4          I1           In      -         6.975       -         
cpu.flag_RNIDF5B3                 SB_LUT4          O            Out     0.589     7.564       -         
flag_RNIDF5B3                     Net              -            -       0.905     -           2         
cpu.un1_arg1_1_cry_2_c            SB_CARRY         I0           In      -         8.469       -         
cpu.un1_arg1_1_cry_2_c            SB_CARRY         CO           Out     0.380     8.849       -         
un1_arg1_1_cry_2                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_3_c            SB_CARRY         CI           In      -         8.863       -         
cpu.un1_arg1_1_cry_3_c            SB_CARRY         CO           Out     0.186     9.049       -         
un1_arg1_1_cry_3                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_4_c            SB_CARRY         CI           In      -         9.063       -         
cpu.un1_arg1_1_cry_4_c            SB_CARRY         CO           Out     0.186     9.249       -         
un1_arg1_1_cry_4                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_5_c            SB_CARRY         CI           In      -         9.263       -         
cpu.un1_arg1_1_cry_5_c            SB_CARRY         CO           Out     0.186     9.449       -         
un1_arg1_1_cry_5                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_6_c            SB_CARRY         CI           In      -         9.463       -         
cpu.un1_arg1_1_cry_6_c            SB_CARRY         CO           Out     0.186     9.649       -         
un1_arg1_1_cry_6                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_7_c            SB_CARRY         CI           In      -         9.663       -         
cpu.un1_arg1_1_cry_7_c            SB_CARRY         CO           Out     0.186     9.849       -         
un1_arg1_1_cry_7                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_8_c            SB_CARRY         CI           In      -         9.863       -         
cpu.un1_arg1_1_cry_8_c            SB_CARRY         CO           Out     0.186     10.049      -         
un1_arg1_1_cry_8                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_9_c            SB_CARRY         CI           In      -         10.063      -         
cpu.un1_arg1_1_cry_9_c            SB_CARRY         CO           Out     0.186     10.249      -         
un1_arg1_1_cry_9                  Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_10_c           SB_CARRY         CI           In      -         10.263      -         
cpu.un1_arg1_1_cry_10_c           SB_CARRY         CO           Out     0.186     10.449      -         
un1_arg1_1_cry_10                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_11_c           SB_CARRY         CI           In      -         10.463      -         
cpu.un1_arg1_1_cry_11_c           SB_CARRY         CO           Out     0.186     10.649      -         
un1_arg1_1_cry_11                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_12_c           SB_CARRY         CI           In      -         10.663      -         
cpu.un1_arg1_1_cry_12_c           SB_CARRY         CO           Out     0.186     10.849      -         
un1_arg1_1_cry_12                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_13_c           SB_CARRY         CI           In      -         10.863      -         
cpu.un1_arg1_1_cry_13_c           SB_CARRY         CO           Out     0.186     11.049      -         
un1_arg1_1_cry_13                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_14_c           SB_CARRY         CI           In      -         11.063      -         
cpu.un1_arg1_1_cry_14_c           SB_CARRY         CO           Out     0.186     11.249      -         
un1_arg1_1_cry_14                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_15_c           SB_CARRY         CI           In      -         11.263      -         
cpu.un1_arg1_1_cry_15_c           SB_CARRY         CO           Out     0.186     11.449      -         
un1_arg1_1_cry_15                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_16_c           SB_CARRY         CI           In      -         11.463      -         
cpu.un1_arg1_1_cry_16_c           SB_CARRY         CO           Out     0.186     11.649      -         
un1_arg1_1_cry_16                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_17_c           SB_CARRY         CI           In      -         11.663      -         
cpu.un1_arg1_1_cry_17_c           SB_CARRY         CO           Out     0.186     11.849      -         
un1_arg1_1_cry_17                 Net              -            -       0.014     -           2         
cpu.un1_arg1_1_cry_18_c           SB_CARRY         CI           In      -         11.863      -         
cpu.un1_arg1_1_cry_18_c           SB_CARRY         CO           Out     0.186     12.049      -         
un1_arg1_1_cry_18                 Net              -            -       0.386     -           2         
cpu.res_RNO_19[19]                SB_LUT4          I3           In      -         12.435      -         
cpu.res_RNO_19[19]                SB_LUT4          O            Out     0.465     12.900      -         
res_RNO_19[19]                    Net              -            -       1.371     -           1         
cpu.res_RNO_11[19]                SB_LUT4          I0           In      -         14.271      -         
cpu.res_RNO_11[19]                SB_LUT4          O            Out     0.661     14.933      -         
N_969                             Net              -            -       1.371     -           1         
cpu.res_RNO_4[19]                 SB_LUT4          I1           In      -         16.303      -         
cpu.res_RNO_4[19]                 SB_LUT4          O            Out     0.558     16.862      -         
res_140_1_am_1_0[19]              Net              -            -       1.371     -           1         
cpu.res_RNO_0[19]                 SB_LUT4          I2           In      -         18.233      -         
cpu.res_RNO_0[19]                 SB_LUT4          O            Out     0.558     18.791      -         
res_RNO_0[19]                     Net              -            -       1.371     -           1         
cpu.res_RNO[19]                   SB_LUT4          I0           In      -         20.162      -         
cpu.res_RNO[19]                   SB_LUT4          O            Out     0.661     20.823      -         
res_140[19]                       Net              -            -       1.507     -           1         
cpu.res[19]                       SB_DFFE          D            In      -         22.330      -         
========================================================================================================
Total path delay (propagation time + setup) of 22.485 is 8.978(39.9%) logic and 13.507(60.1%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value




====================================
Detailed Report for Clock: top|int_osc_inferred_clock
====================================



Starting Points with Worst Slack
********************************

                   Starting                                                          Arrival           
Instance           Reference                      Type        Pin     Net            Time        Slack 
                   Clock                                                                               
-------------------------------------------------------------------------------------------------------
cpu.lbytes[2]      top|int_osc_inferred_clock     SB_DFFE     Q       lbytes[2]      0.796       -9.557
cpu.sbytes[1]      top|int_osc_inferred_clock     SB_DFFE     Q       sbytes[1]      0.796       -9.485
cpu.sbytes[2]      top|int_osc_inferred_clock     SB_DFFE     Q       sbytes[2]      0.796       -9.453
cpu.lbytes[0]      top|int_osc_inferred_clock     SB_DFFE     Q       lbytes[0]      0.796       -7.452
cpu.lbytes[1]      top|int_osc_inferred_clock     SB_DFFE     Q       lbytes[1]      0.796       -7.421
cpu.sbytes[0]      top|int_osc_inferred_clock     SB_DFFE     Q       sbytes[0]      0.796       -7.328
cpu.extaddr[3]     top|int_osc_inferred_clock     SB_DFFE     Q       extaddr[3]     0.796       -5.564
cpu.extaddr[0]     top|int_osc_inferred_clock     SB_DFFE     Q       extaddr[0]     0.796       -5.533
cpu.op[0]          top|int_osc_inferred_clock     SB_DFFE     Q       op[0]          0.796       -5.512
cpu.extaddr[1]     top|int_osc_inferred_clock     SB_DFFE     Q       extaddr[1]     0.796       -5.492
=======================================================================================================


Ending Points with Worst Slack
******************************

                Starting                                                           Required           
Instance        Reference                      Type        Pin     Net             Time         Slack 
                Clock                                                                                 
------------------------------------------------------------------------------------------------------
cpu.res[12]     top|int_osc_inferred_clock     SB_DFFE     D       res_140[12]     20.675       -9.557
cpu.res[13]     top|int_osc_inferred_clock     SB_DFFE     D       res_140[13]     20.675       -9.557
cpu.res[11]     top|int_osc_inferred_clock     SB_DFFE     D       res_140[11]     20.675       -9.474
cpu.res[14]     top|int_osc_inferred_clock     SB_DFFE     D       res_140[14]     20.675       -9.432
cpu.res[10]     top|int_osc_inferred_clock     SB_DFFE     D       res_140[10]     20.675       -9.370
cpu.res[15]     top|int_osc_inferred_clock     SB_DFFE     D       res_140[15]     20.675       -9.370
cpu.res[27]     top|int_osc_inferred_clock     SB_DFFE     D       res_140[27]     20.675       -9.329
cpu.res[9]      top|int_osc_inferred_clock     SB_DFFE     D       res_140[9]      20.675       -9.288
cpu.res[8]      top|int_osc_inferred_clock     SB_DFFE     D       res_140[8]      20.675       -9.277
cpu.res[22]     top|int_osc_inferred_clock     SB_DFFE     D       res_140[22]     20.675       -9.050
======================================================================================================



Worst Path Information
View Worst Path in Analyst
***********************


Path information for path number 1: 
      Requested Period:                      20.830
    - Setup time:                            0.155
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         20.675

    - Propagation time:                      30.232
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (critical) :                     -9.557

    Number of logic level(s):                14
    Starting point:                          cpu.lbytes[2] / Q
    Ending point:                            cpu.res[13] / D
    The start point is clocked by            top|int_osc_inferred_clock [rising] on pin C
    The end   point is clocked by            top|int_osc_inferred_clock [rising] on pin C

Instance / Net                           Pin      Pin               Arrival     No. of    
Name                         Type        Name     Dir     Delay     Time        Fan Out(s)
------------------------------------------------------------------------------------------
cpu.lbytes[2]                SB_DFFE     Q        Out     0.796     0.796       -         
lbytes[2]                    Net         -        -       1.599     -           4         
cpu.sbytes_RNI69CE[2]        SB_LUT4     I0       In      -         2.395       -         
cpu.sbytes_RNI69CE[2]        SB_LUT4     O        Out     0.661     3.056       -         
inst10_3                     Net         -        -       1.371     -           1         
cpu.lbytes_RNI1MIU[1]        SB_LUT4     I0       In      -         4.427       -         
cpu.lbytes_RNI1MIU[1]        SB_LUT4     O        Out     0.661     5.089       -         
inst10                       Net         -        -       1.371     -           58        
cpu.extaddr_RNI2K8J1[3]      SB_LUT4     I1       In      -         6.460       -         
cpu.extaddr_RNI2K8J1[3]      SB_LUT4     O        Out     0.589     7.049       -         
addrout_c[3]                 Net         -        -       1.371     -           47        
prog.data_1_7_0_.m64         SB_LUT4     I1       In      -         8.420       -         
prog.data_1_7_0_.m64         SB_LUT4     O        Out     0.589     9.009       -         
m64                          Net         -        -       1.371     -           2         
prog.data_1_7_0_.m129_am     SB_LUT4     I1       In      -         10.380      -         
prog.data_1_7_0_.m129_am     SB_LUT4     O        Out     0.589     10.970      -         
m129_am                      Net         -        -       1.371     -           1         
prog.data_1_7_0_.m134_ns     SB_LUT4     I0       In      -         12.341      -         
prog.data_1_7_0_.m134_ns     SB_LUT4     O        Out     0.661     13.002      -         
m134_ns                      Net         -        -       1.371     -           1         
prog.data_1_7_0_.m141        SB_LUT4     I1       In      -         14.373      -         
prog.data_1_7_0_.m141        SB_LUT4     O        Out     0.589     14.962      -         
m141                         Net         -        -       1.371     -           2         
prog.data_1_7_0_.m146        SB_LUT4     I1       In      -         16.333      -         
prog.data_1_7_0_.m146        SB_LUT4     O        Out     0.589     16.922      -         
data[5]                      Net         -        -       1.371     -           11        
cpu.res_RNO_30[13]           SB_LUT4     I2       In      -         18.293      -         
cpu.res_RNO_30[13]           SB_LUT4     O        Out     0.558     18.852      -         
res_19[13]                   Net         -        -       1.371     -           1         
cpu.res_RNO_22[13]           SB_LUT4     I0       In      -         20.223      -         
cpu.res_RNO_22[13]           SB_LUT4     O        Out     0.661     20.884      -         
res_RNO_22[13]               Net         -        -       1.371     -           1         
cpu.res_RNO_13[13]           SB_LUT4     I0       In      -         22.255      -         
cpu.res_RNO_13[13]           SB_LUT4     O        Out     0.661     22.917      -         
N_1382                       Net         -        -       1.371     -           1         
cpu.res_RNO_7[13]            SB_LUT4     I0       In      -         24.288      -         
cpu.res_RNO_7[13]            SB_LUT4     O        Out     0.661     24.949      -         
N_4080                       Net         -        -       1.371     -           1         
cpu.res_RNO_2[13]            SB_LUT4     I0       In      -         26.320      -         
cpu.res_RNO_2[13]            SB_LUT4     O        Out     0.569     26.889      -         
res_140_u_1[13]              Net         -        -       1.371     -           1         
cpu.res_RNO[13]              SB_LUT4     I3       In      -         28.260      -         
cpu.res_RNO[13]              SB_LUT4     O        Out     0.465     28.725      -         
res_140[13]                  Net         -        -       1.507     -           1         
cpu.res[13]                  SB_DFFE     D        In      -         30.232      -         
==========================================================================================
Total path delay (propagation time + setup) of 30.387 is 9.458(31.1%) logic and 20.929(68.9%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value


Path information for path number 2: 
      Requested Period:                      20.830
    - Setup time:                            0.155
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         20.675

    - Propagation time:                      30.232
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (critical) :                     -9.557

    Number of logic level(s):                14
    Starting point:                          cpu.lbytes[2] / Q
    Ending point:                            cpu.res[12] / D
    The start point is clocked by            top|int_osc_inferred_clock [rising] on pin C
    The end   point is clocked by            top|int_osc_inferred_clock [rising] on pin C

Instance / Net                           Pin      Pin               Arrival     No. of    
Name                         Type        Name     Dir     Delay     Time        Fan Out(s)
------------------------------------------------------------------------------------------
cpu.lbytes[2]                SB_DFFE     Q        Out     0.796     0.796       -         
lbytes[2]                    Net         -        -       1.599     -           4         
cpu.sbytes_RNI69CE[2]        SB_LUT4     I0       In      -         2.395       -         
cpu.sbytes_RNI69CE[2]        SB_LUT4     O        Out     0.661     3.056       -         
inst10_3                     Net         -        -       1.371     -           1         
cpu.lbytes_RNI1MIU[1]        SB_LUT4     I0       In      -         4.427       -         
cpu.lbytes_RNI1MIU[1]        SB_LUT4     O        Out     0.661     5.089       -         
inst10                       Net         -        -       1.371     -           58        
cpu.pc_fast_RNI9LKN1[0]      SB_LUT4     I1       In      -         6.460       -         
cpu.pc_fast_RNI9LKN1[0]      SB_LUT4     O        Out     0.589     7.049       -         
addrout_c[0]                 Net         -        -       1.371     -           50        
prog.data_1_7_0_.m107        SB_LUT4     I0       In      -         8.420       -         
prog.data_1_7_0_.m107        SB_LUT4     O        Out     0.661     9.082       -         
m107                         Net         -        -       1.371     -           2         
prog.data_1_7_0_.m113_am     SB_LUT4     I1       In      -         10.453      -         
prog.data_1_7_0_.m113_am     SB_LUT4     O        Out     0.589     11.042      -         
m113_am                      Net         -        -       1.371     -           1         
prog.data_1_7_0_.m113_ns     SB_LUT4     I0       In      -         12.413      -         
prog.data_1_7_0_.m113_ns     SB_LUT4     O        Out     0.661     13.074      -         
m113_ns                      Net         -        -       1.371     -           1         
prog.data_1_7_0_.m120        SB_LUT4     I1       In      -         14.445      -         
prog.data_1_7_0_.m120        SB_LUT4     O        Out     0.589     15.035      -         
m120                         Net         -        -       1.371     -           1         
prog.data_1_7_0_.m125        SB_LUT4     I1       In      -         16.405      -         
prog.data_1_7_0_.m125        SB_LUT4     O        Out     0.589     16.995      -         
data[4]                      Net         -        -       1.371     -           12        
cpu.res_RNO_30[12]           SB_LUT4     I2       In      -         18.366      -         
cpu.res_RNO_30[12]           SB_LUT4     O        Out     0.558     18.924      -         
res_19[12]                   Net         -        -       1.371     -           1         
cpu.res_RNO_25[12]           SB_LUT4     I0       In      -         20.295      -         
cpu.res_RNO_25[12]           SB_LUT4     O        Out     0.661     20.956      -         
N_630                        Net         -        -       1.371     -           1         
cpu.res_RNO_14[12]           SB_LUT4     I1       In      -         22.327      -         
cpu.res_RNO_14[12]           SB_LUT4     O        Out     0.589     22.917      -         
N_1381                       Net         -        -       1.371     -           1         
cpu.res_RNO_7[12]            SB_LUT4     I0       In      -         24.288      -         
cpu.res_RNO_7[12]            SB_LUT4     O        Out     0.661     24.949      -         
res_RNO_7[12]                Net         -        -       1.371     -           1         
cpu.res_RNO_2[12]            SB_LUT4     I0       In      -         26.320      -         
cpu.res_RNO_2[12]            SB_LUT4     O        Out     0.569     26.889      -         
res_140_u_ns_1[12]           Net         -        -       1.371     -           1         
cpu.res_RNO[12]              SB_LUT4     I3       In      -         28.260      -         
cpu.res_RNO[12]              SB_LUT4     O        Out     0.465     28.725      -         
res_140[12]                  Net         -        -       1.507     -           1         
cpu.res[12]                  SB_DFFE     D        In      -         30.232      -         
==========================================================================================
Total path delay (propagation time + setup) of 30.387 is 9.458(31.1%) logic and 20.929(68.9%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value


Path information for path number 3: 
      Requested Period:                      20.830
    - Setup time:                            0.155
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         20.675

    - Propagation time:                      30.211
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (non-critical) :                 -9.536

    Number of logic level(s):                14
    Starting point:                          cpu.lbytes[2] / Q
    Ending point:                            cpu.res[13] / D
    The start point is clocked by            top|int_osc_inferred_clock [rising] on pin C
    The end   point is clocked by            top|int_osc_inferred_clock [rising] on pin C

Instance / Net                           Pin      Pin               Arrival     No. of    
Name                         Type        Name     Dir     Delay     Time        Fan Out(s)
------------------------------------------------------------------------------------------
cpu.lbytes[2]                SB_DFFE     Q        Out     0.796     0.796       -         
lbytes[2]                    Net         -        -       1.599     -           4         
cpu.sbytes_RNI69CE[2]        SB_LUT4     I0       In      -         2.395       -         
cpu.sbytes_RNI69CE[2]        SB_LUT4     O        Out     0.661     3.056       -         
inst10_3                     Net         -        -       1.371     -           1         
cpu.lbytes_RNI1MIU[1]        SB_LUT4     I0       In      -         4.427       -         
cpu.lbytes_RNI1MIU[1]        SB_LUT4     O        Out     0.661     5.089       -         
inst10                       Net         -        -       1.371     -           58        
cpu.pc_fast_RNI9LKN1[0]      SB_LUT4     I1       In      -         6.460       -         
cpu.pc_fast_RNI9LKN1[0]      SB_LUT4     O        Out     0.589     7.049       -         
addrout_c[0]                 Net         -        -       1.371     -           50        
prog.data_1_7_0_.m64         SB_LUT4     I0       In      -         8.420       -         
prog.data_1_7_0_.m64         SB_LUT4     O        Out     0.569     8.989       -         
m64                          Net         -        -       1.371     -           2         
prog.data_1_7_0_.m129_am     SB_LUT4     I1       In      -         10.360      -         
prog.data_1_7_0_.m129_am     SB_LUT4     O        Out     0.589     10.949      -         
m129_am                      Net         -        -       1.371     -           1         
prog.data_1_7_0_.m134_ns     SB_LUT4     I0       In      -         12.320      -         
prog.data_1_7_0_.m134_ns     SB_LUT4     O        Out     0.661     12.981      -         
m134_ns                      Net         -        -       1.371     -           1         
prog.data_1_7_0_.m141        SB_LUT4     I1       In      -         14.352      -         
prog.data_1_7_0_.m141        SB_LUT4     O        Out     0.589     14.942      -         
m141                         Net         -        -       1.371     -           2         
prog.data_1_7_0_.m146        SB_LUT4     I1       In      -         16.312      -         
prog.data_1_7_0_.m146        SB_LUT4     O        Out     0.589     16.902      -         
data[5]                      Net         -        -       1.371     -           11        
cpu.res_RNO_30[13]           SB_LUT4     I2       In      -         18.273      -         
cpu.res_RNO_30[13]           SB_LUT4     O        Out     0.558     18.831      -         
res_19[13]                   Net         -        -       1.371     -           1         
cpu.res_RNO_22[13]           SB_LUT4     I0       In      -         20.202      -         
cpu.res_RNO_22[13]           SB_LUT4     O        Out     0.661     20.863      -         
res_RNO_22[13]               Net         -        -       1.371     -           1         
cpu.res_RNO_13[13]           SB_LUT4     I0       In      -         22.234      -         
cpu.res_RNO_13[13]           SB_LUT4     O        Out     0.661     22.896      -         
N_1382                       Net         -        -       1.371     -           1         
cpu.res_RNO_7[13]            SB_LUT4     I0       In      -         24.267      -         
cpu.res_RNO_7[13]            SB_LUT4     O        Out     0.661     24.928      -         
N_4080                       Net         -        -       1.371     -           1         
cpu.res_RNO_2[13]            SB_LUT4     I0       In      -         26.299      -         
cpu.res_RNO_2[13]            SB_LUT4     O        Out     0.569     26.868      -         
res_140_u_1[13]              Net         -        -       1.371     -           1         
cpu.res_RNO[13]              SB_LUT4     I3       In      -         28.239      -         
cpu.res_RNO[13]              SB_LUT4     O        Out     0.465     28.704      -         
res_140[13]                  Net         -        -       1.507     -           1         
cpu.res[13]                  SB_DFFE     D        In      -         30.211      -         
==========================================================================================
Total path delay (propagation time + setup) of 30.366 is 9.437(31.1%) logic and 20.929(68.9%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value


Path information for path number 4: 
      Requested Period:                      20.830
    - Setup time:                            0.155
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         20.675

    - Propagation time:                      30.201
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (non-critical) :                 -9.526

    Number of logic level(s):                14
    Starting point:                          cpu.lbytes[2] / Q
    Ending point:                            cpu.res[12] / D
    The start point is clocked by            top|int_osc_inferred_clock [rising] on pin C
    The end   point is clocked by            top|int_osc_inferred_clock [rising] on pin C

Instance / Net                           Pin      Pin               Arrival     No. of    
Name                         Type        Name     Dir     Delay     Time        Fan Out(s)
------------------------------------------------------------------------------------------
cpu.lbytes[2]                SB_DFFE     Q        Out     0.796     0.796       -         
lbytes[2]                    Net         -        -       1.599     -           4         
cpu.sbytes_RNI69CE[2]        SB_LUT4     I0       In      -         2.395       -         
cpu.sbytes_RNI69CE[2]        SB_LUT4     O        Out     0.661     3.056       -         
inst10_3                     Net         -        -       1.371     -           1         
cpu.lbytes_RNI1MIU[1]        SB_LUT4     I0       In      -         4.427       -         
cpu.lbytes_RNI1MIU[1]        SB_LUT4     O        Out     0.661     5.089       -         
inst10                       Net         -        -       1.371     -           58        
cpu.pc_fast_RNI9LKN1[0]      SB_LUT4     I1       In      -         6.460       -         
cpu.pc_fast_RNI9LKN1[0]      SB_LUT4     O        Out     0.589     7.049       -         
addrout_c[0]                 Net         -        -       1.371     -           50        
prog.data_1_7_0_.m109        SB_LUT4     I0       In      -         8.420       -         
prog.data_1_7_0_.m109        SB_LUT4     O        Out     0.661     9.082       -         
m109                         Net         -        -       1.371     -           1         
prog.data_1_7_0_.m113_am     SB_LUT4     I2       In      -         10.453      -         
prog.data_1_7_0_.m113_am     SB_LUT4     O        Out     0.558     11.011      -         
m113_am                      Net         -        -       1.371     -           1         
prog.data_1_7_0_.m113_ns     SB_LUT4     I0       In      -         12.382      -         
prog.data_1_7_0_.m113_ns     SB_LUT4     O        Out     0.661     13.043      -         
m113_ns                      Net         -        -       1.371     -           1         
prog.data_1_7_0_.m120        SB_LUT4     I1       In      -         14.414      -         
prog.data_1_7_0_.m120        SB_LUT4     O        Out     0.589     15.003      -         
m120                         Net         -        -       1.371     -           1         
prog.data_1_7_0_.m125        SB_LUT4     I1       In      -         16.374      -         
prog.data_1_7_0_.m125        SB_LUT4     O        Out     0.589     16.964      -         
data[4]                      Net         -        -       1.371     -           12        
cpu.res_RNO_30[12]           SB_LUT4     I2       In      -         18.335      -         
cpu.res_RNO_30[12]           SB_LUT4     O        Out     0.558     18.893      -         
res_19[12]                   Net         -        -       1.371     -           1         
cpu.res_RNO_25[12]           SB_LUT4     I0       In      -         20.264      -         
cpu.res_RNO_25[12]           SB_LUT4     O        Out     0.661     20.925      -         
N_630                        Net         -        -       1.371     -           1         
cpu.res_RNO_14[12]           SB_LUT4     I1       In      -         22.296      -         
cpu.res_RNO_14[12]           SB_LUT4     O        Out     0.589     22.885      -         
N_1381                       Net         -        -       1.371     -           1         
cpu.res_RNO_7[12]            SB_LUT4     I0       In      -         24.256      -         
cpu.res_RNO_7[12]            SB_LUT4     O        Out     0.661     24.918      -         
res_RNO_7[12]                Net         -        -       1.371     -           1         
cpu.res_RNO_2[12]            SB_LUT4     I0       In      -         26.289      -         
cpu.res_RNO_2[12]            SB_LUT4     O        Out     0.569     26.857      -         
res_140_u_ns_1[12]           Net         -        -       1.371     -           1         
cpu.res_RNO[12]              SB_LUT4     I3       In      -         28.228      -         
cpu.res_RNO[12]              SB_LUT4     O        Out     0.465     28.694      -         
res_140[12]                  Net         -        -       1.507     -           1         
cpu.res[12]                  SB_DFFE     D        In      -         30.201      -         
==========================================================================================
Total path delay (propagation time + setup) of 30.356 is 9.427(31.1%) logic and 20.929(68.9%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value


Path information for path number 5: 
      Requested Period:                      20.830
    - Setup time:                            0.155
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         20.675

    - Propagation time:                      30.180
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (non-critical) :                 -9.505

    Number of logic level(s):                14
    Starting point:                          cpu.lbytes[2] / Q
    Ending point:                            cpu.res[13] / D
    The start point is clocked by            top|int_osc_inferred_clock [rising] on pin C
    The end   point is clocked by            top|int_osc_inferred_clock [rising] on pin C

Instance / Net                             Pin      Pin               Arrival     No. of    
Name                           Type        Name     Dir     Delay     Time        Fan Out(s)
--------------------------------------------------------------------------------------------
cpu.lbytes[2]                  SB_DFFE     Q        Out     0.796     0.796       -         
lbytes[2]                      Net         -        -       1.599     -           4         
cpu.sbytes_RNI69CE[2]          SB_LUT4     I0       In      -         2.395       -         
cpu.sbytes_RNI69CE[2]          SB_LUT4     O        Out     0.661     3.056       -         
inst10_3                       Net         -        -       1.371     -           1         
cpu.lbytes_RNI1MIU[1]          SB_LUT4     I0       In      -         4.427       -         
cpu.lbytes_RNI1MIU[1]          SB_LUT4     O        Out     0.661     5.089       -         
inst10                         Net         -        -       1.371     -           58        
cpu.pc_fast_RNI9LKN1[0]        SB_LUT4     I1       In      -         6.460       -         
cpu.pc_fast_RNI9LKN1[0]        SB_LUT4     O        Out     0.589     7.049       -         
addrout_c[0]                   Net         -        -       1.371     -           50        
prog.data_1_7_0_.m129_bm       SB_LUT4     I0       In      -         8.420       -         
prog.data_1_7_0_.m129_bm       SB_LUT4     O        Out     0.661     9.082       -         
m129_bm                        Net         -        -       1.371     -           1         
prog.data_1_7_0_.m134_ns_1     SB_LUT4     I0       In      -         10.453      -         
prog.data_1_7_0_.m134_ns_1     SB_LUT4     O        Out     0.661     11.114      -         
m134_ns_1                      Net         -        -       1.371     -           1         
prog.data_1_7_0_.m134_ns       SB_LUT4     I3       In      -         12.485      -         
prog.data_1_7_0_.m134_ns       SB_LUT4     O        Out     0.465     12.950      -         
m134_ns                        Net         -        -       1.371     -           1         
prog.data_1_7_0_.m141          SB_LUT4     I1       In      -         14.321      -         
prog.data_1_7_0_.m141          SB_LUT4     O        Out     0.589     14.910      -         
m141                           Net         -        -       1.371     -           2         
prog.data_1_7_0_.m146          SB_LUT4     I1       In      -         16.281      -         
prog.data_1_7_0_.m146          SB_LUT4     O        Out     0.589     16.871      -         
data[5]                        Net         -        -       1.371     -           11        
cpu.res_RNO_30[13]             SB_LUT4     I2       In      -         18.242      -         
cpu.res_RNO_30[13]             SB_LUT4     O        Out     0.558     18.800      -         
res_19[13]                     Net         -        -       1.371     -           1         
cpu.res_RNO_22[13]             SB_LUT4     I0       In      -         20.171      -         
cpu.res_RNO_22[13]             SB_LUT4     O        Out     0.661     20.832      -         
res_RNO_22[13]                 Net         -        -       1.371     -           1         
cpu.res_RNO_13[13]             SB_LUT4     I0       In      -         22.203      -         
cpu.res_RNO_13[13]             SB_LUT4     O        Out     0.661     22.865      -         
N_1382                         Net         -        -       1.371     -           1         
cpu.res_RNO_7[13]              SB_LUT4     I0       In      -         24.236      -         
cpu.res_RNO_7[13]              SB_LUT4     O        Out     0.661     24.897      -         
N_4080                         Net         -        -       1.371     -           1         
cpu.res_RNO_2[13]              SB_LUT4     I0       In      -         26.268      -         
cpu.res_RNO_2[13]              SB_LUT4     O        Out     0.569     26.837      -         
res_140_u_1[13]                Net         -        -       1.371     -           1         
cpu.res_RNO[13]                SB_LUT4     I3       In      -         28.208      -         
cpu.res_RNO[13]                SB_LUT4     O        Out     0.465     28.673      -         
res_140[13]                    Net         -        -       1.507     -           1         
cpu.res[13]                    SB_DFFE     D        In      -         30.180      -         
============================================================================================
Total path delay (propagation time + setup) of 30.335 is 9.406(31.0%) logic and 20.929(69.0%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value



##### END OF TIMING REPORT #####]

Timing exceptions that could not be applied
None

Finished final timing analysis (Real Time elapsed 0h:00m:13s; CPU Time elapsed 0h:00m:13s; Memory used current: 187MB peak: 229MB)


Finished timing report (Real Time elapsed 0h:00m:13s; CPU Time elapsed 0h:00m:13s; Memory used current: 187MB peak: 229MB)

---------------------------------------
Resource Usage Report for top 

Mapping to part: ice40up5ksg48
Cell usage:
GND             2 uses
SB_CARRY        310 uses
SB_DFF          39 uses
SB_DFFE         297 uses
SB_GB           5 uses
SB_HFOSC        1 use
SB_RAM256x16    4 uses
SB_RGBA_DRV     1 use
VCC             2 uses
SB_LUT4         2183 uses

I/O ports: 28
I/O primitives: 25
SB_IO          25 uses

I/O Register bits:                  0
Register bits not including I/Os:   336 (6%)

RAM/ROM usage summary
Block Rams : 4 of 30 (13%)

Total load per clock:
   top|int_osc_inferred_clock: 336
   top|frequency_counter_i_derived_clock[23]: 9

@S |Mapping Summary:
Total  LUTs: 2183 (41%)

Distribution of All Consumed LUTs = LUT4 
Distribution of All Consumed Luts 2183 = 2183 

Mapper successful!

At Mapper Exit (Real Time elapsed 0h:00m:13s; CPU Time elapsed 0h:00m:13s; Memory used current: 34MB peak: 229MB)

Process took 0h:00m:13s realtime, 0h:00m:13s cputime
# Wed Dec 12 21:48:26 2018

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