The SCPC88 board contains the 8088 processor, an optional 8087 maths coprocessor, 256k of DRAM, two EPROM sockets, a gate array which performs all the functions of the PC support logic, and an STEbus interface.
The 14.318 MHz crystal provides the master clock for the FE2010A LSI logic IC, and is also divided down to drive the 4.77 or 7.16 MHz clock of the 8088 CPU. The FE2010A contains a 18284-compatible clock generator, an 8237A-compatible DMA controller, an 8288-compatible bus controller, an 8259A interrupt controller, an 8253 timer, memory controls, keyboard port, 8255-compatible I/O port, loudspeaker port, and DRAM control signal interface.
IC2-6 buffer the STEbus signals.
IC1 is the DRAM data buffer.
IC10 and IC14 are the STEbus interface PALs.
IC9 controls power-fail and resets to or from the STEbus.
IC7 accepts DATACK* and TRFERR* and also multiplexes A8 and A17 into MA8 for the DRAMs.
IC8 and IC11 multiplex A0-7 and A8-16 into MA0-7 for the DRAMs. !RAS, !CAS and row/column select SLAD are generated by the FE2010A.
IC10 is primarily an address decoder.
IC13 latches A16-19 and status signals S2 and S1.
IC14 latches the low-address (A0-7) for the EPROMs.
IC20 latches A8-A15.
IC29 is the 8088 CPU, IC30 the 8087 maths coprocessor socket (not included as standard), IC28 the BIOS EPROM, IC27 the user-EPROM socket, and IC15, 18, 20, 22, 23, 28-30 are the 256k of dynamic RAM.
The EPROMs can be 8K, 16K, 32K or 64K, and there are two links per EPROM to set the EPROM size.