top Project Status (05/03/2017 - 12:33:28) | |||
Project File: | fpga_v1.xise | Parser Errors: | No Errors |
Module Name: | top | Implementation State: | Programming File Generated |
Target Device: | xc3s200a-4vq100 |
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No Errors |
Product Version: | ISE 14.7 |
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369 Warnings (0 new) |
Design Goal: | Balanced |
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All Signals Completely Routed |
Design Strategy: | Xilinx Default (unlocked) |
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X 1 Failing Constraint |
Environment: | System Settings |
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2077 (Timing Report) |
Device Utilization Summary | [-] | ||||
Logic Utilization | Used | Available | Utilization | Note(s) | |
Number of Slice Flip Flops | 1,167 | 3,584 | 32% | ||
Number of 4 input LUTs | 1,169 | 3,584 | 32% | ||
Number of occupied Slices | 904 | 1,792 | 50% | ||
Number of Slices containing only related logic | 904 | 904 | 100% | ||
Number of Slices containing unrelated logic | 0 | 904 | 0% | ||
Total Number of 4 input LUTs | 1,179 | 3,584 | 32% | ||
Number used as logic | 1,165 | ||||
Number used as a route-thru | 10 | ||||
Number used as Shift registers | 4 | ||||
Number of bonded IOBs | 62 | 68 | 91% | ||
IOB Flip Flops | 11 | ||||
Number of BUFGMUXs | 8 | 24 | 33% | ||
Number of DCMs | 1 | 4 | 25% | ||
Number of MULT18X18SIOs | 8 | 16 | 50% | ||
Number of RAMB16BWEs | 16 | 16 | 100% | ||
Average Fanout of Non-Clock Nets | 2.50 |
Performance Summary | [-] | |||
Final Timing Score: | 2077 (Setup: 0, Hold: 2077, Component Switching Limit: 0) | Pinout Data: | Pinout Report | |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
Timing Constraints: | X 1 Failing Constraint |
Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | Current | niedz. wrz 10 10:40:38 2017 | 0 | 293 Warnings (0 new) | 1 Info (0 new) | |
Translation Report | Current | niedz. wrz 10 10:42:03 2017 | 0 | 1 Warning (0 new) | 1 Info (0 new) | |
Map Report | Current | niedz. wrz 10 10:42:47 2017 | 0 | 51 Warnings (0 new) | 9 Infos (0 new) | |
Place and Route Report | Current | niedz. wrz 10 10:43:06 2017 | 0 | 8 Warnings (0 new) | 1 Info (0 new) | |
Power Report | ||||||
Post-PAR Static Timing Report | Current | niedz. wrz 10 10:43:11 2017 | 0 | 0 | 5 Infos (0 new) | |
Bitgen Report | Current | niedz. wrz 10 10:43:21 2017 | 0 | 16 Warnings (0 new) | 1 Info (0 new) |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
WebTalk Report | Current | niedz. wrz 10 12:53:50 2017 | |
WebTalk Log File | Current | niedz. wrz 10 12:53:51 2017 |