top Project Status (05/03/2017 - 12:33:28)
Project File: fpga_v1.xise Parser Errors: No Errors
Module Name: top Implementation State: Programming File Generated
Target Device: xc3s200a-4vq100
  • Errors:
No Errors
Product Version:ISE 14.7
  • Warnings:
369 Warnings (0 new)
Design Goal: Balanced
  • Routing Results:
All Signals Completely Routed
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
X 1 Failing Constraint
Environment: System Settings
  • Final Timing Score:
2077  (Timing Report)
 
Device Utilization Summary [-]
Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops 1,167 3,584 32%  
Number of 4 input LUTs 1,169 3,584 32%  
Number of occupied Slices 904 1,792 50%  
    Number of Slices containing only related logic 904 904 100%  
    Number of Slices containing unrelated logic 0 904 0%  
Total Number of 4 input LUTs 1,179 3,584 32%  
    Number used as logic 1,165      
    Number used as a route-thru 10      
    Number used as Shift registers 4      
Number of bonded IOBs 62 68 91%  
    IOB Flip Flops 11      
Number of BUFGMUXs 8 24 33%  
Number of DCMs 1 4 25%  
Number of MULT18X18SIOs 8 16 50%  
Number of RAMB16BWEs 16 16 100%  
Average Fanout of Non-Clock Nets 2.50      
 
Performance Summary [-]
Final Timing Score: 2077 (Setup: 0, Hold: 2077, Component Switching Limit: 0) Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: X 1 Failing Constraint    
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentniedz. wrz 10 10:40:38 20170293 Warnings (0 new)1 Info (0 new)
Translation ReportCurrentniedz. wrz 10 10:42:03 201701 Warning (0 new)1 Info (0 new)
Map ReportCurrentniedz. wrz 10 10:42:47 2017051 Warnings (0 new)9 Infos (0 new)
Place and Route ReportCurrentniedz. wrz 10 10:43:06 201708 Warnings (0 new)1 Info (0 new)
Power Report     
Post-PAR Static Timing ReportCurrentniedz. wrz 10 10:43:11 2017005 Infos (0 new)
Bitgen ReportCurrentniedz. wrz 10 10:43:21 2017016 Warnings (0 new)1 Info (0 new)
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk ReportCurrentniedz. wrz 10 12:53:50 2017
WebTalk Log FileCurrentniedz. wrz 10 12:53:51 2017

Date Generated: 10/01/2017 - 11:12:16