Version 3.2 HI-TECH Software Intermediate Code
"65 structs.h
[s S443 `uc -> 6 `i `uc -> 6 `i `uc 1 `uc 1 `c 1 `ul 1 `uc 1 ]
[n S443 ui_state disp1_arr disp2_arr suffix1 suffix2 disp_format leds keys ]
"6 hardware.c
[v _ui_state `S443 ~T0 @X0 0 e ]
"1870 /opt/microchip/xc8/v1.45/include/pic16lf1509.h
[s S101 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S101 . LATA0 LATA1 LATA2 . LATA4 LATA5 ]
"1869
[u S100 `S101 1 ]
[n S100 . . ]
"1879
[v _LATAbits `VS100 ~T0 @X0 0 e@268 ]
"1954
[s S105 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S105 . LATC0 LATC1 LATC2 LATC3 LATC4 LATC5 LATC6 LATC7 ]
"1953
[u S104 `S105 1 ]
[n S104 . . ]
"1965
[v _LATCbits `VS104 ~T0 @X0 0 e@270 ]
"522
[s S35 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S35 . RC0 RC1 RC2 RC3 RC4 RC5 RC6 RC7 ]
"521
[u S34 `S35 1 ]
[n S34 . . ]
"533
[v _PORTCbits `VS34 ~T0 @X0 0 e@14 ]
"355
[s S28 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S28 . IOCIF INTF TMR0IF IOCIE INTE TMR0IE PEIE GIE ]
"365
[s S29 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ]
[n S29 . . T0IF . T0IE ]
"354
[u S27 `S28 1 `S29 1 ]
[n S27 . . . ]
"372
[v _INTCONbits `VS27 ~T0 @X0 0 e@11 ]
"76 structs.h
[s S1 `uc 1 `uc 1 `uc 1 `uc 1 `uc 1 `uc 1 ]
[n S1 config fq_sel amp_sel do_the_cal comp_open comp_short turn_off ]
"1536 /opt/microchip/xc8/v1.45/include/pic16lf1509.h
[s S82 :2 `uc 1 :1 `uc 1 :4 `uc 1 ]
[n S82 . SCS . IRCF ]
"1541
[s S83 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S83 . SCS0 SCS1 . IRCF0 IRCF1 IRCF2 IRCF3 ]
"1535
[u S81 `S82 1 `S83 1 ]
[n S81 . . . ]
"1551
[v _OSCCONbits `VS81 ~T0 @X0 0 e@153 ]
"2535
[v _ANSELA `Vuc ~T0 @X0 0 e@396 ]
"2582
[v _ANSELB `Vuc ~T0 @X0 0 e@397 ]
"2618
[v _ANSELC `Vuc ~T0 @X0 0 e@398 ]
"1134
[s S66 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S66 . TRISC0 TRISC1 TRISC2 TRISC3 TRISC4 TRISC5 TRISC6 TRISC7 ]
"1133
[u S65 `S66 1 ]
[n S65 . . ]
"1145
[v _TRISCbits `VS65 ~T0 @X0 0 e@142 ]
"1045
[s S62 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S62 . TRISA0 TRISA1 TRISA2 TRISA3 TRISA4 TRISA5 ]
"1044
[u S61 `S62 1 ]
[n S61 . . ]
"1054
[v _TRISAbits `VS61 ~T0 @X0 0 e@140 ]
"1095
[s S64 :4 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S64 . . TRISB4 TRISB5 TRISB6 TRISB7 ]
"1094
[u S63 `S64 1 ]
[n S63 . . ]
"1103
[v _TRISBbits `VS63 ~T0 @X0 0 e@141 ]
"3002
[s S162 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S162 . TX9D TRMT BRGH SENDB SYNC TXEN TX9 CSRC ]
"3001
[u S161 `S162 1 ]
[n S161 . . ]
"3013
[v _TXSTAbits `VS161 ~T0 @X0 0 e@414 ]
"2887
[v _SPBRG `Vus ~T0 @X0 0 e@411 ]
"2940
[s S160 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S160 . RX9D OERR FERR ADDEN CREN SREN RX9 SPEN ]
"2939
[u S159 `S160 1 ]
[n S159 . . ]
"2951
[v _RCSTAbits `VS159 ~T0 @X0 0 e@413 ]
"32 hardware.h
[v _leds_disp_format `(v ~T0 @X0 0 ef1`c ]
"33
[v _leds_fq_sel `(v ~T0 @X0 0 ef1`uc ]
"34
[v _leds_amp_sel `(v ~T0 @X0 0 ef1`uc ]
"1337 /opt/microchip/xc8/v1.45/include/pic16lf1509.h
[s S74 :3 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S74 . PS PSA TMR0SE TMR0CS INTEDG nWPUEN ]
"1345
[s S75 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S75 . PS0 PS1 PS2 . T0SE T0CS ]
"1336
[u S73 `S74 1 `S75 1 ]
[n S73 . . . ]
"1354
[v _OPTION_REGbits `VS73 ~T0 @X0 0 e@149 ]
"53 structs.h
[s S2 `d 1 `d 1 `d 1 `d 1 `d 1 `d 1 `d 1 `d 1 ]
[n S2 results z_real z_imag y_real y_imag z_mod z_arg y_mod y_arg ]
"584 /opt/microchip/xc8/v1.45/include/pic16lf1509.h
[s S37 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ]
[n S37 . TMR1IF TMR2IF . SSP1IF TXIF RCIF ADIF TMR1GIF ]
"583
[u S36 `S37 1 ]
[n S36 . . ]
"595
[v _PIR1bits `VS36 ~T0 @X0 0 e@17 ]
"31 hardware.h
[v _get_res_double `(d ~T0 @X0 0 ef ]
"2847 /opt/microchip/xc8/v1.45/include/pic16lf1509.h
[v _RCREG `Vuc ~T0 @X0 0 e@409 ]
"2867
[v _TXREG `Vuc ~T0 @X0 0 e@410 ]
"7 hardware.c
[v _g_shift `uc ~T0 @X0 0 e ]
[; ;stdint.h: 13: typedef signed char int8_t;
[; ;stdint.h: 20: typedef signed int int16_t;
[; ;stdint.h: 28: typedef signed short long int int24_t;
[; ;stdint.h: 36: typedef signed long int int32_t;
[; ;stdint.h: 43: typedef unsigned char uint8_t;
[; ;stdint.h: 49: typedef unsigned int uint16_t;
[; ;stdint.h: 56: typedef unsigned short long int uint24_t;
[; ;stdint.h: 63: typedef unsigned long int uint32_t;
[; ;stdint.h: 71: typedef signed char int_least8_t;
[; ;stdint.h: 78: typedef signed int int_least16_t;
[; ;stdint.h: 90: typedef signed short long int int_least24_t;
[; ;stdint.h: 98: typedef signed long int int_least32_t;
[; ;stdint.h: 105: typedef unsigned char uint_least8_t;
[; ;stdint.h: 111: typedef unsigned int uint_least16_t;
[; ;stdint.h: 121: typedef unsigned short long int uint_least24_t;
[; ;stdint.h: 128: typedef unsigned long int uint_least32_t;
[; ;stdint.h: 137: typedef signed char int_fast8_t;
[; ;stdint.h: 144: typedef signed int int_fast16_t;
[; ;stdint.h: 156: typedef signed short long int int_fast24_t;
[; ;stdint.h: 164: typedef signed long int int_fast32_t;
[; ;stdint.h: 171: typedef unsigned char uint_fast8_t;
[; ;stdint.h: 177: typedef unsigned int uint_fast16_t;
[; ;stdint.h: 187: typedef unsigned short long int uint_fast24_t;
[; ;stdint.h: 194: typedef unsigned long int uint_fast32_t;
[; ;stdint.h: 200: typedef int32_t intmax_t;
[; ;stdint.h: 205: typedef uint32_t uintmax_t;
[; ;stdint.h: 210: typedef int16_t intptr_t;
[; ;stdint.h: 215: typedef uint16_t uintptr_t;
[; ;hardware.h: 27: void init(struct config *config);
[; ;hardware.h: 28: void get_result(struct results *results);
[; ;hardware.h: 29: void send_config(struct config *config);
[; ;hardware.h: 30: void calibration(void);
[; ;hardware.h: 31: double get_res_double(void);
[; ;hardware.h: 32: void leds_disp_format(int8_t disp_format);
[; ;hardware.h: 33: void leds_fq_sel(uint8_t fq_sel);
[; ;hardware.h: 34: void leds_amp_sel(uint8_t amp_sel);
[; ;hardware.h: 35: void leds_shift(void);
[; ;htc.h: 26: extern const char __xc8_OPTIM_SPEED;
[; ;htc.h: 28: extern double __fpnormalize(double);
[; ;xc8debug.h: 14: extern void __builtin_software_breakpoint(void);
[; ;pic16lf1509.h: 50: extern volatile unsigned char INDF0 @ 0x000;
"52 /opt/microchip/xc8/v1.45/include/pic16lf1509.h
[; ;pic16lf1509.h: 52: asm("INDF0 equ 00h");
[; <" INDF0 equ 00h ;# ">
[; ;pic16lf1509.h: 55: typedef union {
[; ;pic16lf1509.h: 56: struct {
[; ;pic16lf1509.h: 57: unsigned INDF0 :8;
[; ;pic16lf1509.h: 58: };
[; ;pic16lf1509.h: 59: } INDF0bits_t;
[; ;pic16lf1509.h: 60: extern volatile INDF0bits_t INDF0bits @ 0x000;
[; ;pic16lf1509.h: 70: extern volatile unsigned char INDF1 @ 0x001;
"72
[; ;pic16lf1509.h: 72: asm("INDF1 equ 01h");
[; <" INDF1 equ 01h ;# ">
[; ;pic16lf1509.h: 75: typedef union {
[; ;pic16lf1509.h: 76: struct {
[; ;pic16lf1509.h: 77: unsigned INDF1 :8;
[; ;pic16lf1509.h: 78: };
[; ;pic16lf1509.h: 79: } INDF1bits_t;
[; ;pic16lf1509.h: 80: extern volatile INDF1bits_t INDF1bits @ 0x001;
[; ;pic16lf1509.h: 90: extern volatile unsigned char PCL @ 0x002;
"92
[; ;pic16lf1509.h: 92: asm("PCL equ 02h");
[; <" PCL equ 02h ;# ">
[; ;pic16lf1509.h: 95: typedef union {
[; ;pic16lf1509.h: 96: struct {
[; ;pic16lf1509.h: 97: unsigned PCL :8;
[; ;pic16lf1509.h: 98: };
[; ;pic16lf1509.h: 99: } PCLbits_t;
[; ;pic16lf1509.h: 100: extern volatile PCLbits_t PCLbits @ 0x002;
[; ;pic16lf1509.h: 110: extern volatile unsigned char STATUS @ 0x003;
"112
[; ;pic16lf1509.h: 112: asm("STATUS equ 03h");
[; <" STATUS equ 03h ;# ">
[; ;pic16lf1509.h: 115: typedef union {
[; ;pic16lf1509.h: 116: struct {
[; ;pic16lf1509.h: 117: unsigned C :1;
[; ;pic16lf1509.h: 118: unsigned DC :1;
[; ;pic16lf1509.h: 119: unsigned Z :1;
[; ;pic16lf1509.h: 120: unsigned nPD :1;
[; ;pic16lf1509.h: 121: unsigned nTO :1;
[; ;pic16lf1509.h: 122: };
[; ;pic16lf1509.h: 123: struct {
[; ;pic16lf1509.h: 124: unsigned CARRY :1;
[; ;pic16lf1509.h: 125: unsigned :1;
[; ;pic16lf1509.h: 126: unsigned ZERO :1;
[; ;pic16lf1509.h: 127: };
[; ;pic16lf1509.h: 128: } STATUSbits_t;
[; ;pic16lf1509.h: 129: extern volatile STATUSbits_t STATUSbits @ 0x003;
[; ;pic16lf1509.h: 169: extern volatile unsigned short FSR0 @ 0x004;
[; ;pic16lf1509.h: 173: extern volatile unsigned char FSR0L @ 0x004;
"175
[; ;pic16lf1509.h: 175: asm("FSR0L equ 04h");
[; <" FSR0L equ 04h ;# ">
[; ;pic16lf1509.h: 178: typedef union {
[; ;pic16lf1509.h: 179: struct {
[; ;pic16lf1509.h: 180: unsigned FSR0L :8;
[; ;pic16lf1509.h: 181: };
[; ;pic16lf1509.h: 182: } FSR0Lbits_t;
[; ;pic16lf1509.h: 183: extern volatile FSR0Lbits_t FSR0Lbits @ 0x004;
[; ;pic16lf1509.h: 193: extern volatile unsigned char FSR0H @ 0x005;
"195
[; ;pic16lf1509.h: 195: asm("FSR0H equ 05h");
[; <" FSR0H equ 05h ;# ">
[; ;pic16lf1509.h: 198: typedef union {
[; ;pic16lf1509.h: 199: struct {
[; ;pic16lf1509.h: 200: unsigned FSR0H :8;
[; ;pic16lf1509.h: 201: };
[; ;pic16lf1509.h: 202: } FSR0Hbits_t;
[; ;pic16lf1509.h: 203: extern volatile FSR0Hbits_t FSR0Hbits @ 0x005;
[; ;pic16lf1509.h: 213: extern volatile unsigned short FSR1 @ 0x006;
[; ;pic16lf1509.h: 217: extern volatile unsigned char FSR1L @ 0x006;
"219
[; ;pic16lf1509.h: 219: asm("FSR1L equ 06h");
[; <" FSR1L equ 06h ;# ">
[; ;pic16lf1509.h: 222: typedef union {
[; ;pic16lf1509.h: 223: struct {
[; ;pic16lf1509.h: 224: unsigned FSR1L :8;
[; ;pic16lf1509.h: 225: };
[; ;pic16lf1509.h: 226: } FSR1Lbits_t;
[; ;pic16lf1509.h: 227: extern volatile FSR1Lbits_t FSR1Lbits @ 0x006;
[; ;pic16lf1509.h: 237: extern volatile unsigned char FSR1H @ 0x007;
"239
[; ;pic16lf1509.h: 239: asm("FSR1H equ 07h");
[; <" FSR1H equ 07h ;# ">
[; ;pic16lf1509.h: 242: typedef union {
[; ;pic16lf1509.h: 243: struct {
[; ;pic16lf1509.h: 244: unsigned FSR1H :8;
[; ;pic16lf1509.h: 245: };
[; ;pic16lf1509.h: 246: } FSR1Hbits_t;
[; ;pic16lf1509.h: 247: extern volatile FSR1Hbits_t FSR1Hbits @ 0x007;
[; ;pic16lf1509.h: 257: extern volatile unsigned char BSR @ 0x008;
"259
[; ;pic16lf1509.h: 259: asm("BSR equ 08h");
[; <" BSR equ 08h ;# ">
[; ;pic16lf1509.h: 262: typedef union {
[; ;pic16lf1509.h: 263: struct {
[; ;pic16lf1509.h: 264: unsigned BSR :5;
[; ;pic16lf1509.h: 265: };
[; ;pic16lf1509.h: 266: struct {
[; ;pic16lf1509.h: 267: unsigned BSR0 :1;
[; ;pic16lf1509.h: 268: unsigned BSR1 :1;
[; ;pic16lf1509.h: 269: unsigned BSR2 :1;
[; ;pic16lf1509.h: 270: unsigned BSR3 :1;
[; ;pic16lf1509.h: 271: unsigned BSR4 :1;
[; ;pic16lf1509.h: 272: };
[; ;pic16lf1509.h: 273: } BSRbits_t;
[; ;pic16lf1509.h: 274: extern volatile BSRbits_t BSRbits @ 0x008;
[; ;pic16lf1509.h: 309: extern volatile unsigned char WREG @ 0x009;
"311
[; ;pic16lf1509.h: 311: asm("WREG equ 09h");
[; <" WREG equ 09h ;# ">
[; ;pic16lf1509.h: 314: typedef union {
[; ;pic16lf1509.h: 315: struct {
[; ;pic16lf1509.h: 316: unsigned WREG0 :8;
[; ;pic16lf1509.h: 317: };
[; ;pic16lf1509.h: 318: } WREGbits_t;
[; ;pic16lf1509.h: 319: extern volatile WREGbits_t WREGbits @ 0x009;
[; ;pic16lf1509.h: 329: extern volatile unsigned char PCLATH @ 0x00A;
"331
[; ;pic16lf1509.h: 331: asm("PCLATH equ 0Ah");
[; <" PCLATH equ 0Ah ;# ">
[; ;pic16lf1509.h: 334: typedef union {
[; ;pic16lf1509.h: 335: struct {
[; ;pic16lf1509.h: 336: unsigned PCLATH :7;
[; ;pic16lf1509.h: 337: };
[; ;pic16lf1509.h: 338: } PCLATHbits_t;
[; ;pic16lf1509.h: 339: extern volatile PCLATHbits_t PCLATHbits @ 0x00A;
[; ;pic16lf1509.h: 349: extern volatile unsigned char INTCON @ 0x00B;
"351
[; ;pic16lf1509.h: 351: asm("INTCON equ 0Bh");
[; <" INTCON equ 0Bh ;# ">
[; ;pic16lf1509.h: 354: typedef union {
[; ;pic16lf1509.h: 355: struct {
[; ;pic16lf1509.h: 356: unsigned IOCIF :1;
[; ;pic16lf1509.h: 357: unsigned INTF :1;
[; ;pic16lf1509.h: 358: unsigned TMR0IF :1;
[; ;pic16lf1509.h: 359: unsigned IOCIE :1;
[; ;pic16lf1509.h: 360: unsigned INTE :1;
[; ;pic16lf1509.h: 361: unsigned TMR0IE :1;
[; ;pic16lf1509.h: 362: unsigned PEIE :1;
[; ;pic16lf1509.h: 363: unsigned GIE :1;
[; ;pic16lf1509.h: 364: };
[; ;pic16lf1509.h: 365: struct {
[; ;pic16lf1509.h: 366: unsigned :2;
[; ;pic16lf1509.h: 367: unsigned T0IF :1;
[; ;pic16lf1509.h: 368: unsigned :2;
[; ;pic16lf1509.h: 369: unsigned T0IE :1;
[; ;pic16lf1509.h: 370: };
[; ;pic16lf1509.h: 371: } INTCONbits_t;
[; ;pic16lf1509.h: 372: extern volatile INTCONbits_t INTCONbits @ 0x00B;
[; ;pic16lf1509.h: 427: extern volatile unsigned char PORTA @ 0x00C;
"429
[; ;pic16lf1509.h: 429: asm("PORTA equ 0Ch");
[; <" PORTA equ 0Ch ;# ">
[; ;pic16lf1509.h: 432: typedef union {
[; ;pic16lf1509.h: 433: struct {
[; ;pic16lf1509.h: 434: unsigned RA0 :1;
[; ;pic16lf1509.h: 435: unsigned RA1 :1;
[; ;pic16lf1509.h: 436: unsigned RA2 :1;
[; ;pic16lf1509.h: 437: unsigned RA3 :1;
[; ;pic16lf1509.h: 438: unsigned RA4 :1;
[; ;pic16lf1509.h: 439: unsigned RA5 :1;
[; ;pic16lf1509.h: 440: };
[; ;pic16lf1509.h: 441: } PORTAbits_t;
[; ;pic16lf1509.h: 442: extern volatile PORTAbits_t PORTAbits @ 0x00C;
[; ;pic16lf1509.h: 477: extern volatile unsigned char PORTB @ 0x00D;
"479
[; ;pic16lf1509.h: 479: asm("PORTB equ 0Dh");
[; <" PORTB equ 0Dh ;# ">
[; ;pic16lf1509.h: 482: typedef union {
[; ;pic16lf1509.h: 483: struct {
[; ;pic16lf1509.h: 484: unsigned :4;
[; ;pic16lf1509.h: 485: unsigned RB4 :1;
[; ;pic16lf1509.h: 486: unsigned RB5 :1;
[; ;pic16lf1509.h: 487: unsigned RB6 :1;
[; ;pic16lf1509.h: 488: unsigned RB7 :1;
[; ;pic16lf1509.h: 489: };
[; ;pic16lf1509.h: 490: } PORTBbits_t;
[; ;pic16lf1509.h: 491: extern volatile PORTBbits_t PORTBbits @ 0x00D;
[; ;pic16lf1509.h: 516: extern volatile unsigned char PORTC @ 0x00E;
"518
[; ;pic16lf1509.h: 518: asm("PORTC equ 0Eh");
[; <" PORTC equ 0Eh ;# ">
[; ;pic16lf1509.h: 521: typedef union {
[; ;pic16lf1509.h: 522: struct {
[; ;pic16lf1509.h: 523: unsigned RC0 :1;
[; ;pic16lf1509.h: 524: unsigned RC1 :1;
[; ;pic16lf1509.h: 525: unsigned RC2 :1;
[; ;pic16lf1509.h: 526: unsigned RC3 :1;
[; ;pic16lf1509.h: 527: unsigned RC4 :1;
[; ;pic16lf1509.h: 528: unsigned RC5 :1;
[; ;pic16lf1509.h: 529: unsigned RC6 :1;
[; ;pic16lf1509.h: 530: unsigned RC7 :1;
[; ;pic16lf1509.h: 531: };
[; ;pic16lf1509.h: 532: } PORTCbits_t;
[; ;pic16lf1509.h: 533: extern volatile PORTCbits_t PORTCbits @ 0x00E;
[; ;pic16lf1509.h: 578: extern volatile unsigned char PIR1 @ 0x011;
"580
[; ;pic16lf1509.h: 580: asm("PIR1 equ 011h");
[; <" PIR1 equ 011h ;# ">
[; ;pic16lf1509.h: 583: typedef union {
[; ;pic16lf1509.h: 584: struct {
[; ;pic16lf1509.h: 585: unsigned TMR1IF :1;
[; ;pic16lf1509.h: 586: unsigned TMR2IF :1;
[; ;pic16lf1509.h: 587: unsigned :1;
[; ;pic16lf1509.h: 588: unsigned SSP1IF :1;
[; ;pic16lf1509.h: 589: unsigned TXIF :1;
[; ;pic16lf1509.h: 590: unsigned RCIF :1;
[; ;pic16lf1509.h: 591: unsigned ADIF :1;
[; ;pic16lf1509.h: 592: unsigned TMR1GIF :1;
[; ;pic16lf1509.h: 593: };
[; ;pic16lf1509.h: 594: } PIR1bits_t;
[; ;pic16lf1509.h: 595: extern volatile PIR1bits_t PIR1bits @ 0x011;
[; ;pic16lf1509.h: 635: extern volatile unsigned char PIR2 @ 0x012;
"637
[; ;pic16lf1509.h: 637: asm("PIR2 equ 012h");
[; <" PIR2 equ 012h ;# ">
[; ;pic16lf1509.h: 640: typedef union {
[; ;pic16lf1509.h: 641: struct {
[; ;pic16lf1509.h: 642: unsigned :2;
[; ;pic16lf1509.h: 643: unsigned NCO1IF :1;
[; ;pic16lf1509.h: 644: unsigned BCL1IF :1;
[; ;pic16lf1509.h: 645: unsigned :1;
[; ;pic16lf1509.h: 646: unsigned C1IF :1;
[; ;pic16lf1509.h: 647: unsigned C2IF :1;
[; ;pic16lf1509.h: 648: unsigned OSFIF :1;
[; ;pic16lf1509.h: 649: };
[; ;pic16lf1509.h: 650: } PIR2bits_t;
[; ;pic16lf1509.h: 651: extern volatile PIR2bits_t PIR2bits @ 0x012;
[; ;pic16lf1509.h: 681: extern volatile unsigned char PIR3 @ 0x013;
"683
[; ;pic16lf1509.h: 683: asm("PIR3 equ 013h");
[; <" PIR3 equ 013h ;# ">
[; ;pic16lf1509.h: 686: typedef union {
[; ;pic16lf1509.h: 687: struct {
[; ;pic16lf1509.h: 688: unsigned CLC1IF :1;
[; ;pic16lf1509.h: 689: unsigned CLC2IF :1;
[; ;pic16lf1509.h: 690: unsigned CLC3IF :1;
[; ;pic16lf1509.h: 691: unsigned CLC4IF :1;
[; ;pic16lf1509.h: 692: };
[; ;pic16lf1509.h: 693: } PIR3bits_t;
[; ;pic16lf1509.h: 694: extern volatile PIR3bits_t PIR3bits @ 0x013;
[; ;pic16lf1509.h: 719: extern volatile unsigned char TMR0 @ 0x015;
"721
[; ;pic16lf1509.h: 721: asm("TMR0 equ 015h");
[; <" TMR0 equ 015h ;# ">
[; ;pic16lf1509.h: 724: typedef union {
[; ;pic16lf1509.h: 725: struct {
[; ;pic16lf1509.h: 726: unsigned TMR0 :8;
[; ;pic16lf1509.h: 727: };
[; ;pic16lf1509.h: 728: } TMR0bits_t;
[; ;pic16lf1509.h: 729: extern volatile TMR0bits_t TMR0bits @ 0x015;
[; ;pic16lf1509.h: 739: extern volatile unsigned short TMR1 @ 0x016;
"741
[; ;pic16lf1509.h: 741: asm("TMR1 equ 016h");
[; <" TMR1 equ 016h ;# ">
[; ;pic16lf1509.h: 746: extern volatile unsigned char TMR1L @ 0x016;
"748
[; ;pic16lf1509.h: 748: asm("TMR1L equ 016h");
[; <" TMR1L equ 016h ;# ">
[; ;pic16lf1509.h: 751: typedef union {
[; ;pic16lf1509.h: 752: struct {
[; ;pic16lf1509.h: 753: unsigned TMR1L :8;
[; ;pic16lf1509.h: 754: };
[; ;pic16lf1509.h: 755: } TMR1Lbits_t;
[; ;pic16lf1509.h: 756: extern volatile TMR1Lbits_t TMR1Lbits @ 0x016;
[; ;pic16lf1509.h: 766: extern volatile unsigned char TMR1H @ 0x017;
"768
[; ;pic16lf1509.h: 768: asm("TMR1H equ 017h");
[; <" TMR1H equ 017h ;# ">
[; ;pic16lf1509.h: 771: typedef union {
[; ;pic16lf1509.h: 772: struct {
[; ;pic16lf1509.h: 773: unsigned TMR1H :8;
[; ;pic16lf1509.h: 774: };
[; ;pic16lf1509.h: 775: } TMR1Hbits_t;
[; ;pic16lf1509.h: 776: extern volatile TMR1Hbits_t TMR1Hbits @ 0x017;
[; ;pic16lf1509.h: 786: extern volatile unsigned char T1CON @ 0x018;
"788
[; ;pic16lf1509.h: 788: asm("T1CON equ 018h");
[; <" T1CON equ 018h ;# ">
[; ;pic16lf1509.h: 791: typedef union {
[; ;pic16lf1509.h: 792: struct {
[; ;pic16lf1509.h: 793: unsigned TMR1ON :1;
[; ;pic16lf1509.h: 794: unsigned :1;
[; ;pic16lf1509.h: 795: unsigned nT1SYNC :1;
[; ;pic16lf1509.h: 796: unsigned T1OSCEN :1;
[; ;pic16lf1509.h: 797: unsigned T1CKPS :2;
[; ;pic16lf1509.h: 798: unsigned TMR1CS :2;
[; ;pic16lf1509.h: 799: };
[; ;pic16lf1509.h: 800: struct {
[; ;pic16lf1509.h: 801: unsigned :4;
[; ;pic16lf1509.h: 802: unsigned T1CKPS0 :1;
[; ;pic16lf1509.h: 803: unsigned T1CKPS1 :1;
[; ;pic16lf1509.h: 804: unsigned TMR1CS0 :1;
[; ;pic16lf1509.h: 805: unsigned TMR1CS1 :1;
[; ;pic16lf1509.h: 806: };
[; ;pic16lf1509.h: 807: } T1CONbits_t;
[; ;pic16lf1509.h: 808: extern volatile T1CONbits_t T1CONbits @ 0x018;
[; ;pic16lf1509.h: 858: extern volatile unsigned char T1GCON @ 0x019;
"860
[; ;pic16lf1509.h: 860: asm("T1GCON equ 019h");
[; <" T1GCON equ 019h ;# ">
[; ;pic16lf1509.h: 863: typedef union {
[; ;pic16lf1509.h: 864: struct {
[; ;pic16lf1509.h: 865: unsigned T1GSS :2;
[; ;pic16lf1509.h: 866: unsigned T1GVAL :1;
[; ;pic16lf1509.h: 867: unsigned T1GGO_nDONE :1;
[; ;pic16lf1509.h: 868: unsigned T1GSPM :1;
[; ;pic16lf1509.h: 869: unsigned T1GTM :1;
[; ;pic16lf1509.h: 870: unsigned T1GPOL :1;
[; ;pic16lf1509.h: 871: unsigned TMR1GE :1;
[; ;pic16lf1509.h: 872: };
[; ;pic16lf1509.h: 873: struct {
[; ;pic16lf1509.h: 874: unsigned T1GSS0 :1;
[; ;pic16lf1509.h: 875: unsigned T1GSS1 :1;
[; ;pic16lf1509.h: 876: };
[; ;pic16lf1509.h: 877: } T1GCONbits_t;
[; ;pic16lf1509.h: 878: extern volatile T1GCONbits_t T1GCONbits @ 0x019;
[; ;pic16lf1509.h: 928: extern volatile unsigned char TMR2 @ 0x01A;
"930
[; ;pic16lf1509.h: 930: asm("TMR2 equ 01Ah");
[; <" TMR2 equ 01Ah ;# ">
[; ;pic16lf1509.h: 933: typedef union {
[; ;pic16lf1509.h: 934: struct {
[; ;pic16lf1509.h: 935: unsigned TMR2 :8;
[; ;pic16lf1509.h: 936: };
[; ;pic16lf1509.h: 937: } TMR2bits_t;
[; ;pic16lf1509.h: 938: extern volatile TMR2bits_t TMR2bits @ 0x01A;
[; ;pic16lf1509.h: 948: extern volatile unsigned char PR2 @ 0x01B;
"950
[; ;pic16lf1509.h: 950: asm("PR2 equ 01Bh");
[; <" PR2 equ 01Bh ;# ">
[; ;pic16lf1509.h: 953: typedef union {
[; ;pic16lf1509.h: 954: struct {
[; ;pic16lf1509.h: 955: unsigned PR2 :8;
[; ;pic16lf1509.h: 956: };
[; ;pic16lf1509.h: 957: } PR2bits_t;
[; ;pic16lf1509.h: 958: extern volatile PR2bits_t PR2bits @ 0x01B;
[; ;pic16lf1509.h: 968: extern volatile unsigned char T2CON @ 0x01C;
"970
[; ;pic16lf1509.h: 970: asm("T2CON equ 01Ch");
[; <" T2CON equ 01Ch ;# ">
[; ;pic16lf1509.h: 973: typedef union {
[; ;pic16lf1509.h: 974: struct {
[; ;pic16lf1509.h: 975: unsigned T2CKPS :2;
[; ;pic16lf1509.h: 976: unsigned TMR2ON :1;
[; ;pic16lf1509.h: 977: unsigned T2OUTPS :4;
[; ;pic16lf1509.h: 978: };
[; ;pic16lf1509.h: 979: struct {
[; ;pic16lf1509.h: 980: unsigned T2CKPS0 :1;
[; ;pic16lf1509.h: 981: unsigned T2CKPS1 :1;
[; ;pic16lf1509.h: 982: unsigned :1;
[; ;pic16lf1509.h: 983: unsigned T2OUTPS0 :1;
[; ;pic16lf1509.h: 984: unsigned T2OUTPS1 :1;
[; ;pic16lf1509.h: 985: unsigned T2OUTPS2 :1;
[; ;pic16lf1509.h: 986: unsigned T2OUTPS3 :1;
[; ;pic16lf1509.h: 987: };
[; ;pic16lf1509.h: 988: } T2CONbits_t;
[; ;pic16lf1509.h: 989: extern volatile T2CONbits_t T2CONbits @ 0x01C;
[; ;pic16lf1509.h: 1039: extern volatile unsigned char TRISA @ 0x08C;
"1041
[; ;pic16lf1509.h: 1041: asm("TRISA equ 08Ch");
[; <" TRISA equ 08Ch ;# ">
[; ;pic16lf1509.h: 1044: typedef union {
[; ;pic16lf1509.h: 1045: struct {
[; ;pic16lf1509.h: 1046: unsigned TRISA0 :1;
[; ;pic16lf1509.h: 1047: unsigned TRISA1 :1;
[; ;pic16lf1509.h: 1048: unsigned TRISA2 :1;
[; ;pic16lf1509.h: 1049: unsigned TRISA3 :1;
[; ;pic16lf1509.h: 1050: unsigned TRISA4 :1;
[; ;pic16lf1509.h: 1051: unsigned TRISA5 :1;
[; ;pic16lf1509.h: 1052: };
[; ;pic16lf1509.h: 1053: } TRISAbits_t;
[; ;pic16lf1509.h: 1054: extern volatile TRISAbits_t TRISAbits @ 0x08C;
[; ;pic16lf1509.h: 1089: extern volatile unsigned char TRISB @ 0x08D;
"1091
[; ;pic16lf1509.h: 1091: asm("TRISB equ 08Dh");
[; <" TRISB equ 08Dh ;# ">
[; ;pic16lf1509.h: 1094: typedef union {
[; ;pic16lf1509.h: 1095: struct {
[; ;pic16lf1509.h: 1096: unsigned :4;
[; ;pic16lf1509.h: 1097: unsigned TRISB4 :1;
[; ;pic16lf1509.h: 1098: unsigned TRISB5 :1;
[; ;pic16lf1509.h: 1099: unsigned TRISB6 :1;
[; ;pic16lf1509.h: 1100: unsigned TRISB7 :1;
[; ;pic16lf1509.h: 1101: };
[; ;pic16lf1509.h: 1102: } TRISBbits_t;
[; ;pic16lf1509.h: 1103: extern volatile TRISBbits_t TRISBbits @ 0x08D;
[; ;pic16lf1509.h: 1128: extern volatile unsigned char TRISC @ 0x08E;
"1130
[; ;pic16lf1509.h: 1130: asm("TRISC equ 08Eh");
[; <" TRISC equ 08Eh ;# ">
[; ;pic16lf1509.h: 1133: typedef union {
[; ;pic16lf1509.h: 1134: struct {
[; ;pic16lf1509.h: 1135: unsigned TRISC0 :1;
[; ;pic16lf1509.h: 1136: unsigned TRISC1 :1;
[; ;pic16lf1509.h: 1137: unsigned TRISC2 :1;
[; ;pic16lf1509.h: 1138: unsigned TRISC3 :1;
[; ;pic16lf1509.h: 1139: unsigned TRISC4 :1;
[; ;pic16lf1509.h: 1140: unsigned TRISC5 :1;
[; ;pic16lf1509.h: 1141: unsigned TRISC6 :1;
[; ;pic16lf1509.h: 1142: unsigned TRISC7 :1;
[; ;pic16lf1509.h: 1143: };
[; ;pic16lf1509.h: 1144: } TRISCbits_t;
[; ;pic16lf1509.h: 1145: extern volatile TRISCbits_t TRISCbits @ 0x08E;
[; ;pic16lf1509.h: 1190: extern volatile unsigned char PIE1 @ 0x091;
"1192
[; ;pic16lf1509.h: 1192: asm("PIE1 equ 091h");
[; <" PIE1 equ 091h ;# ">
[; ;pic16lf1509.h: 1195: typedef union {
[; ;pic16lf1509.h: 1196: struct {
[; ;pic16lf1509.h: 1197: unsigned TMR1IE :1;
[; ;pic16lf1509.h: 1198: unsigned TMR2IE :1;
[; ;pic16lf1509.h: 1199: unsigned :1;
[; ;pic16lf1509.h: 1200: unsigned SSP1IE :1;
[; ;pic16lf1509.h: 1201: unsigned TXIE :1;
[; ;pic16lf1509.h: 1202: unsigned RCIE :1;
[; ;pic16lf1509.h: 1203: unsigned ADIE :1;
[; ;pic16lf1509.h: 1204: unsigned TMR1GIE :1;
[; ;pic16lf1509.h: 1205: };
[; ;pic16lf1509.h: 1206: } PIE1bits_t;
[; ;pic16lf1509.h: 1207: extern volatile PIE1bits_t PIE1bits @ 0x091;
[; ;pic16lf1509.h: 1247: extern volatile unsigned char PIE2 @ 0x092;
"1249
[; ;pic16lf1509.h: 1249: asm("PIE2 equ 092h");
[; <" PIE2 equ 092h ;# ">
[; ;pic16lf1509.h: 1252: typedef union {
[; ;pic16lf1509.h: 1253: struct {
[; ;pic16lf1509.h: 1254: unsigned :2;
[; ;pic16lf1509.h: 1255: unsigned NCO1IE :1;
[; ;pic16lf1509.h: 1256: unsigned BCL1IE :1;
[; ;pic16lf1509.h: 1257: unsigned :1;
[; ;pic16lf1509.h: 1258: unsigned C1IE :1;
[; ;pic16lf1509.h: 1259: unsigned C2IE :1;
[; ;pic16lf1509.h: 1260: unsigned OSFIE :1;
[; ;pic16lf1509.h: 1261: };
[; ;pic16lf1509.h: 1262: } PIE2bits_t;
[; ;pic16lf1509.h: 1263: extern volatile PIE2bits_t PIE2bits @ 0x092;
[; ;pic16lf1509.h: 1293: extern volatile unsigned char PIE3 @ 0x093;
"1295
[; ;pic16lf1509.h: 1295: asm("PIE3 equ 093h");
[; <" PIE3 equ 093h ;# ">
[; ;pic16lf1509.h: 1298: typedef union {
[; ;pic16lf1509.h: 1299: struct {
[; ;pic16lf1509.h: 1300: unsigned CLC1IE :1;
[; ;pic16lf1509.h: 1301: unsigned CLC2IE :1;
[; ;pic16lf1509.h: 1302: unsigned CLC3IE :1;
[; ;pic16lf1509.h: 1303: unsigned CLC4IE :1;
[; ;pic16lf1509.h: 1304: };
[; ;pic16lf1509.h: 1305: } PIE3bits_t;
[; ;pic16lf1509.h: 1306: extern volatile PIE3bits_t PIE3bits @ 0x093;
[; ;pic16lf1509.h: 1331: extern volatile unsigned char OPTION_REG @ 0x095;
"1333
[; ;pic16lf1509.h: 1333: asm("OPTION_REG equ 095h");
[; <" OPTION_REG equ 095h ;# ">
[; ;pic16lf1509.h: 1336: typedef union {
[; ;pic16lf1509.h: 1337: struct {
[; ;pic16lf1509.h: 1338: unsigned PS :3;
[; ;pic16lf1509.h: 1339: unsigned PSA :1;
[; ;pic16lf1509.h: 1340: unsigned TMR0SE :1;
[; ;pic16lf1509.h: 1341: unsigned TMR0CS :1;
[; ;pic16lf1509.h: 1342: unsigned INTEDG :1;
[; ;pic16lf1509.h: 1343: unsigned nWPUEN :1;
[; ;pic16lf1509.h: 1344: };
[; ;pic16lf1509.h: 1345: struct {
[; ;pic16lf1509.h: 1346: unsigned PS0 :1;
[; ;pic16lf1509.h: 1347: unsigned PS1 :1;
[; ;pic16lf1509.h: 1348: unsigned PS2 :1;
[; ;pic16lf1509.h: 1349: unsigned :1;
[; ;pic16lf1509.h: 1350: unsigned T0SE :1;
[; ;pic16lf1509.h: 1351: unsigned T0CS :1;
[; ;pic16lf1509.h: 1352: };
[; ;pic16lf1509.h: 1353: } OPTION_REGbits_t;
[; ;pic16lf1509.h: 1354: extern volatile OPTION_REGbits_t OPTION_REGbits @ 0x095;
[; ;pic16lf1509.h: 1414: extern volatile unsigned char PCON @ 0x096;
"1416
[; ;pic16lf1509.h: 1416: asm("PCON equ 096h");
[; <" PCON equ 096h ;# ">
[; ;pic16lf1509.h: 1419: typedef union {
[; ;pic16lf1509.h: 1420: struct {
[; ;pic16lf1509.h: 1421: unsigned nBOR :1;
[; ;pic16lf1509.h: 1422: unsigned nPOR :1;
[; ;pic16lf1509.h: 1423: unsigned nRI :1;
[; ;pic16lf1509.h: 1424: unsigned nRMCLR :1;
[; ;pic16lf1509.h: 1425: unsigned nRWDT :1;
[; ;pic16lf1509.h: 1426: unsigned :1;
[; ;pic16lf1509.h: 1427: unsigned STKUNF :1;
[; ;pic16lf1509.h: 1428: unsigned STKOVF :1;
[; ;pic16lf1509.h: 1429: };
[; ;pic16lf1509.h: 1430: } PCONbits_t;
[; ;pic16lf1509.h: 1431: extern volatile PCONbits_t PCONbits @ 0x096;
[; ;pic16lf1509.h: 1471: extern volatile unsigned char WDTCON @ 0x097;
"1473
[; ;pic16lf1509.h: 1473: asm("WDTCON equ 097h");
[; <" WDTCON equ 097h ;# ">
[; ;pic16lf1509.h: 1476: typedef union {
[; ;pic16lf1509.h: 1477: struct {
[; ;pic16lf1509.h: 1478: unsigned SWDTEN :1;
[; ;pic16lf1509.h: 1479: unsigned WDTPS :5;
[; ;pic16lf1509.h: 1480: };
[; ;pic16lf1509.h: 1481: struct {
[; ;pic16lf1509.h: 1482: unsigned :1;
[; ;pic16lf1509.h: 1483: unsigned WDTPS0 :1;
[; ;pic16lf1509.h: 1484: unsigned WDTPS1 :1;
[; ;pic16lf1509.h: 1485: unsigned WDTPS2 :1;
[; ;pic16lf1509.h: 1486: unsigned WDTPS3 :1;
[; ;pic16lf1509.h: 1487: unsigned WDTPS4 :1;
[; ;pic16lf1509.h: 1488: };
[; ;pic16lf1509.h: 1489: } WDTCONbits_t;
[; ;pic16lf1509.h: 1490: extern volatile WDTCONbits_t WDTCONbits @ 0x097;
[; ;pic16lf1509.h: 1530: extern volatile unsigned char OSCCON @ 0x099;
"1532
[; ;pic16lf1509.h: 1532: asm("OSCCON equ 099h");
[; <" OSCCON equ 099h ;# ">
[; ;pic16lf1509.h: 1535: typedef union {
[; ;pic16lf1509.h: 1536: struct {
[; ;pic16lf1509.h: 1537: unsigned SCS :2;
[; ;pic16lf1509.h: 1538: unsigned :1;
[; ;pic16lf1509.h: 1539: unsigned IRCF :4;
[; ;pic16lf1509.h: 1540: };
[; ;pic16lf1509.h: 1541: struct {
[; ;pic16lf1509.h: 1542: unsigned SCS0 :1;
[; ;pic16lf1509.h: 1543: unsigned SCS1 :1;
[; ;pic16lf1509.h: 1544: unsigned :1;
[; ;pic16lf1509.h: 1545: unsigned IRCF0 :1;
[; ;pic16lf1509.h: 1546: unsigned IRCF1 :1;
[; ;pic16lf1509.h: 1547: unsigned IRCF2 :1;
[; ;pic16lf1509.h: 1548: unsigned IRCF3 :1;
[; ;pic16lf1509.h: 1549: };
[; ;pic16lf1509.h: 1550: } OSCCONbits_t;
[; ;pic16lf1509.h: 1551: extern volatile OSCCONbits_t OSCCONbits @ 0x099;
[; ;pic16lf1509.h: 1596: extern volatile unsigned char OSCSTAT @ 0x09A;
"1598
[; ;pic16lf1509.h: 1598: asm("OSCSTAT equ 09Ah");
[; <" OSCSTAT equ 09Ah ;# ">
[; ;pic16lf1509.h: 1601: typedef union {
[; ;pic16lf1509.h: 1602: struct {
[; ;pic16lf1509.h: 1603: unsigned HFIOFS :1;
[; ;pic16lf1509.h: 1604: unsigned LFIOFR :1;
[; ;pic16lf1509.h: 1605: unsigned :2;
[; ;pic16lf1509.h: 1606: unsigned HFIOFR :1;
[; ;pic16lf1509.h: 1607: unsigned OSTS :1;
[; ;pic16lf1509.h: 1608: unsigned :1;
[; ;pic16lf1509.h: 1609: unsigned SOSCR :1;
[; ;pic16lf1509.h: 1610: };
[; ;pic16lf1509.h: 1611: } OSCSTATbits_t;
[; ;pic16lf1509.h: 1612: extern volatile OSCSTATbits_t OSCSTATbits @ 0x09A;
[; ;pic16lf1509.h: 1642: extern volatile unsigned short ADRES @ 0x09B;
"1644
[; ;pic16lf1509.h: 1644: asm("ADRES equ 09Bh");
[; <" ADRES equ 09Bh ;# ">
[; ;pic16lf1509.h: 1649: extern volatile unsigned char ADRESL @ 0x09B;
"1651
[; ;pic16lf1509.h: 1651: asm("ADRESL equ 09Bh");
[; <" ADRESL equ 09Bh ;# ">
[; ;pic16lf1509.h: 1654: typedef union {
[; ;pic16lf1509.h: 1655: struct {
[; ;pic16lf1509.h: 1656: unsigned ADRESL :8;
[; ;pic16lf1509.h: 1657: };
[; ;pic16lf1509.h: 1658: } ADRESLbits_t;
[; ;pic16lf1509.h: 1659: extern volatile ADRESLbits_t ADRESLbits @ 0x09B;
[; ;pic16lf1509.h: 1669: extern volatile unsigned char ADRESH @ 0x09C;
"1671
[; ;pic16lf1509.h: 1671: asm("ADRESH equ 09Ch");
[; <" ADRESH equ 09Ch ;# ">
[; ;pic16lf1509.h: 1674: typedef union {
[; ;pic16lf1509.h: 1675: struct {
[; ;pic16lf1509.h: 1676: unsigned ADRESH :8;
[; ;pic16lf1509.h: 1677: };
[; ;pic16lf1509.h: 1678: } ADRESHbits_t;
[; ;pic16lf1509.h: 1679: extern volatile ADRESHbits_t ADRESHbits @ 0x09C;
[; ;pic16lf1509.h: 1689: extern volatile unsigned char ADCON0 @ 0x09D;
"1691
[; ;pic16lf1509.h: 1691: asm("ADCON0 equ 09Dh");
[; <" ADCON0 equ 09Dh ;# ">
[; ;pic16lf1509.h: 1694: typedef union {
[; ;pic16lf1509.h: 1695: struct {
[; ;pic16lf1509.h: 1696: unsigned ADON :1;
[; ;pic16lf1509.h: 1697: unsigned GO_nDONE :1;
[; ;pic16lf1509.h: 1698: unsigned CHS :5;
[; ;pic16lf1509.h: 1699: };
[; ;pic16lf1509.h: 1700: struct {
[; ;pic16lf1509.h: 1701: unsigned :1;
[; ;pic16lf1509.h: 1702: unsigned ADGO :1;
[; ;pic16lf1509.h: 1703: unsigned CHS0 :1;
[; ;pic16lf1509.h: 1704: unsigned CHS1 :1;
[; ;pic16lf1509.h: 1705: unsigned CHS2 :1;
[; ;pic16lf1509.h: 1706: unsigned CHS3 :1;
[; ;pic16lf1509.h: 1707: unsigned CHS4 :1;
[; ;pic16lf1509.h: 1708: };
[; ;pic16lf1509.h: 1709: struct {
[; ;pic16lf1509.h: 1710: unsigned :1;
[; ;pic16lf1509.h: 1711: unsigned GO :1;
[; ;pic16lf1509.h: 1712: };
[; ;pic16lf1509.h: 1713: } ADCON0bits_t;
[; ;pic16lf1509.h: 1714: extern volatile ADCON0bits_t ADCON0bits @ 0x09D;
[; ;pic16lf1509.h: 1769: extern volatile unsigned char ADCON1 @ 0x09E;
"1771
[; ;pic16lf1509.h: 1771: asm("ADCON1 equ 09Eh");
[; <" ADCON1 equ 09Eh ;# ">
[; ;pic16lf1509.h: 1774: typedef union {
[; ;pic16lf1509.h: 1775: struct {
[; ;pic16lf1509.h: 1776: unsigned ADPREF :2;
[; ;pic16lf1509.h: 1777: unsigned :2;
[; ;pic16lf1509.h: 1778: unsigned ADCS :3;
[; ;pic16lf1509.h: 1779: unsigned ADFM :1;
[; ;pic16lf1509.h: 1780: };
[; ;pic16lf1509.h: 1781: struct {
[; ;pic16lf1509.h: 1782: unsigned ADPREF0 :1;
[; ;pic16lf1509.h: 1783: unsigned ADPREF1 :1;
[; ;pic16lf1509.h: 1784: };
[; ;pic16lf1509.h: 1785: } ADCON1bits_t;
[; ;pic16lf1509.h: 1786: extern volatile ADCON1bits_t ADCON1bits @ 0x09E;
[; ;pic16lf1509.h: 1816: extern volatile unsigned char ADCON2 @ 0x09F;
"1818
[; ;pic16lf1509.h: 1818: asm("ADCON2 equ 09Fh");
[; <" ADCON2 equ 09Fh ;# ">
[; ;pic16lf1509.h: 1821: typedef union {
[; ;pic16lf1509.h: 1822: struct {
[; ;pic16lf1509.h: 1823: unsigned :4;
[; ;pic16lf1509.h: 1824: unsigned TRIGSEL :4;
[; ;pic16lf1509.h: 1825: };
[; ;pic16lf1509.h: 1826: struct {
[; ;pic16lf1509.h: 1827: unsigned :4;
[; ;pic16lf1509.h: 1828: unsigned TRIGSEL0 :1;
[; ;pic16lf1509.h: 1829: unsigned TRIGSEL1 :1;
[; ;pic16lf1509.h: 1830: unsigned TRIGSEL2 :1;
[; ;pic16lf1509.h: 1831: unsigned TRIGSEL3 :1;
[; ;pic16lf1509.h: 1832: };
[; ;pic16lf1509.h: 1833: } ADCON2bits_t;
[; ;pic16lf1509.h: 1834: extern volatile ADCON2bits_t ADCON2bits @ 0x09F;
[; ;pic16lf1509.h: 1864: extern volatile unsigned char LATA @ 0x10C;
"1866
[; ;pic16lf1509.h: 1866: asm("LATA equ 010Ch");
[; <" LATA equ 010Ch ;# ">
[; ;pic16lf1509.h: 1869: typedef union {
[; ;pic16lf1509.h: 1870: struct {
[; ;pic16lf1509.h: 1871: unsigned LATA0 :1;
[; ;pic16lf1509.h: 1872: unsigned LATA1 :1;
[; ;pic16lf1509.h: 1873: unsigned LATA2 :1;
[; ;pic16lf1509.h: 1874: unsigned :1;
[; ;pic16lf1509.h: 1875: unsigned LATA4 :1;
[; ;pic16lf1509.h: 1876: unsigned LATA5 :1;
[; ;pic16lf1509.h: 1877: };
[; ;pic16lf1509.h: 1878: } LATAbits_t;
[; ;pic16lf1509.h: 1879: extern volatile LATAbits_t LATAbits @ 0x10C;
[; ;pic16lf1509.h: 1909: extern volatile unsigned char LATB @ 0x10D;
"1911
[; ;pic16lf1509.h: 1911: asm("LATB equ 010Dh");
[; <" LATB equ 010Dh ;# ">
[; ;pic16lf1509.h: 1914: typedef union {
[; ;pic16lf1509.h: 1915: struct {
[; ;pic16lf1509.h: 1916: unsigned :4;
[; ;pic16lf1509.h: 1917: unsigned LATB4 :1;
[; ;pic16lf1509.h: 1918: unsigned LATB5 :1;
[; ;pic16lf1509.h: 1919: unsigned LATB6 :1;
[; ;pic16lf1509.h: 1920: unsigned LATB7 :1;
[; ;pic16lf1509.h: 1921: };
[; ;pic16lf1509.h: 1922: } LATBbits_t;
[; ;pic16lf1509.h: 1923: extern volatile LATBbits_t LATBbits @ 0x10D;
[; ;pic16lf1509.h: 1948: extern volatile unsigned char LATC @ 0x10E;
"1950
[; ;pic16lf1509.h: 1950: asm("LATC equ 010Eh");
[; <" LATC equ 010Eh ;# ">
[; ;pic16lf1509.h: 1953: typedef union {
[; ;pic16lf1509.h: 1954: struct {
[; ;pic16lf1509.h: 1955: unsigned LATC0 :1;
[; ;pic16lf1509.h: 1956: unsigned LATC1 :1;
[; ;pic16lf1509.h: 1957: unsigned LATC2 :1;
[; ;pic16lf1509.h: 1958: unsigned LATC3 :1;
[; ;pic16lf1509.h: 1959: unsigned LATC4 :1;
[; ;pic16lf1509.h: 1960: unsigned LATC5 :1;
[; ;pic16lf1509.h: 1961: unsigned LATC6 :1;
[; ;pic16lf1509.h: 1962: unsigned LATC7 :1;
[; ;pic16lf1509.h: 1963: };
[; ;pic16lf1509.h: 1964: } LATCbits_t;
[; ;pic16lf1509.h: 1965: extern volatile LATCbits_t LATCbits @ 0x10E;
[; ;pic16lf1509.h: 2010: extern volatile unsigned char CM1CON0 @ 0x111;
"2012
[; ;pic16lf1509.h: 2012: asm("CM1CON0 equ 0111h");
[; <" CM1CON0 equ 0111h ;# ">
[; ;pic16lf1509.h: 2015: typedef union {
[; ;pic16lf1509.h: 2016: struct {
[; ;pic16lf1509.h: 2017: unsigned C1SYNC :1;
[; ;pic16lf1509.h: 2018: unsigned C1HYS :1;
[; ;pic16lf1509.h: 2019: unsigned C1SP :1;
[; ;pic16lf1509.h: 2020: unsigned :1;
[; ;pic16lf1509.h: 2021: unsigned C1POL :1;
[; ;pic16lf1509.h: 2022: unsigned C1OE :1;
[; ;pic16lf1509.h: 2023: unsigned C1OUT :1;
[; ;pic16lf1509.h: 2024: unsigned C1ON :1;
[; ;pic16lf1509.h: 2025: };
[; ;pic16lf1509.h: 2026: } CM1CON0bits_t;
[; ;pic16lf1509.h: 2027: extern volatile CM1CON0bits_t CM1CON0bits @ 0x111;
[; ;pic16lf1509.h: 2067: extern volatile unsigned char CM1CON1 @ 0x112;
"2069
[; ;pic16lf1509.h: 2069: asm("CM1CON1 equ 0112h");
[; <" CM1CON1 equ 0112h ;# ">
[; ;pic16lf1509.h: 2072: typedef union {
[; ;pic16lf1509.h: 2073: struct {
[; ;pic16lf1509.h: 2074: unsigned C1NCH0 :1;
[; ;pic16lf1509.h: 2075: unsigned C1NCH1 :1;
[; ;pic16lf1509.h: 2076: unsigned C1NCH2 :1;
[; ;pic16lf1509.h: 2077: unsigned :1;
[; ;pic16lf1509.h: 2078: unsigned C1PCH0 :1;
[; ;pic16lf1509.h: 2079: unsigned C1PCH1 :1;
[; ;pic16lf1509.h: 2080: unsigned C1INTN :1;
[; ;pic16lf1509.h: 2081: unsigned C1INTP :1;
[; ;pic16lf1509.h: 2082: };
[; ;pic16lf1509.h: 2083: struct {
[; ;pic16lf1509.h: 2084: unsigned C1NCH :3;
[; ;pic16lf1509.h: 2085: unsigned :1;
[; ;pic16lf1509.h: 2086: unsigned C1PCH :2;
[; ;pic16lf1509.h: 2087: };
[; ;pic16lf1509.h: 2088: } CM1CON1bits_t;
[; ;pic16lf1509.h: 2089: extern volatile CM1CON1bits_t CM1CON1bits @ 0x112;
[; ;pic16lf1509.h: 2139: extern volatile unsigned char CM2CON0 @ 0x113;
"2141
[; ;pic16lf1509.h: 2141: asm("CM2CON0 equ 0113h");
[; <" CM2CON0 equ 0113h ;# ">
[; ;pic16lf1509.h: 2144: typedef union {
[; ;pic16lf1509.h: 2145: struct {
[; ;pic16lf1509.h: 2146: unsigned C2SYNC :1;
[; ;pic16lf1509.h: 2147: unsigned C2HYS :1;
[; ;pic16lf1509.h: 2148: unsigned C2SP :1;
[; ;pic16lf1509.h: 2149: unsigned :1;
[; ;pic16lf1509.h: 2150: unsigned C2POL :1;
[; ;pic16lf1509.h: 2151: unsigned C2OE :1;
[; ;pic16lf1509.h: 2152: unsigned C2OUT :1;
[; ;pic16lf1509.h: 2153: unsigned C2ON :1;
[; ;pic16lf1509.h: 2154: };
[; ;pic16lf1509.h: 2155: } CM2CON0bits_t;
[; ;pic16lf1509.h: 2156: extern volatile CM2CON0bits_t CM2CON0bits @ 0x113;
[; ;pic16lf1509.h: 2196: extern volatile unsigned char CM2CON1 @ 0x114;
"2198
[; ;pic16lf1509.h: 2198: asm("CM2CON1 equ 0114h");
[; <" CM2CON1 equ 0114h ;# ">
[; ;pic16lf1509.h: 2201: typedef union {
[; ;pic16lf1509.h: 2202: struct {
[; ;pic16lf1509.h: 2203: unsigned C2NCH0 :1;
[; ;pic16lf1509.h: 2204: unsigned C2NCH1 :1;
[; ;pic16lf1509.h: 2205: unsigned C2NCH2 :1;
[; ;pic16lf1509.h: 2206: unsigned :1;
[; ;pic16lf1509.h: 2207: unsigned C2PCH0 :1;
[; ;pic16lf1509.h: 2208: unsigned C2PCH1 :1;
[; ;pic16lf1509.h: 2209: unsigned C2INTN :1;
[; ;pic16lf1509.h: 2210: unsigned C2INTP :1;
[; ;pic16lf1509.h: 2211: };
[; ;pic16lf1509.h: 2212: struct {
[; ;pic16lf1509.h: 2213: unsigned C2NCH :3;
[; ;pic16lf1509.h: 2214: unsigned :1;
[; ;pic16lf1509.h: 2215: unsigned C2PCH :2;
[; ;pic16lf1509.h: 2216: };
[; ;pic16lf1509.h: 2217: } CM2CON1bits_t;
[; ;pic16lf1509.h: 2218: extern volatile CM2CON1bits_t CM2CON1bits @ 0x114;
[; ;pic16lf1509.h: 2268: extern volatile unsigned char CMOUT @ 0x115;
"2270
[; ;pic16lf1509.h: 2270: asm("CMOUT equ 0115h");
[; <" CMOUT equ 0115h ;# ">
[; ;pic16lf1509.h: 2273: typedef union {
[; ;pic16lf1509.h: 2274: struct {
[; ;pic16lf1509.h: 2275: unsigned MC1OUT :1;
[; ;pic16lf1509.h: 2276: unsigned MC2OUT :1;
[; ;pic16lf1509.h: 2277: };
[; ;pic16lf1509.h: 2278: } CMOUTbits_t;
[; ;pic16lf1509.h: 2279: extern volatile CMOUTbits_t CMOUTbits @ 0x115;
[; ;pic16lf1509.h: 2294: extern volatile unsigned char BORCON @ 0x116;
"2296
[; ;pic16lf1509.h: 2296: asm("BORCON equ 0116h");
[; <" BORCON equ 0116h ;# ">
[; ;pic16lf1509.h: 2299: typedef union {
[; ;pic16lf1509.h: 2300: struct {
[; ;pic16lf1509.h: 2301: unsigned BORRDY :1;
[; ;pic16lf1509.h: 2302: unsigned :5;
[; ;pic16lf1509.h: 2303: unsigned BORFS :1;
[; ;pic16lf1509.h: 2304: unsigned SBOREN :1;
[; ;pic16lf1509.h: 2305: };
[; ;pic16lf1509.h: 2306: } BORCONbits_t;
[; ;pic16lf1509.h: 2307: extern volatile BORCONbits_t BORCONbits @ 0x116;
[; ;pic16lf1509.h: 2327: extern volatile unsigned char FVRCON @ 0x117;
"2329
[; ;pic16lf1509.h: 2329: asm("FVRCON equ 0117h");
[; <" FVRCON equ 0117h ;# ">
[; ;pic16lf1509.h: 2332: typedef union {
[; ;pic16lf1509.h: 2333: struct {
[; ;pic16lf1509.h: 2334: unsigned ADFVR :2;
[; ;pic16lf1509.h: 2335: unsigned CDAFVR :2;
[; ;pic16lf1509.h: 2336: unsigned TSRNG :1;
[; ;pic16lf1509.h: 2337: unsigned TSEN :1;
[; ;pic16lf1509.h: 2338: unsigned FVRRDY :1;
[; ;pic16lf1509.h: 2339: unsigned FVREN :1;
[; ;pic16lf1509.h: 2340: };
[; ;pic16lf1509.h: 2341: struct {
[; ;pic16lf1509.h: 2342: unsigned ADFVR0 :1;
[; ;pic16lf1509.h: 2343: unsigned ADFVR1 :1;
[; ;pic16lf1509.h: 2344: unsigned CDAFVR0 :1;
[; ;pic16lf1509.h: 2345: unsigned CDAFVR1 :1;
[; ;pic16lf1509.h: 2346: };
[; ;pic16lf1509.h: 2347: } FVRCONbits_t;
[; ;pic16lf1509.h: 2348: extern volatile FVRCONbits_t FVRCONbits @ 0x117;
[; ;pic16lf1509.h: 2403: extern volatile unsigned char DACCON0 @ 0x118;
"2405
[; ;pic16lf1509.h: 2405: asm("DACCON0 equ 0118h");
[; <" DACCON0 equ 0118h ;# ">
[; ;pic16lf1509.h: 2408: typedef union {
[; ;pic16lf1509.h: 2409: struct {
[; ;pic16lf1509.h: 2410: unsigned :2;
[; ;pic16lf1509.h: 2411: unsigned DACPSS :1;
[; ;pic16lf1509.h: 2412: unsigned :1;
[; ;pic16lf1509.h: 2413: unsigned DACOE2 :1;
[; ;pic16lf1509.h: 2414: unsigned DACOE1 :1;
[; ;pic16lf1509.h: 2415: unsigned :1;
[; ;pic16lf1509.h: 2416: unsigned DACEN :1;
[; ;pic16lf1509.h: 2417: };
[; ;pic16lf1509.h: 2418: } DACCON0bits_t;
[; ;pic16lf1509.h: 2419: extern volatile DACCON0bits_t DACCON0bits @ 0x118;
[; ;pic16lf1509.h: 2444: extern volatile unsigned char DACCON1 @ 0x119;
"2446
[; ;pic16lf1509.h: 2446: asm("DACCON1 equ 0119h");
[; <" DACCON1 equ 0119h ;# ">
[; ;pic16lf1509.h: 2449: typedef union {
[; ;pic16lf1509.h: 2450: struct {
[; ;pic16lf1509.h: 2451: unsigned DACR :5;
[; ;pic16lf1509.h: 2452: };
[; ;pic16lf1509.h: 2453: struct {
[; ;pic16lf1509.h: 2454: unsigned DACR0 :1;
[; ;pic16lf1509.h: 2455: unsigned DACR1 :1;
[; ;pic16lf1509.h: 2456: unsigned DACR2 :1;
[; ;pic16lf1509.h: 2457: unsigned DACR3 :1;
[; ;pic16lf1509.h: 2458: unsigned DACR4 :1;
[; ;pic16lf1509.h: 2459: };
[; ;pic16lf1509.h: 2460: } DACCON1bits_t;
[; ;pic16lf1509.h: 2461: extern volatile DACCON1bits_t DACCON1bits @ 0x119;
[; ;pic16lf1509.h: 2496: extern volatile unsigned char APFCON @ 0x11D;
"2498
[; ;pic16lf1509.h: 2498: asm("APFCON equ 011Dh");
[; <" APFCON equ 011Dh ;# ">
[; ;pic16lf1509.h: 2501: typedef union {
[; ;pic16lf1509.h: 2502: struct {
[; ;pic16lf1509.h: 2503: unsigned NCO1SEL :1;
[; ;pic16lf1509.h: 2504: unsigned CLC1SEL :1;
[; ;pic16lf1509.h: 2505: unsigned :1;
[; ;pic16lf1509.h: 2506: unsigned T1GSEL :1;
[; ;pic16lf1509.h: 2507: unsigned SSSEL :1;
[; ;pic16lf1509.h: 2508: };
[; ;pic16lf1509.h: 2509: } APFCONbits_t;
[; ;pic16lf1509.h: 2510: extern volatile APFCONbits_t APFCONbits @ 0x11D;
[; ;pic16lf1509.h: 2535: extern volatile unsigned char ANSELA @ 0x18C;
"2537
[; ;pic16lf1509.h: 2537: asm("ANSELA equ 018Ch");
[; <" ANSELA equ 018Ch ;# ">
[; ;pic16lf1509.h: 2540: typedef union {
[; ;pic16lf1509.h: 2541: struct {
[; ;pic16lf1509.h: 2542: unsigned ANSA0 :1;
[; ;pic16lf1509.h: 2543: unsigned ANSA1 :1;
[; ;pic16lf1509.h: 2544: unsigned ANSA2 :1;
[; ;pic16lf1509.h: 2545: unsigned :1;
[; ;pic16lf1509.h: 2546: unsigned ANSA4 :1;
[; ;pic16lf1509.h: 2547: };
[; ;pic16lf1509.h: 2548: struct {
[; ;pic16lf1509.h: 2549: unsigned ANSELA :6;
[; ;pic16lf1509.h: 2550: };
[; ;pic16lf1509.h: 2551: } ANSELAbits_t;
[; ;pic16lf1509.h: 2552: extern volatile ANSELAbits_t ANSELAbits @ 0x18C;
[; ;pic16lf1509.h: 2582: extern volatile unsigned char ANSELB @ 0x18D;
"2584
[; ;pic16lf1509.h: 2584: asm("ANSELB equ 018Dh");
[; <" ANSELB equ 018Dh ;# ">
[; ;pic16lf1509.h: 2587: typedef union {
[; ;pic16lf1509.h: 2588: struct {
[; ;pic16lf1509.h: 2589: unsigned :4;
[; ;pic16lf1509.h: 2590: unsigned ANSB4 :1;
[; ;pic16lf1509.h: 2591: unsigned ANSB5 :1;
[; ;pic16lf1509.h: 2592: };
[; ;pic16lf1509.h: 2593: struct {
[; ;pic16lf1509.h: 2594: unsigned :4;
[; ;pic16lf1509.h: 2595: unsigned ANSB :4;
[; ;pic16lf1509.h: 2596: };
[; ;pic16lf1509.h: 2597: } ANSELBbits_t;
[; ;pic16lf1509.h: 2598: extern volatile ANSELBbits_t ANSELBbits @ 0x18D;
[; ;pic16lf1509.h: 2618: extern volatile unsigned char ANSELC @ 0x18E;
"2620
[; ;pic16lf1509.h: 2620: asm("ANSELC equ 018Eh");
[; <" ANSELC equ 018Eh ;# ">
[; ;pic16lf1509.h: 2623: typedef union {
[; ;pic16lf1509.h: 2624: struct {
[; ;pic16lf1509.h: 2625: unsigned ANSC0 :1;
[; ;pic16lf1509.h: 2626: unsigned ANSC1 :1;
[; ;pic16lf1509.h: 2627: unsigned ANSC2 :1;
[; ;pic16lf1509.h: 2628: unsigned ANSC3 :1;
[; ;pic16lf1509.h: 2629: unsigned :2;
[; ;pic16lf1509.h: 2630: unsigned ANSC6 :1;
[; ;pic16lf1509.h: 2631: unsigned ANSC7 :1;
[; ;pic16lf1509.h: 2632: };
[; ;pic16lf1509.h: 2633: struct {
[; ;pic16lf1509.h: 2634: unsigned ANSELC :8;
[; ;pic16lf1509.h: 2635: };
[; ;pic16lf1509.h: 2636: } ANSELCbits_t;
[; ;pic16lf1509.h: 2637: extern volatile ANSELCbits_t ANSELCbits @ 0x18E;
[; ;pic16lf1509.h: 2677: extern volatile unsigned short PMADR @ 0x191;
"2679
[; ;pic16lf1509.h: 2679: asm("PMADR equ 0191h");
[; <" PMADR equ 0191h ;# ">
[; ;pic16lf1509.h: 2684: extern volatile unsigned char PMADRL @ 0x191;
"2686
[; ;pic16lf1509.h: 2686: asm("PMADRL equ 0191h");
[; <" PMADRL equ 0191h ;# ">
[; ;pic16lf1509.h: 2689: typedef union {
[; ;pic16lf1509.h: 2690: struct {
[; ;pic16lf1509.h: 2691: unsigned PMADRL :8;
[; ;pic16lf1509.h: 2692: };
[; ;pic16lf1509.h: 2693: } PMADRLbits_t;
[; ;pic16lf1509.h: 2694: extern volatile PMADRLbits_t PMADRLbits @ 0x191;
[; ;pic16lf1509.h: 2704: extern volatile unsigned char PMADRH @ 0x192;
"2706
[; ;pic16lf1509.h: 2706: asm("PMADRH equ 0192h");
[; <" PMADRH equ 0192h ;# ">
[; ;pic16lf1509.h: 2709: typedef union {
[; ;pic16lf1509.h: 2710: struct {
[; ;pic16lf1509.h: 2711: unsigned PMADRH :7;
[; ;pic16lf1509.h: 2712: };
[; ;pic16lf1509.h: 2713: } PMADRHbits_t;
[; ;pic16lf1509.h: 2714: extern volatile PMADRHbits_t PMADRHbits @ 0x192;
[; ;pic16lf1509.h: 2724: extern volatile unsigned short PMDAT @ 0x193;
"2726
[; ;pic16lf1509.h: 2726: asm("PMDAT equ 0193h");
[; <" PMDAT equ 0193h ;# ">
[; ;pic16lf1509.h: 2731: extern volatile unsigned char PMDATL @ 0x193;
"2733
[; ;pic16lf1509.h: 2733: asm("PMDATL equ 0193h");
[; <" PMDATL equ 0193h ;# ">
[; ;pic16lf1509.h: 2736: typedef union {
[; ;pic16lf1509.h: 2737: struct {
[; ;pic16lf1509.h: 2738: unsigned PMDATL :8;
[; ;pic16lf1509.h: 2739: };
[; ;pic16lf1509.h: 2740: } PMDATLbits_t;
[; ;pic16lf1509.h: 2741: extern volatile PMDATLbits_t PMDATLbits @ 0x193;
[; ;pic16lf1509.h: 2751: extern volatile unsigned char PMDATH @ 0x194;
"2753
[; ;pic16lf1509.h: 2753: asm("PMDATH equ 0194h");
[; <" PMDATH equ 0194h ;# ">
[; ;pic16lf1509.h: 2756: typedef union {
[; ;pic16lf1509.h: 2757: struct {
[; ;pic16lf1509.h: 2758: unsigned PMDATH :6;
[; ;pic16lf1509.h: 2759: };
[; ;pic16lf1509.h: 2760: } PMDATHbits_t;
[; ;pic16lf1509.h: 2761: extern volatile PMDATHbits_t PMDATHbits @ 0x194;
[; ;pic16lf1509.h: 2771: extern volatile unsigned char PMCON1 @ 0x195;
"2773
[; ;pic16lf1509.h: 2773: asm("PMCON1 equ 0195h");
[; <" PMCON1 equ 0195h ;# ">
[; ;pic16lf1509.h: 2776: typedef union {
[; ;pic16lf1509.h: 2777: struct {
[; ;pic16lf1509.h: 2778: unsigned RD :1;
[; ;pic16lf1509.h: 2779: unsigned WR :1;
[; ;pic16lf1509.h: 2780: unsigned WREN :1;
[; ;pic16lf1509.h: 2781: unsigned WRERR :1;
[; ;pic16lf1509.h: 2782: unsigned FREE :1;
[; ;pic16lf1509.h: 2783: unsigned LWLO :1;
[; ;pic16lf1509.h: 2784: unsigned CFGS :1;
[; ;pic16lf1509.h: 2785: };
[; ;pic16lf1509.h: 2786: } PMCON1bits_t;
[; ;pic16lf1509.h: 2787: extern volatile PMCON1bits_t PMCON1bits @ 0x195;
[; ;pic16lf1509.h: 2827: extern volatile unsigned char PMCON2 @ 0x196;
"2829
[; ;pic16lf1509.h: 2829: asm("PMCON2 equ 0196h");
[; <" PMCON2 equ 0196h ;# ">
[; ;pic16lf1509.h: 2832: typedef union {
[; ;pic16lf1509.h: 2833: struct {
[; ;pic16lf1509.h: 2834: unsigned PMCON2 :8;
[; ;pic16lf1509.h: 2835: };
[; ;pic16lf1509.h: 2836: } PMCON2bits_t;
[; ;pic16lf1509.h: 2837: extern volatile PMCON2bits_t PMCON2bits @ 0x196;
[; ;pic16lf1509.h: 2847: extern volatile unsigned char RCREG @ 0x199;
"2849
[; ;pic16lf1509.h: 2849: asm("RCREG equ 0199h");
[; <" RCREG equ 0199h ;# ">
[; ;pic16lf1509.h: 2852: typedef union {
[; ;pic16lf1509.h: 2853: struct {
[; ;pic16lf1509.h: 2854: unsigned RCREG :8;
[; ;pic16lf1509.h: 2855: };
[; ;pic16lf1509.h: 2856: } RCREGbits_t;
[; ;pic16lf1509.h: 2857: extern volatile RCREGbits_t RCREGbits @ 0x199;
[; ;pic16lf1509.h: 2867: extern volatile unsigned char TXREG @ 0x19A;
"2869
[; ;pic16lf1509.h: 2869: asm("TXREG equ 019Ah");
[; <" TXREG equ 019Ah ;# ">
[; ;pic16lf1509.h: 2872: typedef union {
[; ;pic16lf1509.h: 2873: struct {
[; ;pic16lf1509.h: 2874: unsigned TXREG :8;
[; ;pic16lf1509.h: 2875: };
[; ;pic16lf1509.h: 2876: } TXREGbits_t;
[; ;pic16lf1509.h: 2877: extern volatile TXREGbits_t TXREGbits @ 0x19A;
[; ;pic16lf1509.h: 2887: extern volatile unsigned short SPBRG @ 0x19B;
"2889
[; ;pic16lf1509.h: 2889: asm("SPBRG equ 019Bh");
[; <" SPBRG equ 019Bh ;# ">
[; ;pic16lf1509.h: 2894: extern volatile unsigned char SPBRGL @ 0x19B;
"2896
[; ;pic16lf1509.h: 2896: asm("SPBRGL equ 019Bh");
[; <" SPBRGL equ 019Bh ;# ">
[; ;pic16lf1509.h: 2899: typedef union {
[; ;pic16lf1509.h: 2900: struct {
[; ;pic16lf1509.h: 2901: unsigned SPBRGL :8;
[; ;pic16lf1509.h: 2902: };
[; ;pic16lf1509.h: 2903: } SPBRGLbits_t;
[; ;pic16lf1509.h: 2904: extern volatile SPBRGLbits_t SPBRGLbits @ 0x19B;
[; ;pic16lf1509.h: 2914: extern volatile unsigned char SPBRGH @ 0x19C;
"2916
[; ;pic16lf1509.h: 2916: asm("SPBRGH equ 019Ch");
[; <" SPBRGH equ 019Ch ;# ">
[; ;pic16lf1509.h: 2919: typedef union {
[; ;pic16lf1509.h: 2920: struct {
[; ;pic16lf1509.h: 2921: unsigned SPBRGH :8;
[; ;pic16lf1509.h: 2922: };
[; ;pic16lf1509.h: 2923: } SPBRGHbits_t;
[; ;pic16lf1509.h: 2924: extern volatile SPBRGHbits_t SPBRGHbits @ 0x19C;
[; ;pic16lf1509.h: 2934: extern volatile unsigned char RCSTA @ 0x19D;
"2936
[; ;pic16lf1509.h: 2936: asm("RCSTA equ 019Dh");
[; <" RCSTA equ 019Dh ;# ">
[; ;pic16lf1509.h: 2939: typedef union {
[; ;pic16lf1509.h: 2940: struct {
[; ;pic16lf1509.h: 2941: unsigned RX9D :1;
[; ;pic16lf1509.h: 2942: unsigned OERR :1;
[; ;pic16lf1509.h: 2943: unsigned FERR :1;
[; ;pic16lf1509.h: 2944: unsigned ADDEN :1;
[; ;pic16lf1509.h: 2945: unsigned CREN :1;
[; ;pic16lf1509.h: 2946: unsigned SREN :1;
[; ;pic16lf1509.h: 2947: unsigned RX9 :1;
[; ;pic16lf1509.h: 2948: unsigned SPEN :1;
[; ;pic16lf1509.h: 2949: };
[; ;pic16lf1509.h: 2950: } RCSTAbits_t;
[; ;pic16lf1509.h: 2951: extern volatile RCSTAbits_t RCSTAbits @ 0x19D;
[; ;pic16lf1509.h: 2996: extern volatile unsigned char TXSTA @ 0x19E;
"2998
[; ;pic16lf1509.h: 2998: asm("TXSTA equ 019Eh");
[; <" TXSTA equ 019Eh ;# ">
[; ;pic16lf1509.h: 3001: typedef union {
[; ;pic16lf1509.h: 3002: struct {
[; ;pic16lf1509.h: 3003: unsigned TX9D :1;
[; ;pic16lf1509.h: 3004: unsigned TRMT :1;
[; ;pic16lf1509.h: 3005: unsigned BRGH :1;
[; ;pic16lf1509.h: 3006: unsigned SENDB :1;
[; ;pic16lf1509.h: 3007: unsigned SYNC :1;
[; ;pic16lf1509.h: 3008: unsigned TXEN :1;
[; ;pic16lf1509.h: 3009: unsigned TX9 :1;
[; ;pic16lf1509.h: 3010: unsigned CSRC :1;
[; ;pic16lf1509.h: 3011: };
[; ;pic16lf1509.h: 3012: } TXSTAbits_t;
[; ;pic16lf1509.h: 3013: extern volatile TXSTAbits_t TXSTAbits @ 0x19E;
[; ;pic16lf1509.h: 3058: extern volatile unsigned char BAUDCON @ 0x19F;
"3060
[; ;pic16lf1509.h: 3060: asm("BAUDCON equ 019Fh");
[; <" BAUDCON equ 019Fh ;# ">
[; ;pic16lf1509.h: 3063: typedef union {
[; ;pic16lf1509.h: 3064: struct {
[; ;pic16lf1509.h: 3065: unsigned ABDEN :1;
[; ;pic16lf1509.h: 3066: unsigned WUE :1;
[; ;pic16lf1509.h: 3067: unsigned :1;
[; ;pic16lf1509.h: 3068: unsigned BRG16 :1;
[; ;pic16lf1509.h: 3069: unsigned SCKP :1;
[; ;pic16lf1509.h: 3070: unsigned :1;
[; ;pic16lf1509.h: 3071: unsigned RCIDL :1;
[; ;pic16lf1509.h: 3072: unsigned ABDOVF :1;
[; ;pic16lf1509.h: 3073: };
[; ;pic16lf1509.h: 3074: } BAUDCONbits_t;
[; ;pic16lf1509.h: 3075: extern volatile BAUDCONbits_t BAUDCONbits @ 0x19F;
[; ;pic16lf1509.h: 3110: extern volatile unsigned char WPUA @ 0x20C;
"3112
[; ;pic16lf1509.h: 3112: asm("WPUA equ 020Ch");
[; <" WPUA equ 020Ch ;# ">
[; ;pic16lf1509.h: 3115: typedef union {
[; ;pic16lf1509.h: 3116: struct {
[; ;pic16lf1509.h: 3117: unsigned WPUA0 :1;
[; ;pic16lf1509.h: 3118: unsigned WPUA1 :1;
[; ;pic16lf1509.h: 3119: unsigned WPUA2 :1;
[; ;pic16lf1509.h: 3120: unsigned WPUA3 :1;
[; ;pic16lf1509.h: 3121: unsigned WPUA4 :1;
[; ;pic16lf1509.h: 3122: unsigned WPUA5 :1;
[; ;pic16lf1509.h: 3123: };
[; ;pic16lf1509.h: 3124: struct {
[; ;pic16lf1509.h: 3125: unsigned WPUA :6;
[; ;pic16lf1509.h: 3126: };
[; ;pic16lf1509.h: 3127: } WPUAbits_t;
[; ;pic16lf1509.h: 3128: extern volatile WPUAbits_t WPUAbits @ 0x20C;
[; ;pic16lf1509.h: 3168: extern volatile unsigned char WPUB @ 0x20D;
"3170
[; ;pic16lf1509.h: 3170: asm("WPUB equ 020Dh");
[; <" WPUB equ 020Dh ;# ">
[; ;pic16lf1509.h: 3173: typedef union {
[; ;pic16lf1509.h: 3174: struct {
[; ;pic16lf1509.h: 3175: unsigned :4;
[; ;pic16lf1509.h: 3176: unsigned WPUB4 :1;
[; ;pic16lf1509.h: 3177: unsigned WPUB5 :1;
[; ;pic16lf1509.h: 3178: unsigned WPUB6 :1;
[; ;pic16lf1509.h: 3179: unsigned WPUB7 :1;
[; ;pic16lf1509.h: 3180: };
[; ;pic16lf1509.h: 3181: struct {
[; ;pic16lf1509.h: 3182: unsigned :4;
[; ;pic16lf1509.h: 3183: unsigned WPUB :4;
[; ;pic16lf1509.h: 3184: };
[; ;pic16lf1509.h: 3185: } WPUBbits_t;
[; ;pic16lf1509.h: 3186: extern volatile WPUBbits_t WPUBbits @ 0x20D;
[; ;pic16lf1509.h: 3216: extern volatile unsigned char SSP1BUF @ 0x211;
"3218
[; ;pic16lf1509.h: 3218: asm("SSP1BUF equ 0211h");
[; <" SSP1BUF equ 0211h ;# ">
[; ;pic16lf1509.h: 3221: extern volatile unsigned char SSPBUF @ 0x211;
"3223
[; ;pic16lf1509.h: 3223: asm("SSPBUF equ 0211h");
[; <" SSPBUF equ 0211h ;# ">
[; ;pic16lf1509.h: 3226: typedef union {
[; ;pic16lf1509.h: 3227: struct {
[; ;pic16lf1509.h: 3228: unsigned SSPBUF :8;
[; ;pic16lf1509.h: 3229: };
[; ;pic16lf1509.h: 3230: } SSP1BUFbits_t;
[; ;pic16lf1509.h: 3231: extern volatile SSP1BUFbits_t SSP1BUFbits @ 0x211;
[; ;pic16lf1509.h: 3239: typedef union {
[; ;pic16lf1509.h: 3240: struct {
[; ;pic16lf1509.h: 3241: unsigned SSPBUF :8;
[; ;pic16lf1509.h: 3242: };
[; ;pic16lf1509.h: 3243: } SSPBUFbits_t;
[; ;pic16lf1509.h: 3244: extern volatile SSPBUFbits_t SSPBUFbits @ 0x211;
[; ;pic16lf1509.h: 3254: extern volatile unsigned char SSP1ADD @ 0x212;
"3256
[; ;pic16lf1509.h: 3256: asm("SSP1ADD equ 0212h");
[; <" SSP1ADD equ 0212h ;# ">
[; ;pic16lf1509.h: 3259: extern volatile unsigned char SSPADD @ 0x212;
"3261
[; ;pic16lf1509.h: 3261: asm("SSPADD equ 0212h");
[; <" SSPADD equ 0212h ;# ">
[; ;pic16lf1509.h: 3264: typedef union {
[; ;pic16lf1509.h: 3265: struct {
[; ;pic16lf1509.h: 3266: unsigned ADD :8;
[; ;pic16lf1509.h: 3267: };
[; ;pic16lf1509.h: 3268: } SSP1ADDbits_t;
[; ;pic16lf1509.h: 3269: extern volatile SSP1ADDbits_t SSP1ADDbits @ 0x212;
[; ;pic16lf1509.h: 3277: typedef union {
[; ;pic16lf1509.h: 3278: struct {
[; ;pic16lf1509.h: 3279: unsigned ADD :8;
[; ;pic16lf1509.h: 3280: };
[; ;pic16lf1509.h: 3281: } SSPADDbits_t;
[; ;pic16lf1509.h: 3282: extern volatile SSPADDbits_t SSPADDbits @ 0x212;
[; ;pic16lf1509.h: 3292: extern volatile unsigned char SSP1MSK @ 0x213;
"3294
[; ;pic16lf1509.h: 3294: asm("SSP1MSK equ 0213h");
[; <" SSP1MSK equ 0213h ;# ">
[; ;pic16lf1509.h: 3297: extern volatile unsigned char SSPMSK @ 0x213;
"3299
[; ;pic16lf1509.h: 3299: asm("SSPMSK equ 0213h");
[; <" SSPMSK equ 0213h ;# ">
[; ;pic16lf1509.h: 3302: typedef union {
[; ;pic16lf1509.h: 3303: struct {
[; ;pic16lf1509.h: 3304: unsigned MSK :8;
[; ;pic16lf1509.h: 3305: };
[; ;pic16lf1509.h: 3306: } SSP1MSKbits_t;
[; ;pic16lf1509.h: 3307: extern volatile SSP1MSKbits_t SSP1MSKbits @ 0x213;
[; ;pic16lf1509.h: 3315: typedef union {
[; ;pic16lf1509.h: 3316: struct {
[; ;pic16lf1509.h: 3317: unsigned MSK :8;
[; ;pic16lf1509.h: 3318: };
[; ;pic16lf1509.h: 3319: } SSPMSKbits_t;
[; ;pic16lf1509.h: 3320: extern volatile SSPMSKbits_t SSPMSKbits @ 0x213;
[; ;pic16lf1509.h: 3330: extern volatile unsigned char SSP1STAT @ 0x214;
"3332
[; ;pic16lf1509.h: 3332: asm("SSP1STAT equ 0214h");
[; <" SSP1STAT equ 0214h ;# ">
[; ;pic16lf1509.h: 3335: extern volatile unsigned char SSPSTAT @ 0x214;
"3337
[; ;pic16lf1509.h: 3337: asm("SSPSTAT equ 0214h");
[; <" SSPSTAT equ 0214h ;# ">
[; ;pic16lf1509.h: 3340: typedef union {
[; ;pic16lf1509.h: 3341: struct {
[; ;pic16lf1509.h: 3342: unsigned BF :1;
[; ;pic16lf1509.h: 3343: unsigned UA :1;
[; ;pic16lf1509.h: 3344: unsigned R_nW :1;
[; ;pic16lf1509.h: 3345: unsigned S :1;
[; ;pic16lf1509.h: 3346: unsigned P :1;
[; ;pic16lf1509.h: 3347: unsigned D_nA :1;
[; ;pic16lf1509.h: 3348: unsigned CKE :1;
[; ;pic16lf1509.h: 3349: unsigned SMP :1;
[; ;pic16lf1509.h: 3350: };
[; ;pic16lf1509.h: 3351: } SSP1STATbits_t;
[; ;pic16lf1509.h: 3352: extern volatile SSP1STATbits_t SSP1STATbits @ 0x214;
[; ;pic16lf1509.h: 3395: typedef union {
[; ;pic16lf1509.h: 3396: struct {
[; ;pic16lf1509.h: 3397: unsigned BF :1;
[; ;pic16lf1509.h: 3398: unsigned UA :1;
[; ;pic16lf1509.h: 3399: unsigned R_nW :1;
[; ;pic16lf1509.h: 3400: unsigned S :1;
[; ;pic16lf1509.h: 3401: unsigned P :1;
[; ;pic16lf1509.h: 3402: unsigned D_nA :1;
[; ;pic16lf1509.h: 3403: unsigned CKE :1;
[; ;pic16lf1509.h: 3404: unsigned SMP :1;
[; ;pic16lf1509.h: 3405: };
[; ;pic16lf1509.h: 3406: } SSPSTATbits_t;
[; ;pic16lf1509.h: 3407: extern volatile SSPSTATbits_t SSPSTATbits @ 0x214;
[; ;pic16lf1509.h: 3452: extern volatile unsigned char SSP1CON1 @ 0x215;
"3454
[; ;pic16lf1509.h: 3454: asm("SSP1CON1 equ 0215h");
[; <" SSP1CON1 equ 0215h ;# ">
[; ;pic16lf1509.h: 3457: extern volatile unsigned char SSPCON @ 0x215;
"3459
[; ;pic16lf1509.h: 3459: asm("SSPCON equ 0215h");
[; <" SSPCON equ 0215h ;# ">
[; ;pic16lf1509.h: 3461: extern volatile unsigned char SSPCON1 @ 0x215;
"3463
[; ;pic16lf1509.h: 3463: asm("SSPCON1 equ 0215h");
[; <" SSPCON1 equ 0215h ;# ">
[; ;pic16lf1509.h: 3466: typedef union {
[; ;pic16lf1509.h: 3467: struct {
[; ;pic16lf1509.h: 3468: unsigned SSPM0 :1;
[; ;pic16lf1509.h: 3469: unsigned SSPM1 :1;
[; ;pic16lf1509.h: 3470: unsigned SSPM2 :1;
[; ;pic16lf1509.h: 3471: unsigned SSPM3 :1;
[; ;pic16lf1509.h: 3472: unsigned CKP :1;
[; ;pic16lf1509.h: 3473: unsigned SSPEN :1;
[; ;pic16lf1509.h: 3474: unsigned SSPOV :1;
[; ;pic16lf1509.h: 3475: unsigned WCOL :1;
[; ;pic16lf1509.h: 3476: };
[; ;pic16lf1509.h: 3477: struct {
[; ;pic16lf1509.h: 3478: unsigned SSPM :4;
[; ;pic16lf1509.h: 3479: };
[; ;pic16lf1509.h: 3480: } SSP1CON1bits_t;
[; ;pic16lf1509.h: 3481: extern volatile SSP1CON1bits_t SSP1CON1bits @ 0x215;
[; ;pic16lf1509.h: 3529: typedef union {
[; ;pic16lf1509.h: 3530: struct {
[; ;pic16lf1509.h: 3531: unsigned SSPM0 :1;
[; ;pic16lf1509.h: 3532: unsigned SSPM1 :1;
[; ;pic16lf1509.h: 3533: unsigned SSPM2 :1;
[; ;pic16lf1509.h: 3534: unsigned SSPM3 :1;
[; ;pic16lf1509.h: 3535: unsigned CKP :1;
[; ;pic16lf1509.h: 3536: unsigned SSPEN :1;
[; ;pic16lf1509.h: 3537: unsigned SSPOV :1;
[; ;pic16lf1509.h: 3538: unsigned WCOL :1;
[; ;pic16lf1509.h: 3539: };
[; ;pic16lf1509.h: 3540: struct {
[; ;pic16lf1509.h: 3541: unsigned SSPM :4;
[; ;pic16lf1509.h: 3542: };
[; ;pic16lf1509.h: 3543: } SSPCONbits_t;
[; ;pic16lf1509.h: 3544: extern volatile SSPCONbits_t SSPCONbits @ 0x215;
[; ;pic16lf1509.h: 3591: typedef union {
[; ;pic16lf1509.h: 3592: struct {
[; ;pic16lf1509.h: 3593: unsigned SSPM0 :1;
[; ;pic16lf1509.h: 3594: unsigned SSPM1 :1;
[; ;pic16lf1509.h: 3595: unsigned SSPM2 :1;
[; ;pic16lf1509.h: 3596: unsigned SSPM3 :1;
[; ;pic16lf1509.h: 3597: unsigned CKP :1;
[; ;pic16lf1509.h: 3598: unsigned SSPEN :1;
[; ;pic16lf1509.h: 3599: unsigned SSPOV :1;
[; ;pic16lf1509.h: 3600: unsigned WCOL :1;
[; ;pic16lf1509.h: 3601: };
[; ;pic16lf1509.h: 3602: struct {
[; ;pic16lf1509.h: 3603: unsigned SSPM :4;
[; ;pic16lf1509.h: 3604: };
[; ;pic16lf1509.h: 3605: } SSPCON1bits_t;
[; ;pic16lf1509.h: 3606: extern volatile SSPCON1bits_t SSPCON1bits @ 0x215;
[; ;pic16lf1509.h: 3656: extern volatile unsigned char SSP1CON2 @ 0x216;
"3658
[; ;pic16lf1509.h: 3658: asm("SSP1CON2 equ 0216h");
[; <" SSP1CON2 equ 0216h ;# ">
[; ;pic16lf1509.h: 3661: extern volatile unsigned char SSPCON2 @ 0x216;
"3663
[; ;pic16lf1509.h: 3663: asm("SSPCON2 equ 0216h");
[; <" SSPCON2 equ 0216h ;# ">
[; ;pic16lf1509.h: 3666: typedef union {
[; ;pic16lf1509.h: 3667: struct {
[; ;pic16lf1509.h: 3668: unsigned SEN :1;
[; ;pic16lf1509.h: 3669: unsigned RSEN :1;
[; ;pic16lf1509.h: 3670: unsigned PEN :1;
[; ;pic16lf1509.h: 3671: unsigned RCEN :1;
[; ;pic16lf1509.h: 3672: unsigned ACKEN :1;
[; ;pic16lf1509.h: 3673: unsigned ACKDT :1;
[; ;pic16lf1509.h: 3674: unsigned ACKSTAT :1;
[; ;pic16lf1509.h: 3675: unsigned GCEN :1;
[; ;pic16lf1509.h: 3676: };
[; ;pic16lf1509.h: 3677: } SSP1CON2bits_t;
[; ;pic16lf1509.h: 3678: extern volatile SSP1CON2bits_t SSP1CON2bits @ 0x216;
[; ;pic16lf1509.h: 3721: typedef union {
[; ;pic16lf1509.h: 3722: struct {
[; ;pic16lf1509.h: 3723: unsigned SEN :1;
[; ;pic16lf1509.h: 3724: unsigned RSEN :1;
[; ;pic16lf1509.h: 3725: unsigned PEN :1;
[; ;pic16lf1509.h: 3726: unsigned RCEN :1;
[; ;pic16lf1509.h: 3727: unsigned ACKEN :1;
[; ;pic16lf1509.h: 3728: unsigned ACKDT :1;
[; ;pic16lf1509.h: 3729: unsigned ACKSTAT :1;
[; ;pic16lf1509.h: 3730: unsigned GCEN :1;
[; ;pic16lf1509.h: 3731: };
[; ;pic16lf1509.h: 3732: } SSPCON2bits_t;
[; ;pic16lf1509.h: 3733: extern volatile SSPCON2bits_t SSPCON2bits @ 0x216;
[; ;pic16lf1509.h: 3778: extern volatile unsigned char SSP1CON3 @ 0x217;
"3780
[; ;pic16lf1509.h: 3780: asm("SSP1CON3 equ 0217h");
[; <" SSP1CON3 equ 0217h ;# ">
[; ;pic16lf1509.h: 3783: extern volatile unsigned char SSPCON3 @ 0x217;
"3785
[; ;pic16lf1509.h: 3785: asm("SSPCON3 equ 0217h");
[; <" SSPCON3 equ 0217h ;# ">
[; ;pic16lf1509.h: 3788: typedef union {
[; ;pic16lf1509.h: 3789: struct {
[; ;pic16lf1509.h: 3790: unsigned DHEN :1;
[; ;pic16lf1509.h: 3791: unsigned AHEN :1;
[; ;pic16lf1509.h: 3792: unsigned SBCDE :1;
[; ;pic16lf1509.h: 3793: unsigned SDAHT :1;
[; ;pic16lf1509.h: 3794: unsigned BOEN :1;
[; ;pic16lf1509.h: 3795: unsigned SCIE :1;
[; ;pic16lf1509.h: 3796: unsigned PCIE :1;
[; ;pic16lf1509.h: 3797: unsigned ACKTIM :1;
[; ;pic16lf1509.h: 3798: };
[; ;pic16lf1509.h: 3799: } SSP1CON3bits_t;
[; ;pic16lf1509.h: 3800: extern volatile SSP1CON3bits_t SSP1CON3bits @ 0x217;
[; ;pic16lf1509.h: 3843: typedef union {
[; ;pic16lf1509.h: 3844: struct {
[; ;pic16lf1509.h: 3845: unsigned DHEN :1;
[; ;pic16lf1509.h: 3846: unsigned AHEN :1;
[; ;pic16lf1509.h: 3847: unsigned SBCDE :1;
[; ;pic16lf1509.h: 3848: unsigned SDAHT :1;
[; ;pic16lf1509.h: 3849: unsigned BOEN :1;
[; ;pic16lf1509.h: 3850: unsigned SCIE :1;
[; ;pic16lf1509.h: 3851: unsigned PCIE :1;
[; ;pic16lf1509.h: 3852: unsigned ACKTIM :1;
[; ;pic16lf1509.h: 3853: };
[; ;pic16lf1509.h: 3854: } SSPCON3bits_t;
[; ;pic16lf1509.h: 3855: extern volatile SSPCON3bits_t SSPCON3bits @ 0x217;
[; ;pic16lf1509.h: 3900: extern volatile unsigned char IOCAP @ 0x391;
"3902
[; ;pic16lf1509.h: 3902: asm("IOCAP equ 0391h");
[; <" IOCAP equ 0391h ;# ">
[; ;pic16lf1509.h: 3905: typedef union {
[; ;pic16lf1509.h: 3906: struct {
[; ;pic16lf1509.h: 3907: unsigned IOCAP0 :1;
[; ;pic16lf1509.h: 3908: unsigned IOCAP1 :1;
[; ;pic16lf1509.h: 3909: unsigned IOCAP2 :1;
[; ;pic16lf1509.h: 3910: unsigned IOCAP3 :1;
[; ;pic16lf1509.h: 3911: unsigned IOCAP4 :1;
[; ;pic16lf1509.h: 3912: unsigned IOCAP5 :1;
[; ;pic16lf1509.h: 3913: };
[; ;pic16lf1509.h: 3914: struct {
[; ;pic16lf1509.h: 3915: unsigned IOCAP :6;
[; ;pic16lf1509.h: 3916: };
[; ;pic16lf1509.h: 3917: } IOCAPbits_t;
[; ;pic16lf1509.h: 3918: extern volatile IOCAPbits_t IOCAPbits @ 0x391;
[; ;pic16lf1509.h: 3958: extern volatile unsigned char IOCAN @ 0x392;
"3960
[; ;pic16lf1509.h: 3960: asm("IOCAN equ 0392h");
[; <" IOCAN equ 0392h ;# ">
[; ;pic16lf1509.h: 3963: typedef union {
[; ;pic16lf1509.h: 3964: struct {
[; ;pic16lf1509.h: 3965: unsigned IOCAN0 :1;
[; ;pic16lf1509.h: 3966: unsigned IOCAN1 :1;
[; ;pic16lf1509.h: 3967: unsigned IOCAN2 :1;
[; ;pic16lf1509.h: 3968: unsigned IOCAN3 :1;
[; ;pic16lf1509.h: 3969: unsigned IOCAN4 :1;
[; ;pic16lf1509.h: 3970: unsigned IOCAN5 :1;
[; ;pic16lf1509.h: 3971: };
[; ;pic16lf1509.h: 3972: struct {
[; ;pic16lf1509.h: 3973: unsigned IOCAN :6;
[; ;pic16lf1509.h: 3974: };
[; ;pic16lf1509.h: 3975: } IOCANbits_t;
[; ;pic16lf1509.h: 3976: extern volatile IOCANbits_t IOCANbits @ 0x392;
[; ;pic16lf1509.h: 4016: extern volatile unsigned char IOCAF @ 0x393;
"4018
[; ;pic16lf1509.h: 4018: asm("IOCAF equ 0393h");
[; <" IOCAF equ 0393h ;# ">
[; ;pic16lf1509.h: 4021: typedef union {
[; ;pic16lf1509.h: 4022: struct {
[; ;pic16lf1509.h: 4023: unsigned IOCAF0 :1;
[; ;pic16lf1509.h: 4024: unsigned IOCAF1 :1;
[; ;pic16lf1509.h: 4025: unsigned IOCAF2 :1;
[; ;pic16lf1509.h: 4026: unsigned IOCAF3 :1;
[; ;pic16lf1509.h: 4027: unsigned IOCAF4 :1;
[; ;pic16lf1509.h: 4028: unsigned IOCAF5 :1;
[; ;pic16lf1509.h: 4029: };
[; ;pic16lf1509.h: 4030: struct {
[; ;pic16lf1509.h: 4031: unsigned IOCAF :6;
[; ;pic16lf1509.h: 4032: };
[; ;pic16lf1509.h: 4033: } IOCAFbits_t;
[; ;pic16lf1509.h: 4034: extern volatile IOCAFbits_t IOCAFbits @ 0x393;
[; ;pic16lf1509.h: 4074: extern volatile unsigned char IOCBP @ 0x394;
"4076
[; ;pic16lf1509.h: 4076: asm("IOCBP equ 0394h");
[; <" IOCBP equ 0394h ;# ">
[; ;pic16lf1509.h: 4079: typedef union {
[; ;pic16lf1509.h: 4080: struct {
[; ;pic16lf1509.h: 4081: unsigned :4;
[; ;pic16lf1509.h: 4082: unsigned IOCBP4 :1;
[; ;pic16lf1509.h: 4083: unsigned IOCBP5 :1;
[; ;pic16lf1509.h: 4084: unsigned IOCBP6 :1;
[; ;pic16lf1509.h: 4085: unsigned IOCBP7 :1;
[; ;pic16lf1509.h: 4086: };
[; ;pic16lf1509.h: 4087: struct {
[; ;pic16lf1509.h: 4088: unsigned :4;
[; ;pic16lf1509.h: 4089: unsigned IOCBP :4;
[; ;pic16lf1509.h: 4090: };
[; ;pic16lf1509.h: 4091: } IOCBPbits_t;
[; ;pic16lf1509.h: 4092: extern volatile IOCBPbits_t IOCBPbits @ 0x394;
[; ;pic16lf1509.h: 4122: extern volatile unsigned char IOCBN @ 0x395;
"4124
[; ;pic16lf1509.h: 4124: asm("IOCBN equ 0395h");
[; <" IOCBN equ 0395h ;# ">
[; ;pic16lf1509.h: 4127: typedef union {
[; ;pic16lf1509.h: 4128: struct {
[; ;pic16lf1509.h: 4129: unsigned :4;
[; ;pic16lf1509.h: 4130: unsigned IOCBN4 :1;
[; ;pic16lf1509.h: 4131: unsigned IOCBN5 :1;
[; ;pic16lf1509.h: 4132: unsigned IOCBN6 :1;
[; ;pic16lf1509.h: 4133: unsigned IOCBN7 :1;
[; ;pic16lf1509.h: 4134: };
[; ;pic16lf1509.h: 4135: struct {
[; ;pic16lf1509.h: 4136: unsigned :4;
[; ;pic16lf1509.h: 4137: unsigned IOCBN :4;
[; ;pic16lf1509.h: 4138: };
[; ;pic16lf1509.h: 4139: } IOCBNbits_t;
[; ;pic16lf1509.h: 4140: extern volatile IOCBNbits_t IOCBNbits @ 0x395;
[; ;pic16lf1509.h: 4170: extern volatile unsigned char IOCBF @ 0x396;
"4172
[; ;pic16lf1509.h: 4172: asm("IOCBF equ 0396h");
[; <" IOCBF equ 0396h ;# ">
[; ;pic16lf1509.h: 4175: typedef union {
[; ;pic16lf1509.h: 4176: struct {
[; ;pic16lf1509.h: 4177: unsigned :4;
[; ;pic16lf1509.h: 4178: unsigned IOCBF4 :1;
[; ;pic16lf1509.h: 4179: unsigned IOCBF5 :1;
[; ;pic16lf1509.h: 4180: unsigned IOCBF6 :1;
[; ;pic16lf1509.h: 4181: unsigned IOCBF7 :1;
[; ;pic16lf1509.h: 4182: };
[; ;pic16lf1509.h: 4183: struct {
[; ;pic16lf1509.h: 4184: unsigned :4;
[; ;pic16lf1509.h: 4185: unsigned IOCBF :4;
[; ;pic16lf1509.h: 4186: };
[; ;pic16lf1509.h: 4187: } IOCBFbits_t;
[; ;pic16lf1509.h: 4188: extern volatile IOCBFbits_t IOCBFbits @ 0x396;
[; ;pic16lf1509.h: 4219: extern volatile unsigned short long NCO1ACC @ 0x498;
"4222
[; ;pic16lf1509.h: 4222: asm("NCO1ACC equ 0498h");
[; <" NCO1ACC equ 0498h ;# ">
[; ;pic16lf1509.h: 4227: extern volatile unsigned char NCO1ACCL @ 0x498;
"4229
[; ;pic16lf1509.h: 4229: asm("NCO1ACCL equ 0498h");
[; <" NCO1ACCL equ 0498h ;# ">
[; ;pic16lf1509.h: 4232: typedef union {
[; ;pic16lf1509.h: 4233: struct {
[; ;pic16lf1509.h: 4234: unsigned NCO1ACC0 :1;
[; ;pic16lf1509.h: 4235: unsigned NCO1ACC1 :1;
[; ;pic16lf1509.h: 4236: unsigned NCO1ACC2 :1;
[; ;pic16lf1509.h: 4237: unsigned NCO1ACC3 :1;
[; ;pic16lf1509.h: 4238: unsigned NCO1ACC4 :1;
[; ;pic16lf1509.h: 4239: unsigned NCO1ACC5 :1;
[; ;pic16lf1509.h: 4240: unsigned NCO1ACC6 :1;
[; ;pic16lf1509.h: 4241: unsigned NCO1ACC7 :1;
[; ;pic16lf1509.h: 4242: };
[; ;pic16lf1509.h: 4243: } NCO1ACCLbits_t;
[; ;pic16lf1509.h: 4244: extern volatile NCO1ACCLbits_t NCO1ACCLbits @ 0x498;
[; ;pic16lf1509.h: 4289: extern volatile unsigned char NCO1ACCH @ 0x499;
"4291
[; ;pic16lf1509.h: 4291: asm("NCO1ACCH equ 0499h");
[; <" NCO1ACCH equ 0499h ;# ">
[; ;pic16lf1509.h: 4294: typedef union {
[; ;pic16lf1509.h: 4295: struct {
[; ;pic16lf1509.h: 4296: unsigned NCO1ACC8 :1;
[; ;pic16lf1509.h: 4297: unsigned NCO1ACC9 :1;
[; ;pic16lf1509.h: 4298: unsigned NCO1ACC10 :1;
[; ;pic16lf1509.h: 4299: unsigned NCO1ACC11 :1;
[; ;pic16lf1509.h: 4300: unsigned NCO1ACC12 :1;
[; ;pic16lf1509.h: 4301: unsigned NCO1ACC13 :1;
[; ;pic16lf1509.h: 4302: unsigned NCO1ACC14 :1;
[; ;pic16lf1509.h: 4303: unsigned NCO1ACC15 :1;
[; ;pic16lf1509.h: 4304: };
[; ;pic16lf1509.h: 4305: } NCO1ACCHbits_t;
[; ;pic16lf1509.h: 4306: extern volatile NCO1ACCHbits_t NCO1ACCHbits @ 0x499;
[; ;pic16lf1509.h: 4351: extern volatile unsigned char NCO1ACCU @ 0x49A;
"4353
[; ;pic16lf1509.h: 4353: asm("NCO1ACCU equ 049Ah");
[; <" NCO1ACCU equ 049Ah ;# ">
[; ;pic16lf1509.h: 4356: typedef union {
[; ;pic16lf1509.h: 4357: struct {
[; ;pic16lf1509.h: 4358: unsigned NCO1ACC16 :1;
[; ;pic16lf1509.h: 4359: unsigned NCO1ACC17 :1;
[; ;pic16lf1509.h: 4360: unsigned NCO1ACC18 :1;
[; ;pic16lf1509.h: 4361: unsigned NCO1ACC19 :1;
[; ;pic16lf1509.h: 4362: };
[; ;pic16lf1509.h: 4363: } NCO1ACCUbits_t;
[; ;pic16lf1509.h: 4364: extern volatile NCO1ACCUbits_t NCO1ACCUbits @ 0x49A;
[; ;pic16lf1509.h: 4390: extern volatile unsigned short long NCO1INC @ 0x49B;
"4393
[; ;pic16lf1509.h: 4393: asm("NCO1INC equ 049Bh");
[; <" NCO1INC equ 049Bh ;# ">
[; ;pic16lf1509.h: 4398: extern volatile unsigned char NCO1INCL @ 0x49B;
"4400
[; ;pic16lf1509.h: 4400: asm("NCO1INCL equ 049Bh");
[; <" NCO1INCL equ 049Bh ;# ">
[; ;pic16lf1509.h: 4403: typedef union {
[; ;pic16lf1509.h: 4404: struct {
[; ;pic16lf1509.h: 4405: unsigned NCO1INC0 :1;
[; ;pic16lf1509.h: 4406: unsigned NCO1INC1 :1;
[; ;pic16lf1509.h: 4407: unsigned NCO1INC2 :1;
[; ;pic16lf1509.h: 4408: unsigned NCO1INC3 :1;
[; ;pic16lf1509.h: 4409: unsigned NCO1INC4 :1;
[; ;pic16lf1509.h: 4410: unsigned NCO1INC5 :1;
[; ;pic16lf1509.h: 4411: unsigned NCO1INC6 :1;
[; ;pic16lf1509.h: 4412: unsigned NCO1INC7 :1;
[; ;pic16lf1509.h: 4413: };
[; ;pic16lf1509.h: 4414: } NCO1INCLbits_t;
[; ;pic16lf1509.h: 4415: extern volatile NCO1INCLbits_t NCO1INCLbits @ 0x49B;
[; ;pic16lf1509.h: 4460: extern volatile unsigned char NCO1INCH @ 0x49C;
"4462
[; ;pic16lf1509.h: 4462: asm("NCO1INCH equ 049Ch");
[; <" NCO1INCH equ 049Ch ;# ">
[; ;pic16lf1509.h: 4465: typedef union {
[; ;pic16lf1509.h: 4466: struct {
[; ;pic16lf1509.h: 4467: unsigned NCO1INC8 :1;
[; ;pic16lf1509.h: 4468: unsigned NCO1INC9 :1;
[; ;pic16lf1509.h: 4469: unsigned NCO1INC10 :1;
[; ;pic16lf1509.h: 4470: unsigned NCO1INC11 :1;
[; ;pic16lf1509.h: 4471: unsigned NCO1INC12 :1;
[; ;pic16lf1509.h: 4472: unsigned NCO1INC13 :1;
[; ;pic16lf1509.h: 4473: unsigned NCO1INC14 :1;
[; ;pic16lf1509.h: 4474: unsigned NCO1INC15 :1;
[; ;pic16lf1509.h: 4475: };
[; ;pic16lf1509.h: 4476: } NCO1INCHbits_t;
[; ;pic16lf1509.h: 4477: extern volatile NCO1INCHbits_t NCO1INCHbits @ 0x49C;
[; ;pic16lf1509.h: 4522: extern volatile unsigned char NCO1INCU @ 0x49D;
"4524
[; ;pic16lf1509.h: 4524: asm("NCO1INCU equ 049Dh");
[; <" NCO1INCU equ 049Dh ;# ">
[; ;pic16lf1509.h: 4529: extern volatile unsigned char NCO1CON @ 0x49E;
"4531
[; ;pic16lf1509.h: 4531: asm("NCO1CON equ 049Eh");
[; <" NCO1CON equ 049Eh ;# ">
[; ;pic16lf1509.h: 4534: typedef union {
[; ;pic16lf1509.h: 4535: struct {
[; ;pic16lf1509.h: 4536: unsigned N1PFM :1;
[; ;pic16lf1509.h: 4537: unsigned :3;
[; ;pic16lf1509.h: 4538: unsigned N1POL :1;
[; ;pic16lf1509.h: 4539: unsigned N1OUT :1;
[; ;pic16lf1509.h: 4540: unsigned N1OE :1;
[; ;pic16lf1509.h: 4541: unsigned N1EN :1;
[; ;pic16lf1509.h: 4542: };
[; ;pic16lf1509.h: 4543: } NCO1CONbits_t;
[; ;pic16lf1509.h: 4544: extern volatile NCO1CONbits_t NCO1CONbits @ 0x49E;
[; ;pic16lf1509.h: 4574: extern volatile unsigned char NCO1CLK @ 0x49F;
"4576
[; ;pic16lf1509.h: 4576: asm("NCO1CLK equ 049Fh");
[; <" NCO1CLK equ 049Fh ;# ">
[; ;pic16lf1509.h: 4579: typedef union {
[; ;pic16lf1509.h: 4580: struct {
[; ;pic16lf1509.h: 4581: unsigned N1CKS :4;
[; ;pic16lf1509.h: 4582: unsigned :1;
[; ;pic16lf1509.h: 4583: unsigned N1PWS :3;
[; ;pic16lf1509.h: 4584: };
[; ;pic16lf1509.h: 4585: struct {
[; ;pic16lf1509.h: 4586: unsigned N1CKS0 :1;
[; ;pic16lf1509.h: 4587: unsigned N1CKS1 :1;
[; ;pic16lf1509.h: 4588: unsigned :3;
[; ;pic16lf1509.h: 4589: unsigned N1PWS0 :1;
[; ;pic16lf1509.h: 4590: unsigned N1PWS1 :1;
[; ;pic16lf1509.h: 4591: unsigned N1PWS2 :1;
[; ;pic16lf1509.h: 4592: };
[; ;pic16lf1509.h: 4593: } NCO1CLKbits_t;
[; ;pic16lf1509.h: 4594: extern volatile NCO1CLKbits_t NCO1CLKbits @ 0x49F;
[; ;pic16lf1509.h: 4634: extern volatile unsigned char PWM1DCL @ 0x611;
"4636
[; ;pic16lf1509.h: 4636: asm("PWM1DCL equ 0611h");
[; <" PWM1DCL equ 0611h ;# ">
[; ;pic16lf1509.h: 4639: typedef union {
[; ;pic16lf1509.h: 4640: struct {
[; ;pic16lf1509.h: 4641: unsigned :6;
[; ;pic16lf1509.h: 4642: unsigned PWM1DCL :2;
[; ;pic16lf1509.h: 4643: };
[; ;pic16lf1509.h: 4644: struct {
[; ;pic16lf1509.h: 4645: unsigned :6;
[; ;pic16lf1509.h: 4646: unsigned PWM1DCL0 :1;
[; ;pic16lf1509.h: 4647: unsigned PWM1DCL1 :1;
[; ;pic16lf1509.h: 4648: };
[; ;pic16lf1509.h: 4649: } PWM1DCLbits_t;
[; ;pic16lf1509.h: 4650: extern volatile PWM1DCLbits_t PWM1DCLbits @ 0x611;
[; ;pic16lf1509.h: 4670: extern volatile unsigned char PWM1DCH @ 0x612;
"4672
[; ;pic16lf1509.h: 4672: asm("PWM1DCH equ 0612h");
[; <" PWM1DCH equ 0612h ;# ">
[; ;pic16lf1509.h: 4675: typedef union {
[; ;pic16lf1509.h: 4676: struct {
[; ;pic16lf1509.h: 4677: unsigned PWM1DCH :8;
[; ;pic16lf1509.h: 4678: };
[; ;pic16lf1509.h: 4679: struct {
[; ;pic16lf1509.h: 4680: unsigned PWM1DCH0 :1;
[; ;pic16lf1509.h: 4681: unsigned PWM1DCH1 :1;
[; ;pic16lf1509.h: 4682: unsigned PWM1DCH2 :1;
[; ;pic16lf1509.h: 4683: unsigned PWM1DCH3 :1;
[; ;pic16lf1509.h: 4684: unsigned PWM1DCH4 :1;
[; ;pic16lf1509.h: 4685: unsigned PWM1DCH5 :1;
[; ;pic16lf1509.h: 4686: unsigned PWM1DCH6 :1;
[; ;pic16lf1509.h: 4687: unsigned PWM1DCH7 :1;
[; ;pic16lf1509.h: 4688: };
[; ;pic16lf1509.h: 4689: } PWM1DCHbits_t;
[; ;pic16lf1509.h: 4690: extern volatile PWM1DCHbits_t PWM1DCHbits @ 0x612;
[; ;pic16lf1509.h: 4740: extern volatile unsigned char PWM1CON @ 0x613;
"4742
[; ;pic16lf1509.h: 4742: asm("PWM1CON equ 0613h");
[; <" PWM1CON equ 0613h ;# ">
[; ;pic16lf1509.h: 4745: extern volatile unsigned char PWM1CON0 @ 0x613;
"4747
[; ;pic16lf1509.h: 4747: asm("PWM1CON0 equ 0613h");
[; <" PWM1CON0 equ 0613h ;# ">
[; ;pic16lf1509.h: 4750: typedef union {
[; ;pic16lf1509.h: 4751: struct {
[; ;pic16lf1509.h: 4752: unsigned :4;
[; ;pic16lf1509.h: 4753: unsigned PWM1POL :1;
[; ;pic16lf1509.h: 4754: unsigned PWM1OUT :1;
[; ;pic16lf1509.h: 4755: unsigned PWM1OE :1;
[; ;pic16lf1509.h: 4756: unsigned PWM1EN :1;
[; ;pic16lf1509.h: 4757: };
[; ;pic16lf1509.h: 4758: } PWM1CONbits_t;
[; ;pic16lf1509.h: 4759: extern volatile PWM1CONbits_t PWM1CONbits @ 0x613;
[; ;pic16lf1509.h: 4782: typedef union {
[; ;pic16lf1509.h: 4783: struct {
[; ;pic16lf1509.h: 4784: unsigned :4;
[; ;pic16lf1509.h: 4785: unsigned PWM1POL :1;
[; ;pic16lf1509.h: 4786: unsigned PWM1OUT :1;
[; ;pic16lf1509.h: 4787: unsigned PWM1OE :1;
[; ;pic16lf1509.h: 4788: unsigned PWM1EN :1;
[; ;pic16lf1509.h: 4789: };
[; ;pic16lf1509.h: 4790: } PWM1CON0bits_t;
[; ;pic16lf1509.h: 4791: extern volatile PWM1CON0bits_t PWM1CON0bits @ 0x613;
[; ;pic16lf1509.h: 4816: extern volatile unsigned char PWM2DCL @ 0x614;
"4818
[; ;pic16lf1509.h: 4818: asm("PWM2DCL equ 0614h");
[; <" PWM2DCL equ 0614h ;# ">
[; ;pic16lf1509.h: 4821: typedef union {
[; ;pic16lf1509.h: 4822: struct {
[; ;pic16lf1509.h: 4823: unsigned :6;
[; ;pic16lf1509.h: 4824: unsigned PWM2DCL :2;
[; ;pic16lf1509.h: 4825: };
[; ;pic16lf1509.h: 4826: struct {
[; ;pic16lf1509.h: 4827: unsigned :6;
[; ;pic16lf1509.h: 4828: unsigned PWM2DCL0 :1;
[; ;pic16lf1509.h: 4829: unsigned PWM2DCL1 :1;
[; ;pic16lf1509.h: 4830: };
[; ;pic16lf1509.h: 4831: } PWM2DCLbits_t;
[; ;pic16lf1509.h: 4832: extern volatile PWM2DCLbits_t PWM2DCLbits @ 0x614;
[; ;pic16lf1509.h: 4852: extern volatile unsigned char PWM2DCH @ 0x615;
"4854
[; ;pic16lf1509.h: 4854: asm("PWM2DCH equ 0615h");
[; <" PWM2DCH equ 0615h ;# ">
[; ;pic16lf1509.h: 4857: typedef union {
[; ;pic16lf1509.h: 4858: struct {
[; ;pic16lf1509.h: 4859: unsigned PWM2DCH :8;
[; ;pic16lf1509.h: 4860: };
[; ;pic16lf1509.h: 4861: struct {
[; ;pic16lf1509.h: 4862: unsigned PWM2DCH0 :1;
[; ;pic16lf1509.h: 4863: unsigned PWM2DCH1 :1;
[; ;pic16lf1509.h: 4864: unsigned PWM2DCH2 :1;
[; ;pic16lf1509.h: 4865: unsigned PWM2DCH3 :1;
[; ;pic16lf1509.h: 4866: unsigned PWM2DCH4 :1;
[; ;pic16lf1509.h: 4867: unsigned PWM2DCH5 :1;
[; ;pic16lf1509.h: 4868: unsigned PWM2DCH6 :1;
[; ;pic16lf1509.h: 4869: unsigned PWM2DCH7 :1;
[; ;pic16lf1509.h: 4870: };
[; ;pic16lf1509.h: 4871: } PWM2DCHbits_t;
[; ;pic16lf1509.h: 4872: extern volatile PWM2DCHbits_t PWM2DCHbits @ 0x615;
[; ;pic16lf1509.h: 4922: extern volatile unsigned char PWM2CON @ 0x616;
"4924
[; ;pic16lf1509.h: 4924: asm("PWM2CON equ 0616h");
[; <" PWM2CON equ 0616h ;# ">
[; ;pic16lf1509.h: 4927: extern volatile unsigned char PWM2CON0 @ 0x616;
"4929
[; ;pic16lf1509.h: 4929: asm("PWM2CON0 equ 0616h");
[; <" PWM2CON0 equ 0616h ;# ">
[; ;pic16lf1509.h: 4932: typedef union {
[; ;pic16lf1509.h: 4933: struct {
[; ;pic16lf1509.h: 4934: unsigned :4;
[; ;pic16lf1509.h: 4935: unsigned PWM2POL :1;
[; ;pic16lf1509.h: 4936: unsigned PWM2OUT :1;
[; ;pic16lf1509.h: 4937: unsigned PWM2OE :1;
[; ;pic16lf1509.h: 4938: unsigned PWM2EN :1;
[; ;pic16lf1509.h: 4939: };
[; ;pic16lf1509.h: 4940: } PWM2CONbits_t;
[; ;pic16lf1509.h: 4941: extern volatile PWM2CONbits_t PWM2CONbits @ 0x616;
[; ;pic16lf1509.h: 4964: typedef union {
[; ;pic16lf1509.h: 4965: struct {
[; ;pic16lf1509.h: 4966: unsigned :4;
[; ;pic16lf1509.h: 4967: unsigned PWM2POL :1;
[; ;pic16lf1509.h: 4968: unsigned PWM2OUT :1;
[; ;pic16lf1509.h: 4969: unsigned PWM2OE :1;
[; ;pic16lf1509.h: 4970: unsigned PWM2EN :1;
[; ;pic16lf1509.h: 4971: };
[; ;pic16lf1509.h: 4972: } PWM2CON0bits_t;
[; ;pic16lf1509.h: 4973: extern volatile PWM2CON0bits_t PWM2CON0bits @ 0x616;
[; ;pic16lf1509.h: 4998: extern volatile unsigned char PWM3DCL @ 0x617;
"5000
[; ;pic16lf1509.h: 5000: asm("PWM3DCL equ 0617h");
[; <" PWM3DCL equ 0617h ;# ">
[; ;pic16lf1509.h: 5003: typedef union {
[; ;pic16lf1509.h: 5004: struct {
[; ;pic16lf1509.h: 5005: unsigned :6;
[; ;pic16lf1509.h: 5006: unsigned PWM3DCL :2;
[; ;pic16lf1509.h: 5007: };
[; ;pic16lf1509.h: 5008: struct {
[; ;pic16lf1509.h: 5009: unsigned :6;
[; ;pic16lf1509.h: 5010: unsigned PWM3DCL0 :1;
[; ;pic16lf1509.h: 5011: unsigned PWM3DCL1 :1;
[; ;pic16lf1509.h: 5012: };
[; ;pic16lf1509.h: 5013: } PWM3DCLbits_t;
[; ;pic16lf1509.h: 5014: extern volatile PWM3DCLbits_t PWM3DCLbits @ 0x617;
[; ;pic16lf1509.h: 5034: extern volatile unsigned char PWM3DCH @ 0x618;
"5036
[; ;pic16lf1509.h: 5036: asm("PWM3DCH equ 0618h");
[; <" PWM3DCH equ 0618h ;# ">
[; ;pic16lf1509.h: 5039: typedef union {
[; ;pic16lf1509.h: 5040: struct {
[; ;pic16lf1509.h: 5041: unsigned PWM3DCH :8;
[; ;pic16lf1509.h: 5042: };
[; ;pic16lf1509.h: 5043: struct {
[; ;pic16lf1509.h: 5044: unsigned PWM3DCH0 :1;
[; ;pic16lf1509.h: 5045: unsigned PWM3DCH1 :1;
[; ;pic16lf1509.h: 5046: unsigned PWM3DCH2 :1;
[; ;pic16lf1509.h: 5047: unsigned PWM3DCH3 :1;
[; ;pic16lf1509.h: 5048: unsigned PWM3DCH4 :1;
[; ;pic16lf1509.h: 5049: unsigned PWM3DCH5 :1;
[; ;pic16lf1509.h: 5050: unsigned PWM3DCH6 :1;
[; ;pic16lf1509.h: 5051: unsigned PWM3DCH7 :1;
[; ;pic16lf1509.h: 5052: };
[; ;pic16lf1509.h: 5053: } PWM3DCHbits_t;
[; ;pic16lf1509.h: 5054: extern volatile PWM3DCHbits_t PWM3DCHbits @ 0x618;
[; ;pic16lf1509.h: 5104: extern volatile unsigned char PWM3CON @ 0x619;
"5106
[; ;pic16lf1509.h: 5106: asm("PWM3CON equ 0619h");
[; <" PWM3CON equ 0619h ;# ">
[; ;pic16lf1509.h: 5109: extern volatile unsigned char PWM3CON0 @ 0x619;
"5111
[; ;pic16lf1509.h: 5111: asm("PWM3CON0 equ 0619h");
[; <" PWM3CON0 equ 0619h ;# ">
[; ;pic16lf1509.h: 5114: typedef union {
[; ;pic16lf1509.h: 5115: struct {
[; ;pic16lf1509.h: 5116: unsigned :4;
[; ;pic16lf1509.h: 5117: unsigned PWM3POL :1;
[; ;pic16lf1509.h: 5118: unsigned PWM3OUT :1;
[; ;pic16lf1509.h: 5119: unsigned PWM3OE :1;
[; ;pic16lf1509.h: 5120: unsigned PWM3EN :1;
[; ;pic16lf1509.h: 5121: };
[; ;pic16lf1509.h: 5122: } PWM3CONbits_t;
[; ;pic16lf1509.h: 5123: extern volatile PWM3CONbits_t PWM3CONbits @ 0x619;
[; ;pic16lf1509.h: 5146: typedef union {
[; ;pic16lf1509.h: 5147: struct {
[; ;pic16lf1509.h: 5148: unsigned :4;
[; ;pic16lf1509.h: 5149: unsigned PWM3POL :1;
[; ;pic16lf1509.h: 5150: unsigned PWM3OUT :1;
[; ;pic16lf1509.h: 5151: unsigned PWM3OE :1;
[; ;pic16lf1509.h: 5152: unsigned PWM3EN :1;
[; ;pic16lf1509.h: 5153: };
[; ;pic16lf1509.h: 5154: } PWM3CON0bits_t;
[; ;pic16lf1509.h: 5155: extern volatile PWM3CON0bits_t PWM3CON0bits @ 0x619;
[; ;pic16lf1509.h: 5180: extern volatile unsigned char PWM4DCL @ 0x61A;
"5182
[; ;pic16lf1509.h: 5182: asm("PWM4DCL equ 061Ah");
[; <" PWM4DCL equ 061Ah ;# ">
[; ;pic16lf1509.h: 5185: typedef union {
[; ;pic16lf1509.h: 5186: struct {
[; ;pic16lf1509.h: 5187: unsigned :6;
[; ;pic16lf1509.h: 5188: unsigned PWM4DCL :2;
[; ;pic16lf1509.h: 5189: };
[; ;pic16lf1509.h: 5190: struct {
[; ;pic16lf1509.h: 5191: unsigned :6;
[; ;pic16lf1509.h: 5192: unsigned PWM4DCL0 :1;
[; ;pic16lf1509.h: 5193: unsigned PWM4DCL1 :1;
[; ;pic16lf1509.h: 5194: };
[; ;pic16lf1509.h: 5195: } PWM4DCLbits_t;
[; ;pic16lf1509.h: 5196: extern volatile PWM4DCLbits_t PWM4DCLbits @ 0x61A;
[; ;pic16lf1509.h: 5216: extern volatile unsigned char PWM4DCH @ 0x61B;
"5218
[; ;pic16lf1509.h: 5218: asm("PWM4DCH equ 061Bh");
[; <" PWM4DCH equ 061Bh ;# ">
[; ;pic16lf1509.h: 5221: typedef union {
[; ;pic16lf1509.h: 5222: struct {
[; ;pic16lf1509.h: 5223: unsigned PWM4DCH :8;
[; ;pic16lf1509.h: 5224: };
[; ;pic16lf1509.h: 5225: struct {
[; ;pic16lf1509.h: 5226: unsigned PWM4DCH0 :1;
[; ;pic16lf1509.h: 5227: unsigned PWM4DCH1 :1;
[; ;pic16lf1509.h: 5228: unsigned PWM4DCH2 :1;
[; ;pic16lf1509.h: 5229: unsigned PWM4DCH3 :1;
[; ;pic16lf1509.h: 5230: unsigned PWM4DCH4 :1;
[; ;pic16lf1509.h: 5231: unsigned PWM4DCH5 :1;
[; ;pic16lf1509.h: 5232: unsigned PWM4DCH6 :1;
[; ;pic16lf1509.h: 5233: unsigned PWM4DCH7 :1;
[; ;pic16lf1509.h: 5234: };
[; ;pic16lf1509.h: 5235: } PWM4DCHbits_t;
[; ;pic16lf1509.h: 5236: extern volatile PWM4DCHbits_t PWM4DCHbits @ 0x61B;
[; ;pic16lf1509.h: 5286: extern volatile unsigned char PWM4CON @ 0x61C;
"5288
[; ;pic16lf1509.h: 5288: asm("PWM4CON equ 061Ch");
[; <" PWM4CON equ 061Ch ;# ">
[; ;pic16lf1509.h: 5291: extern volatile unsigned char PWM4CON0 @ 0x61C;
"5293
[; ;pic16lf1509.h: 5293: asm("PWM4CON0 equ 061Ch");
[; <" PWM4CON0 equ 061Ch ;# ">
[; ;pic16lf1509.h: 5296: typedef union {
[; ;pic16lf1509.h: 5297: struct {
[; ;pic16lf1509.h: 5298: unsigned :4;
[; ;pic16lf1509.h: 5299: unsigned PWM4POL :1;
[; ;pic16lf1509.h: 5300: unsigned PWM4OUT :1;
[; ;pic16lf1509.h: 5301: unsigned PWM4OE :1;
[; ;pic16lf1509.h: 5302: unsigned PWM4EN :1;
[; ;pic16lf1509.h: 5303: };
[; ;pic16lf1509.h: 5304: } PWM4CONbits_t;
[; ;pic16lf1509.h: 5305: extern volatile PWM4CONbits_t PWM4CONbits @ 0x61C;
[; ;pic16lf1509.h: 5328: typedef union {
[; ;pic16lf1509.h: 5329: struct {
[; ;pic16lf1509.h: 5330: unsigned :4;
[; ;pic16lf1509.h: 5331: unsigned PWM4POL :1;
[; ;pic16lf1509.h: 5332: unsigned PWM4OUT :1;
[; ;pic16lf1509.h: 5333: unsigned PWM4OE :1;
[; ;pic16lf1509.h: 5334: unsigned PWM4EN :1;
[; ;pic16lf1509.h: 5335: };
[; ;pic16lf1509.h: 5336: } PWM4CON0bits_t;
[; ;pic16lf1509.h: 5337: extern volatile PWM4CON0bits_t PWM4CON0bits @ 0x61C;
[; ;pic16lf1509.h: 5362: extern volatile unsigned char CWG1DBR @ 0x691;
"5364
[; ;pic16lf1509.h: 5364: asm("CWG1DBR equ 0691h");
[; <" CWG1DBR equ 0691h ;# ">
[; ;pic16lf1509.h: 5367: typedef union {
[; ;pic16lf1509.h: 5368: struct {
[; ;pic16lf1509.h: 5369: unsigned CWG1DBR :6;
[; ;pic16lf1509.h: 5370: };
[; ;pic16lf1509.h: 5371: struct {
[; ;pic16lf1509.h: 5372: unsigned CWG1DBR0 :1;
[; ;pic16lf1509.h: 5373: unsigned CWG1DBR1 :1;
[; ;pic16lf1509.h: 5374: unsigned CWG1DBR2 :1;
[; ;pic16lf1509.h: 5375: unsigned CWG1DBR3 :1;
[; ;pic16lf1509.h: 5376: unsigned CWG1DBR4 :1;
[; ;pic16lf1509.h: 5377: unsigned CWG1DBR5 :1;
[; ;pic16lf1509.h: 5378: };
[; ;pic16lf1509.h: 5379: } CWG1DBRbits_t;
[; ;pic16lf1509.h: 5380: extern volatile CWG1DBRbits_t CWG1DBRbits @ 0x691;
[; ;pic16lf1509.h: 5420: extern volatile unsigned char CWG1DBF @ 0x692;
"5422
[; ;pic16lf1509.h: 5422: asm("CWG1DBF equ 0692h");
[; <" CWG1DBF equ 0692h ;# ">
[; ;pic16lf1509.h: 5425: typedef union {
[; ;pic16lf1509.h: 5426: struct {
[; ;pic16lf1509.h: 5427: unsigned CWG1DBF :6;
[; ;pic16lf1509.h: 5428: };
[; ;pic16lf1509.h: 5429: struct {
[; ;pic16lf1509.h: 5430: unsigned CWG1DBF0 :1;
[; ;pic16lf1509.h: 5431: unsigned CWG1DBF1 :1;
[; ;pic16lf1509.h: 5432: unsigned CWG1DBF2 :1;
[; ;pic16lf1509.h: 5433: unsigned CWG1DBF3 :1;
[; ;pic16lf1509.h: 5434: unsigned CWG1DBF4 :1;
[; ;pic16lf1509.h: 5435: unsigned CWG1DBF5 :1;
[; ;pic16lf1509.h: 5436: };
[; ;pic16lf1509.h: 5437: } CWG1DBFbits_t;
[; ;pic16lf1509.h: 5438: extern volatile CWG1DBFbits_t CWG1DBFbits @ 0x692;
[; ;pic16lf1509.h: 5478: extern volatile unsigned char CWG1CON0 @ 0x693;
"5480
[; ;pic16lf1509.h: 5480: asm("CWG1CON0 equ 0693h");
[; <" CWG1CON0 equ 0693h ;# ">
[; ;pic16lf1509.h: 5483: typedef union {
[; ;pic16lf1509.h: 5484: struct {
[; ;pic16lf1509.h: 5485: unsigned G1CS0 :1;
[; ;pic16lf1509.h: 5486: unsigned :2;
[; ;pic16lf1509.h: 5487: unsigned G1POLA :1;
[; ;pic16lf1509.h: 5488: unsigned G1POLB :1;
[; ;pic16lf1509.h: 5489: unsigned G1OEA :1;
[; ;pic16lf1509.h: 5490: unsigned G1OEB :1;
[; ;pic16lf1509.h: 5491: unsigned G1EN :1;
[; ;pic16lf1509.h: 5492: };
[; ;pic16lf1509.h: 5493: struct {
[; ;pic16lf1509.h: 5494: unsigned G1CS :2;
[; ;pic16lf1509.h: 5495: };
[; ;pic16lf1509.h: 5496: } CWG1CON0bits_t;
[; ;pic16lf1509.h: 5497: extern volatile CWG1CON0bits_t CWG1CON0bits @ 0x693;
[; ;pic16lf1509.h: 5537: extern volatile unsigned char CWG1CON1 @ 0x694;
"5539
[; ;pic16lf1509.h: 5539: asm("CWG1CON1 equ 0694h");
[; <" CWG1CON1 equ 0694h ;# ">
[; ;pic16lf1509.h: 5542: typedef union {
[; ;pic16lf1509.h: 5543: struct {
[; ;pic16lf1509.h: 5544: unsigned G1IS0 :1;
[; ;pic16lf1509.h: 5545: unsigned G1IS1 :1;
[; ;pic16lf1509.h: 5546: unsigned G1IS2 :1;
[; ;pic16lf1509.h: 5547: unsigned :1;
[; ;pic16lf1509.h: 5548: unsigned G1ASDLA :2;
[; ;pic16lf1509.h: 5549: unsigned G1ASDLB :2;
[; ;pic16lf1509.h: 5550: };
[; ;pic16lf1509.h: 5551: struct {
[; ;pic16lf1509.h: 5552: unsigned G1IS :4;
[; ;pic16lf1509.h: 5553: unsigned G1ASDLA0 :1;
[; ;pic16lf1509.h: 5554: unsigned G1ASDLA1 :1;
[; ;pic16lf1509.h: 5555: unsigned G1ASDLB0 :1;
[; ;pic16lf1509.h: 5556: unsigned G1ASDLB1 :1;
[; ;pic16lf1509.h: 5557: };
[; ;pic16lf1509.h: 5558: } CWG1CON1bits_t;
[; ;pic16lf1509.h: 5559: extern volatile CWG1CON1bits_t CWG1CON1bits @ 0x694;
[; ;pic16lf1509.h: 5614: extern volatile unsigned char CWG1CON2 @ 0x695;
"5616
[; ;pic16lf1509.h: 5616: asm("CWG1CON2 equ 0695h");
[; <" CWG1CON2 equ 0695h ;# ">
[; ;pic16lf1509.h: 5619: typedef union {
[; ;pic16lf1509.h: 5620: struct {
[; ;pic16lf1509.h: 5621: unsigned G1ASDSCLC2 :1;
[; ;pic16lf1509.h: 5622: unsigned G1ASDSFLT :1;
[; ;pic16lf1509.h: 5623: unsigned G1ASDSC1 :1;
[; ;pic16lf1509.h: 5624: unsigned G1ASDSC2 :1;
[; ;pic16lf1509.h: 5625: unsigned :2;
[; ;pic16lf1509.h: 5626: unsigned G1ARSEN :1;
[; ;pic16lf1509.h: 5627: unsigned G1ASE :1;
[; ;pic16lf1509.h: 5628: };
[; ;pic16lf1509.h: 5629: } CWG1CON2bits_t;
[; ;pic16lf1509.h: 5630: extern volatile CWG1CON2bits_t CWG1CON2bits @ 0x695;
[; ;pic16lf1509.h: 5665: extern volatile unsigned char CLCDATA @ 0xF0F;
"5667
[; ;pic16lf1509.h: 5667: asm("CLCDATA equ 0F0Fh");
[; <" CLCDATA equ 0F0Fh ;# ">
[; ;pic16lf1509.h: 5670: typedef union {
[; ;pic16lf1509.h: 5671: struct {
[; ;pic16lf1509.h: 5672: unsigned MCLC1OUT :1;
[; ;pic16lf1509.h: 5673: unsigned MCLC2OUT :1;
[; ;pic16lf1509.h: 5674: unsigned MCLC3OUT :1;
[; ;pic16lf1509.h: 5675: unsigned MCLC4OUT :1;
[; ;pic16lf1509.h: 5676: };
[; ;pic16lf1509.h: 5677: } CLCDATAbits_t;
[; ;pic16lf1509.h: 5678: extern volatile CLCDATAbits_t CLCDATAbits @ 0xF0F;
[; ;pic16lf1509.h: 5703: extern volatile unsigned char CLC1CON @ 0xF10;
"5705
[; ;pic16lf1509.h: 5705: asm("CLC1CON equ 0F10h");
[; <" CLC1CON equ 0F10h ;# ">
[; ;pic16lf1509.h: 5708: typedef union {
[; ;pic16lf1509.h: 5709: struct {
[; ;pic16lf1509.h: 5710: unsigned LC1MODE0 :1;
[; ;pic16lf1509.h: 5711: unsigned LC1MODE1 :1;
[; ;pic16lf1509.h: 5712: unsigned LC1MODE2 :1;
[; ;pic16lf1509.h: 5713: unsigned LC1INTN :1;
[; ;pic16lf1509.h: 5714: unsigned LC1INTP :1;
[; ;pic16lf1509.h: 5715: unsigned LC1OUT :1;
[; ;pic16lf1509.h: 5716: unsigned LC1OE :1;
[; ;pic16lf1509.h: 5717: unsigned LC1EN :1;
[; ;pic16lf1509.h: 5718: };
[; ;pic16lf1509.h: 5719: struct {
[; ;pic16lf1509.h: 5720: unsigned LCMODE0 :1;
[; ;pic16lf1509.h: 5721: unsigned LCMODE1 :1;
[; ;pic16lf1509.h: 5722: unsigned LCMODE2 :1;
[; ;pic16lf1509.h: 5723: unsigned LCINTN :1;
[; ;pic16lf1509.h: 5724: unsigned LCINTP :1;
[; ;pic16lf1509.h: 5725: unsigned LCOUT :1;
[; ;pic16lf1509.h: 5726: unsigned LCOE :1;
[; ;pic16lf1509.h: 5727: unsigned LCEN :1;
[; ;pic16lf1509.h: 5728: };
[; ;pic16lf1509.h: 5729: struct {
[; ;pic16lf1509.h: 5730: unsigned LC1MODE :3;
[; ;pic16lf1509.h: 5731: };
[; ;pic16lf1509.h: 5732: } CLC1CONbits_t;
[; ;pic16lf1509.h: 5733: extern volatile CLC1CONbits_t CLC1CONbits @ 0xF10;
[; ;pic16lf1509.h: 5823: extern volatile unsigned char CLC1POL @ 0xF11;
"5825
[; ;pic16lf1509.h: 5825: asm("CLC1POL equ 0F11h");
[; <" CLC1POL equ 0F11h ;# ">
[; ;pic16lf1509.h: 5828: typedef union {
[; ;pic16lf1509.h: 5829: struct {
[; ;pic16lf1509.h: 5830: unsigned LC1G1POL :1;
[; ;pic16lf1509.h: 5831: unsigned LC1G2POL :1;
[; ;pic16lf1509.h: 5832: unsigned LC1G3POL :1;
[; ;pic16lf1509.h: 5833: unsigned LC1G4POL :1;
[; ;pic16lf1509.h: 5834: unsigned :3;
[; ;pic16lf1509.h: 5835: unsigned LC1POL :1;
[; ;pic16lf1509.h: 5836: };
[; ;pic16lf1509.h: 5837: struct {
[; ;pic16lf1509.h: 5838: unsigned G1POL :1;
[; ;pic16lf1509.h: 5839: unsigned G2POL :1;
[; ;pic16lf1509.h: 5840: unsigned G3POL :1;
[; ;pic16lf1509.h: 5841: unsigned G4POL :1;
[; ;pic16lf1509.h: 5842: unsigned :3;
[; ;pic16lf1509.h: 5843: unsigned POL :1;
[; ;pic16lf1509.h: 5844: };
[; ;pic16lf1509.h: 5845: } CLC1POLbits_t;
[; ;pic16lf1509.h: 5846: extern volatile CLC1POLbits_t CLC1POLbits @ 0xF11;
[; ;pic16lf1509.h: 5901: extern volatile unsigned char CLC1SEL0 @ 0xF12;
"5903
[; ;pic16lf1509.h: 5903: asm("CLC1SEL0 equ 0F12h");
[; <" CLC1SEL0 equ 0F12h ;# ">
[; ;pic16lf1509.h: 5906: typedef union {
[; ;pic16lf1509.h: 5907: struct {
[; ;pic16lf1509.h: 5908: unsigned LC1D1S0 :1;
[; ;pic16lf1509.h: 5909: unsigned LC1D1S1 :1;
[; ;pic16lf1509.h: 5910: unsigned LC1D1S2 :1;
[; ;pic16lf1509.h: 5911: unsigned :1;
[; ;pic16lf1509.h: 5912: unsigned LC1D2S0 :1;
[; ;pic16lf1509.h: 5913: unsigned LC1D2S1 :1;
[; ;pic16lf1509.h: 5914: unsigned LC1D2S2 :1;
[; ;pic16lf1509.h: 5915: };
[; ;pic16lf1509.h: 5916: struct {
[; ;pic16lf1509.h: 5917: unsigned D1S0 :1;
[; ;pic16lf1509.h: 5918: unsigned D1S1 :1;
[; ;pic16lf1509.h: 5919: unsigned D1S2 :1;
[; ;pic16lf1509.h: 5920: unsigned :1;
[; ;pic16lf1509.h: 5921: unsigned D2S0 :1;
[; ;pic16lf1509.h: 5922: unsigned D2S1 :1;
[; ;pic16lf1509.h: 5923: unsigned D2S2 :1;
[; ;pic16lf1509.h: 5924: };
[; ;pic16lf1509.h: 5925: struct {
[; ;pic16lf1509.h: 5926: unsigned LC1D1S :3;
[; ;pic16lf1509.h: 5927: unsigned :1;
[; ;pic16lf1509.h: 5928: unsigned LC1D2S :3;
[; ;pic16lf1509.h: 5929: };
[; ;pic16lf1509.h: 5930: } CLC1SEL0bits_t;
[; ;pic16lf1509.h: 5931: extern volatile CLC1SEL0bits_t CLC1SEL0bits @ 0xF12;
[; ;pic16lf1509.h: 6006: extern volatile unsigned char CLC1SEL1 @ 0xF13;
"6008
[; ;pic16lf1509.h: 6008: asm("CLC1SEL1 equ 0F13h");
[; <" CLC1SEL1 equ 0F13h ;# ">
[; ;pic16lf1509.h: 6011: typedef union {
[; ;pic16lf1509.h: 6012: struct {
[; ;pic16lf1509.h: 6013: unsigned LC1D3S0 :1;
[; ;pic16lf1509.h: 6014: unsigned LC1D3S1 :1;
[; ;pic16lf1509.h: 6015: unsigned LC1D3S2 :1;
[; ;pic16lf1509.h: 6016: unsigned :1;
[; ;pic16lf1509.h: 6017: unsigned LC1D4S0 :1;
[; ;pic16lf1509.h: 6018: unsigned LC1D4S1 :1;
[; ;pic16lf1509.h: 6019: unsigned LC1D4S2 :1;
[; ;pic16lf1509.h: 6020: };
[; ;pic16lf1509.h: 6021: struct {
[; ;pic16lf1509.h: 6022: unsigned D3S0 :1;
[; ;pic16lf1509.h: 6023: unsigned D3S1 :1;
[; ;pic16lf1509.h: 6024: unsigned D3S2 :1;
[; ;pic16lf1509.h: 6025: unsigned :1;
[; ;pic16lf1509.h: 6026: unsigned D4S0 :1;
[; ;pic16lf1509.h: 6027: unsigned D4S1 :1;
[; ;pic16lf1509.h: 6028: unsigned D4S2 :1;
[; ;pic16lf1509.h: 6029: };
[; ;pic16lf1509.h: 6030: struct {
[; ;pic16lf1509.h: 6031: unsigned LC1D3S :3;
[; ;pic16lf1509.h: 6032: unsigned :1;
[; ;pic16lf1509.h: 6033: unsigned LC1D4S :3;
[; ;pic16lf1509.h: 6034: };
[; ;pic16lf1509.h: 6035: } CLC1SEL1bits_t;
[; ;pic16lf1509.h: 6036: extern volatile CLC1SEL1bits_t CLC1SEL1bits @ 0xF13;
[; ;pic16lf1509.h: 6111: extern volatile unsigned char CLC1GLS0 @ 0xF14;
"6113
[; ;pic16lf1509.h: 6113: asm("CLC1GLS0 equ 0F14h");
[; <" CLC1GLS0 equ 0F14h ;# ">
[; ;pic16lf1509.h: 6116: typedef union {
[; ;pic16lf1509.h: 6117: struct {
[; ;pic16lf1509.h: 6118: unsigned LC1G1D1N :1;
[; ;pic16lf1509.h: 6119: unsigned LC1G1D1T :1;
[; ;pic16lf1509.h: 6120: unsigned LC1G1D2N :1;
[; ;pic16lf1509.h: 6121: unsigned LC1G1D2T :1;
[; ;pic16lf1509.h: 6122: unsigned LC1G1D3N :1;
[; ;pic16lf1509.h: 6123: unsigned LC1G1D3T :1;
[; ;pic16lf1509.h: 6124: unsigned LC1G1D4N :1;
[; ;pic16lf1509.h: 6125: unsigned LC1G1D4T :1;
[; ;pic16lf1509.h: 6126: };
[; ;pic16lf1509.h: 6127: struct {
[; ;pic16lf1509.h: 6128: unsigned D1N :1;
[; ;pic16lf1509.h: 6129: unsigned D1T :1;
[; ;pic16lf1509.h: 6130: unsigned D2N :1;
[; ;pic16lf1509.h: 6131: unsigned D2T :1;
[; ;pic16lf1509.h: 6132: unsigned D3N :1;
[; ;pic16lf1509.h: 6133: unsigned D3T :1;
[; ;pic16lf1509.h: 6134: unsigned D4N :1;
[; ;pic16lf1509.h: 6135: unsigned D4T :1;
[; ;pic16lf1509.h: 6136: };
[; ;pic16lf1509.h: 6137: } CLC1GLS0bits_t;
[; ;pic16lf1509.h: 6138: extern volatile CLC1GLS0bits_t CLC1GLS0bits @ 0xF14;
[; ;pic16lf1509.h: 6223: extern volatile unsigned char CLC1GLS1 @ 0xF15;
"6225
[; ;pic16lf1509.h: 6225: asm("CLC1GLS1 equ 0F15h");
[; <" CLC1GLS1 equ 0F15h ;# ">
[; ;pic16lf1509.h: 6228: typedef union {
[; ;pic16lf1509.h: 6229: struct {
[; ;pic16lf1509.h: 6230: unsigned LC1G2D1N :1;
[; ;pic16lf1509.h: 6231: unsigned LC1G2D1T :1;
[; ;pic16lf1509.h: 6232: unsigned LC1G2D2N :1;
[; ;pic16lf1509.h: 6233: unsigned LC1G2D2T :1;
[; ;pic16lf1509.h: 6234: unsigned LC1G2D3N :1;
[; ;pic16lf1509.h: 6235: unsigned LC1G2D3T :1;
[; ;pic16lf1509.h: 6236: unsigned LC1G2D4N :1;
[; ;pic16lf1509.h: 6237: unsigned LC1G2D4T :1;
[; ;pic16lf1509.h: 6238: };
[; ;pic16lf1509.h: 6239: struct {
[; ;pic16lf1509.h: 6240: unsigned D1N :1;
[; ;pic16lf1509.h: 6241: unsigned D1T :1;
[; ;pic16lf1509.h: 6242: unsigned D2N :1;
[; ;pic16lf1509.h: 6243: unsigned D2T :1;
[; ;pic16lf1509.h: 6244: unsigned D3N :1;
[; ;pic16lf1509.h: 6245: unsigned D3T :1;
[; ;pic16lf1509.h: 6246: unsigned D4N :1;
[; ;pic16lf1509.h: 6247: unsigned D4T :1;
[; ;pic16lf1509.h: 6248: };
[; ;pic16lf1509.h: 6249: } CLC1GLS1bits_t;
[; ;pic16lf1509.h: 6250: extern volatile CLC1GLS1bits_t CLC1GLS1bits @ 0xF15;
[; ;pic16lf1509.h: 6335: extern volatile unsigned char CLC1GLS2 @ 0xF16;
"6337
[; ;pic16lf1509.h: 6337: asm("CLC1GLS2 equ 0F16h");
[; <" CLC1GLS2 equ 0F16h ;# ">
[; ;pic16lf1509.h: 6340: typedef union {
[; ;pic16lf1509.h: 6341: struct {
[; ;pic16lf1509.h: 6342: unsigned LC1G3D1N :1;
[; ;pic16lf1509.h: 6343: unsigned LC1G3D1T :1;
[; ;pic16lf1509.h: 6344: unsigned LC1G3D2N :1;
[; ;pic16lf1509.h: 6345: unsigned LC1G3D2T :1;
[; ;pic16lf1509.h: 6346: unsigned LC1G3D3N :1;
[; ;pic16lf1509.h: 6347: unsigned LC1G3D3T :1;
[; ;pic16lf1509.h: 6348: unsigned LC1G3D4N :1;
[; ;pic16lf1509.h: 6349: unsigned LC1G3D4T :1;
[; ;pic16lf1509.h: 6350: };
[; ;pic16lf1509.h: 6351: struct {
[; ;pic16lf1509.h: 6352: unsigned D1N :1;
[; ;pic16lf1509.h: 6353: unsigned D1T :1;
[; ;pic16lf1509.h: 6354: unsigned D2N :1;
[; ;pic16lf1509.h: 6355: unsigned D2T :1;
[; ;pic16lf1509.h: 6356: unsigned D3N :1;
[; ;pic16lf1509.h: 6357: unsigned D3T :1;
[; ;pic16lf1509.h: 6358: unsigned D4N :1;
[; ;pic16lf1509.h: 6359: unsigned D4T :1;
[; ;pic16lf1509.h: 6360: };
[; ;pic16lf1509.h: 6361: } CLC1GLS2bits_t;
[; ;pic16lf1509.h: 6362: extern volatile CLC1GLS2bits_t CLC1GLS2bits @ 0xF16;
[; ;pic16lf1509.h: 6447: extern volatile unsigned char CLC1GLS3 @ 0xF17;
"6449
[; ;pic16lf1509.h: 6449: asm("CLC1GLS3 equ 0F17h");
[; <" CLC1GLS3 equ 0F17h ;# ">
[; ;pic16lf1509.h: 6452: typedef union {
[; ;pic16lf1509.h: 6453: struct {
[; ;pic16lf1509.h: 6454: unsigned LC1G4D1N :1;
[; ;pic16lf1509.h: 6455: unsigned LC1G4D1T :1;
[; ;pic16lf1509.h: 6456: unsigned LC1G4D2N :1;
[; ;pic16lf1509.h: 6457: unsigned LC1G4D2T :1;
[; ;pic16lf1509.h: 6458: unsigned LC1G4D3N :1;
[; ;pic16lf1509.h: 6459: unsigned LC1G4D3T :1;
[; ;pic16lf1509.h: 6460: unsigned LC1G4D4N :1;
[; ;pic16lf1509.h: 6461: unsigned LC1G4D4T :1;
[; ;pic16lf1509.h: 6462: };
[; ;pic16lf1509.h: 6463: struct {
[; ;pic16lf1509.h: 6464: unsigned G4D1N :1;
[; ;pic16lf1509.h: 6465: unsigned G4D1T :1;
[; ;pic16lf1509.h: 6466: unsigned G4D2N :1;
[; ;pic16lf1509.h: 6467: unsigned G4D2T :1;
[; ;pic16lf1509.h: 6468: unsigned G4D3N :1;
[; ;pic16lf1509.h: 6469: unsigned G4D3T :1;
[; ;pic16lf1509.h: 6470: unsigned G4D4N :1;
[; ;pic16lf1509.h: 6471: unsigned G4D4T :1;
[; ;pic16lf1509.h: 6472: };
[; ;pic16lf1509.h: 6473: } CLC1GLS3bits_t;
[; ;pic16lf1509.h: 6474: extern volatile CLC1GLS3bits_t CLC1GLS3bits @ 0xF17;
[; ;pic16lf1509.h: 6559: extern volatile unsigned char CLC2CON @ 0xF18;
"6561
[; ;pic16lf1509.h: 6561: asm("CLC2CON equ 0F18h");
[; <" CLC2CON equ 0F18h ;# ">
[; ;pic16lf1509.h: 6564: typedef union {
[; ;pic16lf1509.h: 6565: struct {
[; ;pic16lf1509.h: 6566: unsigned LC2MODE0 :1;
[; ;pic16lf1509.h: 6567: unsigned LC2MODE1 :1;
[; ;pic16lf1509.h: 6568: unsigned LC2MODE2 :1;
[; ;pic16lf1509.h: 6569: unsigned LC2INTN :1;
[; ;pic16lf1509.h: 6570: unsigned LC2INTP :1;
[; ;pic16lf1509.h: 6571: unsigned LC2OUT :1;
[; ;pic16lf1509.h: 6572: unsigned LC2OE :1;
[; ;pic16lf1509.h: 6573: unsigned LC2EN :1;
[; ;pic16lf1509.h: 6574: };
[; ;pic16lf1509.h: 6575: struct {
[; ;pic16lf1509.h: 6576: unsigned LCMODE0 :1;
[; ;pic16lf1509.h: 6577: unsigned LCMODE1 :1;
[; ;pic16lf1509.h: 6578: unsigned LCMODE2 :1;
[; ;pic16lf1509.h: 6579: unsigned LCINTN :1;
[; ;pic16lf1509.h: 6580: unsigned LCINTP :1;
[; ;pic16lf1509.h: 6581: unsigned LCOUT :1;
[; ;pic16lf1509.h: 6582: unsigned LCOE :1;
[; ;pic16lf1509.h: 6583: unsigned LCEN :1;
[; ;pic16lf1509.h: 6584: };
[; ;pic16lf1509.h: 6585: struct {
[; ;pic16lf1509.h: 6586: unsigned LC2MODE :3;
[; ;pic16lf1509.h: 6587: };
[; ;pic16lf1509.h: 6588: } CLC2CONbits_t;
[; ;pic16lf1509.h: 6589: extern volatile CLC2CONbits_t CLC2CONbits @ 0xF18;
[; ;pic16lf1509.h: 6679: extern volatile unsigned char CLC2POL @ 0xF19;
"6681
[; ;pic16lf1509.h: 6681: asm("CLC2POL equ 0F19h");
[; <" CLC2POL equ 0F19h ;# ">
[; ;pic16lf1509.h: 6684: typedef union {
[; ;pic16lf1509.h: 6685: struct {
[; ;pic16lf1509.h: 6686: unsigned LC2G1POL :1;
[; ;pic16lf1509.h: 6687: unsigned LC2G2POL :1;
[; ;pic16lf1509.h: 6688: unsigned LC2G3POL :1;
[; ;pic16lf1509.h: 6689: unsigned LC2G4POL :1;
[; ;pic16lf1509.h: 6690: unsigned :3;
[; ;pic16lf1509.h: 6691: unsigned LC2POL :1;
[; ;pic16lf1509.h: 6692: };
[; ;pic16lf1509.h: 6693: struct {
[; ;pic16lf1509.h: 6694: unsigned G1POL :1;
[; ;pic16lf1509.h: 6695: unsigned G2POL :1;
[; ;pic16lf1509.h: 6696: unsigned G3POL :1;
[; ;pic16lf1509.h: 6697: unsigned G4POL :1;
[; ;pic16lf1509.h: 6698: unsigned :3;
[; ;pic16lf1509.h: 6699: unsigned POL :1;
[; ;pic16lf1509.h: 6700: };
[; ;pic16lf1509.h: 6701: } CLC2POLbits_t;
[; ;pic16lf1509.h: 6702: extern volatile CLC2POLbits_t CLC2POLbits @ 0xF19;
[; ;pic16lf1509.h: 6757: extern volatile unsigned char CLC2SEL0 @ 0xF1A;
"6759
[; ;pic16lf1509.h: 6759: asm("CLC2SEL0 equ 0F1Ah");
[; <" CLC2SEL0 equ 0F1Ah ;# ">
[; ;pic16lf1509.h: 6762: typedef union {
[; ;pic16lf1509.h: 6763: struct {
[; ;pic16lf1509.h: 6764: unsigned LC2D1S0 :1;
[; ;pic16lf1509.h: 6765: unsigned LC2D1S1 :1;
[; ;pic16lf1509.h: 6766: unsigned LC2D1S2 :1;
[; ;pic16lf1509.h: 6767: unsigned :1;
[; ;pic16lf1509.h: 6768: unsigned LC2D2S0 :1;
[; ;pic16lf1509.h: 6769: unsigned LC2D2S1 :1;
[; ;pic16lf1509.h: 6770: unsigned LC2D2S2 :1;
[; ;pic16lf1509.h: 6771: };
[; ;pic16lf1509.h: 6772: struct {
[; ;pic16lf1509.h: 6773: unsigned D1S0 :1;
[; ;pic16lf1509.h: 6774: unsigned D1S1 :1;
[; ;pic16lf1509.h: 6775: unsigned D1S2 :1;
[; ;pic16lf1509.h: 6776: unsigned :1;
[; ;pic16lf1509.h: 6777: unsigned D2S0 :1;
[; ;pic16lf1509.h: 6778: unsigned D2S1 :1;
[; ;pic16lf1509.h: 6779: unsigned D2S2 :1;
[; ;pic16lf1509.h: 6780: };
[; ;pic16lf1509.h: 6781: struct {
[; ;pic16lf1509.h: 6782: unsigned LC2D1S :3;
[; ;pic16lf1509.h: 6783: unsigned :1;
[; ;pic16lf1509.h: 6784: unsigned LC2D2S :3;
[; ;pic16lf1509.h: 6785: };
[; ;pic16lf1509.h: 6786: } CLC2SEL0bits_t;
[; ;pic16lf1509.h: 6787: extern volatile CLC2SEL0bits_t CLC2SEL0bits @ 0xF1A;
[; ;pic16lf1509.h: 6862: extern volatile unsigned char CLC2SEL1 @ 0xF1B;
"6864
[; ;pic16lf1509.h: 6864: asm("CLC2SEL1 equ 0F1Bh");
[; <" CLC2SEL1 equ 0F1Bh ;# ">
[; ;pic16lf1509.h: 6867: typedef union {
[; ;pic16lf1509.h: 6868: struct {
[; ;pic16lf1509.h: 6869: unsigned LC2D3S0 :1;
[; ;pic16lf1509.h: 6870: unsigned LC2D3S1 :1;
[; ;pic16lf1509.h: 6871: unsigned LC2D3S2 :1;
[; ;pic16lf1509.h: 6872: unsigned :1;
[; ;pic16lf1509.h: 6873: unsigned LC2D4S0 :1;
[; ;pic16lf1509.h: 6874: unsigned LC2D4S1 :1;
[; ;pic16lf1509.h: 6875: unsigned LC2D4S2 :1;
[; ;pic16lf1509.h: 6876: };
[; ;pic16lf1509.h: 6877: struct {
[; ;pic16lf1509.h: 6878: unsigned D3S0 :1;
[; ;pic16lf1509.h: 6879: unsigned D3S1 :1;
[; ;pic16lf1509.h: 6880: unsigned D3S2 :1;
[; ;pic16lf1509.h: 6881: unsigned :1;
[; ;pic16lf1509.h: 6882: unsigned D4S0 :1;
[; ;pic16lf1509.h: 6883: unsigned D4S1 :1;
[; ;pic16lf1509.h: 6884: unsigned D4S2 :1;
[; ;pic16lf1509.h: 6885: };
[; ;pic16lf1509.h: 6886: struct {
[; ;pic16lf1509.h: 6887: unsigned LC2D3S :3;
[; ;pic16lf1509.h: 6888: unsigned :1;
[; ;pic16lf1509.h: 6889: unsigned LC2D4S :3;
[; ;pic16lf1509.h: 6890: };
[; ;pic16lf1509.h: 6891: } CLC2SEL1bits_t;
[; ;pic16lf1509.h: 6892: extern volatile CLC2SEL1bits_t CLC2SEL1bits @ 0xF1B;
[; ;pic16lf1509.h: 6967: extern volatile unsigned char CLC2GLS0 @ 0xF1C;
"6969
[; ;pic16lf1509.h: 6969: asm("CLC2GLS0 equ 0F1Ch");
[; <" CLC2GLS0 equ 0F1Ch ;# ">
[; ;pic16lf1509.h: 6972: typedef union {
[; ;pic16lf1509.h: 6973: struct {
[; ;pic16lf1509.h: 6974: unsigned LC2G1D1N :1;
[; ;pic16lf1509.h: 6975: unsigned LC2G1D1T :1;
[; ;pic16lf1509.h: 6976: unsigned LC2G1D2N :1;
[; ;pic16lf1509.h: 6977: unsigned LC2G1D2T :1;
[; ;pic16lf1509.h: 6978: unsigned LC2G1D3N :1;
[; ;pic16lf1509.h: 6979: unsigned LC2G1D3T :1;
[; ;pic16lf1509.h: 6980: unsigned LC2G1D4N :1;
[; ;pic16lf1509.h: 6981: unsigned LC2G1D4T :1;
[; ;pic16lf1509.h: 6982: };
[; ;pic16lf1509.h: 6983: struct {
[; ;pic16lf1509.h: 6984: unsigned D1N :1;
[; ;pic16lf1509.h: 6985: unsigned D1T :1;
[; ;pic16lf1509.h: 6986: unsigned D2N :1;
[; ;pic16lf1509.h: 6987: unsigned D2T :1;
[; ;pic16lf1509.h: 6988: unsigned D3N :1;
[; ;pic16lf1509.h: 6989: unsigned D3T :1;
[; ;pic16lf1509.h: 6990: unsigned D4N :1;
[; ;pic16lf1509.h: 6991: unsigned D4T :1;
[; ;pic16lf1509.h: 6992: };
[; ;pic16lf1509.h: 6993: } CLC2GLS0bits_t;
[; ;pic16lf1509.h: 6994: extern volatile CLC2GLS0bits_t CLC2GLS0bits @ 0xF1C;
[; ;pic16lf1509.h: 7079: extern volatile unsigned char CLC2GLS1 @ 0xF1D;
"7081
[; ;pic16lf1509.h: 7081: asm("CLC2GLS1 equ 0F1Dh");
[; <" CLC2GLS1 equ 0F1Dh ;# ">
[; ;pic16lf1509.h: 7084: typedef union {
[; ;pic16lf1509.h: 7085: struct {
[; ;pic16lf1509.h: 7086: unsigned LC2G2D1N :1;
[; ;pic16lf1509.h: 7087: unsigned LC2G2D1T :1;
[; ;pic16lf1509.h: 7088: unsigned LC2G2D2N :1;
[; ;pic16lf1509.h: 7089: unsigned LC2G2D2T :1;
[; ;pic16lf1509.h: 7090: unsigned LC2G2D3N :1;
[; ;pic16lf1509.h: 7091: unsigned LC2G2D3T :1;
[; ;pic16lf1509.h: 7092: unsigned LC2G2D4N :1;
[; ;pic16lf1509.h: 7093: unsigned LC2G2D4T :1;
[; ;pic16lf1509.h: 7094: };
[; ;pic16lf1509.h: 7095: struct {
[; ;pic16lf1509.h: 7096: unsigned D1N :1;
[; ;pic16lf1509.h: 7097: unsigned D1T :1;
[; ;pic16lf1509.h: 7098: unsigned D2N :1;
[; ;pic16lf1509.h: 7099: unsigned D2T :1;
[; ;pic16lf1509.h: 7100: unsigned D3N :1;
[; ;pic16lf1509.h: 7101: unsigned D3T :1;
[; ;pic16lf1509.h: 7102: unsigned D4N :1;
[; ;pic16lf1509.h: 7103: unsigned D4T :1;
[; ;pic16lf1509.h: 7104: };
[; ;pic16lf1509.h: 7105: } CLC2GLS1bits_t;
[; ;pic16lf1509.h: 7106: extern volatile CLC2GLS1bits_t CLC2GLS1bits @ 0xF1D;
[; ;pic16lf1509.h: 7191: extern volatile unsigned char CLC2GLS2 @ 0xF1E;
"7193
[; ;pic16lf1509.h: 7193: asm("CLC2GLS2 equ 0F1Eh");
[; <" CLC2GLS2 equ 0F1Eh ;# ">
[; ;pic16lf1509.h: 7196: typedef union {
[; ;pic16lf1509.h: 7197: struct {
[; ;pic16lf1509.h: 7198: unsigned LC2G3D1N :1;
[; ;pic16lf1509.h: 7199: unsigned LC2G3D1T :1;
[; ;pic16lf1509.h: 7200: unsigned LC2G3D2N :1;
[; ;pic16lf1509.h: 7201: unsigned LC2G3D2T :1;
[; ;pic16lf1509.h: 7202: unsigned LC2G3D3N :1;
[; ;pic16lf1509.h: 7203: unsigned LC2G3D3T :1;
[; ;pic16lf1509.h: 7204: unsigned LC2G3D4N :1;
[; ;pic16lf1509.h: 7205: unsigned LC2G3D4T :1;
[; ;pic16lf1509.h: 7206: };
[; ;pic16lf1509.h: 7207: struct {
[; ;pic16lf1509.h: 7208: unsigned D1N :1;
[; ;pic16lf1509.h: 7209: unsigned D1T :1;
[; ;pic16lf1509.h: 7210: unsigned D2N :1;
[; ;pic16lf1509.h: 7211: unsigned D2T :1;
[; ;pic16lf1509.h: 7212: unsigned D3N :1;
[; ;pic16lf1509.h: 7213: unsigned D3T :1;
[; ;pic16lf1509.h: 7214: unsigned D4N :1;
[; ;pic16lf1509.h: 7215: unsigned D4T :1;
[; ;pic16lf1509.h: 7216: };
[; ;pic16lf1509.h: 7217: } CLC2GLS2bits_t;
[; ;pic16lf1509.h: 7218: extern volatile CLC2GLS2bits_t CLC2GLS2bits @ 0xF1E;
[; ;pic16lf1509.h: 7303: extern volatile unsigned char CLC2GLS3 @ 0xF1F;
"7305
[; ;pic16lf1509.h: 7305: asm("CLC2GLS3 equ 0F1Fh");
[; <" CLC2GLS3 equ 0F1Fh ;# ">
[; ;pic16lf1509.h: 7308: typedef union {
[; ;pic16lf1509.h: 7309: struct {
[; ;pic16lf1509.h: 7310: unsigned LC2G4D1N :1;
[; ;pic16lf1509.h: 7311: unsigned LC2G4D1T :1;
[; ;pic16lf1509.h: 7312: unsigned LC2G4D2N :1;
[; ;pic16lf1509.h: 7313: unsigned LC2G4D2T :1;
[; ;pic16lf1509.h: 7314: unsigned LC2G4D3N :1;
[; ;pic16lf1509.h: 7315: unsigned LC2G4D3T :1;
[; ;pic16lf1509.h: 7316: unsigned LC2G4D4N :1;
[; ;pic16lf1509.h: 7317: unsigned LC2G4D4T :1;
[; ;pic16lf1509.h: 7318: };
[; ;pic16lf1509.h: 7319: struct {
[; ;pic16lf1509.h: 7320: unsigned G4D1N :1;
[; ;pic16lf1509.h: 7321: unsigned G4D1T :1;
[; ;pic16lf1509.h: 7322: unsigned G4D2N :1;
[; ;pic16lf1509.h: 7323: unsigned G4D2T :1;
[; ;pic16lf1509.h: 7324: unsigned G4D3N :1;
[; ;pic16lf1509.h: 7325: unsigned G4D3T :1;
[; ;pic16lf1509.h: 7326: unsigned G4D4N :1;
[; ;pic16lf1509.h: 7327: unsigned G4D4T :1;
[; ;pic16lf1509.h: 7328: };
[; ;pic16lf1509.h: 7329: } CLC2GLS3bits_t;
[; ;pic16lf1509.h: 7330: extern volatile CLC2GLS3bits_t CLC2GLS3bits @ 0xF1F;
[; ;pic16lf1509.h: 7415: extern volatile unsigned char CLC3CON @ 0xF20;
"7417
[; ;pic16lf1509.h: 7417: asm("CLC3CON equ 0F20h");
[; <" CLC3CON equ 0F20h ;# ">
[; ;pic16lf1509.h: 7420: typedef union {
[; ;pic16lf1509.h: 7421: struct {
[; ;pic16lf1509.h: 7422: unsigned LC3MODE0 :1;
[; ;pic16lf1509.h: 7423: unsigned LC3MODE1 :1;
[; ;pic16lf1509.h: 7424: unsigned LC3MODE2 :1;
[; ;pic16lf1509.h: 7425: unsigned LC3INTN :1;
[; ;pic16lf1509.h: 7426: unsigned LC3INTP :1;
[; ;pic16lf1509.h: 7427: unsigned LC3OUT :1;
[; ;pic16lf1509.h: 7428: unsigned LC3OE :1;
[; ;pic16lf1509.h: 7429: unsigned LC3EN :1;
[; ;pic16lf1509.h: 7430: };
[; ;pic16lf1509.h: 7431: struct {
[; ;pic16lf1509.h: 7432: unsigned LCMODE0 :1;
[; ;pic16lf1509.h: 7433: unsigned LCMODE1 :1;
[; ;pic16lf1509.h: 7434: unsigned LCMODE2 :1;
[; ;pic16lf1509.h: 7435: unsigned LCINTN :1;
[; ;pic16lf1509.h: 7436: unsigned LCINTP :1;
[; ;pic16lf1509.h: 7437: unsigned LCOUT :1;
[; ;pic16lf1509.h: 7438: unsigned LCOE :1;
[; ;pic16lf1509.h: 7439: unsigned LCEN :1;
[; ;pic16lf1509.h: 7440: };
[; ;pic16lf1509.h: 7441: struct {
[; ;pic16lf1509.h: 7442: unsigned LC3MODE :3;
[; ;pic16lf1509.h: 7443: };
[; ;pic16lf1509.h: 7444: } CLC3CONbits_t;
[; ;pic16lf1509.h: 7445: extern volatile CLC3CONbits_t CLC3CONbits @ 0xF20;
[; ;pic16lf1509.h: 7535: extern volatile unsigned char CLC3POL @ 0xF21;
"7537
[; ;pic16lf1509.h: 7537: asm("CLC3POL equ 0F21h");
[; <" CLC3POL equ 0F21h ;# ">
[; ;pic16lf1509.h: 7540: typedef union {
[; ;pic16lf1509.h: 7541: struct {
[; ;pic16lf1509.h: 7542: unsigned LC3G1POL :1;
[; ;pic16lf1509.h: 7543: unsigned LC3G2POL :1;
[; ;pic16lf1509.h: 7544: unsigned LC3G3POL :1;
[; ;pic16lf1509.h: 7545: unsigned LC3G4POL :1;
[; ;pic16lf1509.h: 7546: unsigned :3;
[; ;pic16lf1509.h: 7547: unsigned LC3POL :1;
[; ;pic16lf1509.h: 7548: };
[; ;pic16lf1509.h: 7549: struct {
[; ;pic16lf1509.h: 7550: unsigned G1POL :1;
[; ;pic16lf1509.h: 7551: unsigned G2POL :1;
[; ;pic16lf1509.h: 7552: unsigned G3POL :1;
[; ;pic16lf1509.h: 7553: unsigned G4POL :1;
[; ;pic16lf1509.h: 7554: unsigned :3;
[; ;pic16lf1509.h: 7555: unsigned POL :1;
[; ;pic16lf1509.h: 7556: };
[; ;pic16lf1509.h: 7557: } CLC3POLbits_t;
[; ;pic16lf1509.h: 7558: extern volatile CLC3POLbits_t CLC3POLbits @ 0xF21;
[; ;pic16lf1509.h: 7613: extern volatile unsigned char CLC3SEL0 @ 0xF22;
"7615
[; ;pic16lf1509.h: 7615: asm("CLC3SEL0 equ 0F22h");
[; <" CLC3SEL0 equ 0F22h ;# ">
[; ;pic16lf1509.h: 7618: typedef union {
[; ;pic16lf1509.h: 7619: struct {
[; ;pic16lf1509.h: 7620: unsigned LC3D1S0 :1;
[; ;pic16lf1509.h: 7621: unsigned LC3D1S1 :1;
[; ;pic16lf1509.h: 7622: unsigned LC3D1S2 :1;
[; ;pic16lf1509.h: 7623: unsigned :1;
[; ;pic16lf1509.h: 7624: unsigned LC3D2S0 :1;
[; ;pic16lf1509.h: 7625: unsigned LC3D2S1 :1;
[; ;pic16lf1509.h: 7626: unsigned LC3D2S2 :1;
[; ;pic16lf1509.h: 7627: };
[; ;pic16lf1509.h: 7628: struct {
[; ;pic16lf1509.h: 7629: unsigned D1S0 :1;
[; ;pic16lf1509.h: 7630: unsigned D1S1 :1;
[; ;pic16lf1509.h: 7631: unsigned D1S2 :1;
[; ;pic16lf1509.h: 7632: unsigned :1;
[; ;pic16lf1509.h: 7633: unsigned D2S0 :1;
[; ;pic16lf1509.h: 7634: unsigned D2S1 :1;
[; ;pic16lf1509.h: 7635: unsigned D2S2 :1;
[; ;pic16lf1509.h: 7636: };
[; ;pic16lf1509.h: 7637: struct {
[; ;pic16lf1509.h: 7638: unsigned LC3D1S :3;
[; ;pic16lf1509.h: 7639: unsigned :1;
[; ;pic16lf1509.h: 7640: unsigned LC3D2S :3;
[; ;pic16lf1509.h: 7641: };
[; ;pic16lf1509.h: 7642: } CLC3SEL0bits_t;
[; ;pic16lf1509.h: 7643: extern volatile CLC3SEL0bits_t CLC3SEL0bits @ 0xF22;
[; ;pic16lf1509.h: 7718: extern volatile unsigned char CLC3SEL1 @ 0xF23;
"7720
[; ;pic16lf1509.h: 7720: asm("CLC3SEL1 equ 0F23h");
[; <" CLC3SEL1 equ 0F23h ;# ">
[; ;pic16lf1509.h: 7723: typedef union {
[; ;pic16lf1509.h: 7724: struct {
[; ;pic16lf1509.h: 7725: unsigned LC3D3S0 :1;
[; ;pic16lf1509.h: 7726: unsigned LC3D3S1 :1;
[; ;pic16lf1509.h: 7727: unsigned LC3D3S2 :1;
[; ;pic16lf1509.h: 7728: unsigned :1;
[; ;pic16lf1509.h: 7729: unsigned LC3D4S0 :1;
[; ;pic16lf1509.h: 7730: unsigned LC3D4S1 :1;
[; ;pic16lf1509.h: 7731: unsigned LC3D4S2 :1;
[; ;pic16lf1509.h: 7732: };
[; ;pic16lf1509.h: 7733: struct {
[; ;pic16lf1509.h: 7734: unsigned D3S0 :1;
[; ;pic16lf1509.h: 7735: unsigned D3S1 :1;
[; ;pic16lf1509.h: 7736: unsigned D3S2 :1;
[; ;pic16lf1509.h: 7737: unsigned :1;
[; ;pic16lf1509.h: 7738: unsigned D4S0 :1;
[; ;pic16lf1509.h: 7739: unsigned D4S1 :1;
[; ;pic16lf1509.h: 7740: unsigned D4S2 :1;
[; ;pic16lf1509.h: 7741: };
[; ;pic16lf1509.h: 7742: struct {
[; ;pic16lf1509.h: 7743: unsigned LC3D3S :3;
[; ;pic16lf1509.h: 7744: unsigned :1;
[; ;pic16lf1509.h: 7745: unsigned LC3D4S :3;
[; ;pic16lf1509.h: 7746: };
[; ;pic16lf1509.h: 7747: } CLC3SEL1bits_t;
[; ;pic16lf1509.h: 7748: extern volatile CLC3SEL1bits_t CLC3SEL1bits @ 0xF23;
[; ;pic16lf1509.h: 7823: extern volatile unsigned char CLC3GLS0 @ 0xF24;
"7825
[; ;pic16lf1509.h: 7825: asm("CLC3GLS0 equ 0F24h");
[; <" CLC3GLS0 equ 0F24h ;# ">
[; ;pic16lf1509.h: 7828: typedef union {
[; ;pic16lf1509.h: 7829: struct {
[; ;pic16lf1509.h: 7830: unsigned LC3G1D1N :1;
[; ;pic16lf1509.h: 7831: unsigned LC3G1D1T :1;
[; ;pic16lf1509.h: 7832: unsigned LC3G1D2N :1;
[; ;pic16lf1509.h: 7833: unsigned LC3G1D2T :1;
[; ;pic16lf1509.h: 7834: unsigned LC3G1D3N :1;
[; ;pic16lf1509.h: 7835: unsigned LC3G1D3T :1;
[; ;pic16lf1509.h: 7836: unsigned LC3G1D4N :1;
[; ;pic16lf1509.h: 7837: unsigned LC3G1D4T :1;
[; ;pic16lf1509.h: 7838: };
[; ;pic16lf1509.h: 7839: struct {
[; ;pic16lf1509.h: 7840: unsigned D1N :1;
[; ;pic16lf1509.h: 7841: unsigned D1T :1;
[; ;pic16lf1509.h: 7842: unsigned D2N :1;
[; ;pic16lf1509.h: 7843: unsigned D2T :1;
[; ;pic16lf1509.h: 7844: unsigned D3N :1;
[; ;pic16lf1509.h: 7845: unsigned D3T :1;
[; ;pic16lf1509.h: 7846: unsigned D4N :1;
[; ;pic16lf1509.h: 7847: unsigned D4T :1;
[; ;pic16lf1509.h: 7848: };
[; ;pic16lf1509.h: 7849: } CLC3GLS0bits_t;
[; ;pic16lf1509.h: 7850: extern volatile CLC3GLS0bits_t CLC3GLS0bits @ 0xF24;
[; ;pic16lf1509.h: 7935: extern volatile unsigned char CLC3GLS1 @ 0xF25;
"7937
[; ;pic16lf1509.h: 7937: asm("CLC3GLS1 equ 0F25h");
[; <" CLC3GLS1 equ 0F25h ;# ">
[; ;pic16lf1509.h: 7940: typedef union {
[; ;pic16lf1509.h: 7941: struct {
[; ;pic16lf1509.h: 7942: unsigned LC3G2D1N :1;
[; ;pic16lf1509.h: 7943: unsigned LC3G2D1T :1;
[; ;pic16lf1509.h: 7944: unsigned LC3G2D2N :1;
[; ;pic16lf1509.h: 7945: unsigned LC3G2D2T :1;
[; ;pic16lf1509.h: 7946: unsigned LC3G2D3N :1;
[; ;pic16lf1509.h: 7947: unsigned LC3G2D3T :1;
[; ;pic16lf1509.h: 7948: unsigned LC3G2D4N :1;
[; ;pic16lf1509.h: 7949: unsigned LC3G2D4T :1;
[; ;pic16lf1509.h: 7950: };
[; ;pic16lf1509.h: 7951: struct {
[; ;pic16lf1509.h: 7952: unsigned D1N :1;
[; ;pic16lf1509.h: 7953: unsigned D1T :1;
[; ;pic16lf1509.h: 7954: unsigned D2N :1;
[; ;pic16lf1509.h: 7955: unsigned D2T :1;
[; ;pic16lf1509.h: 7956: unsigned D3N :1;
[; ;pic16lf1509.h: 7957: unsigned D3T :1;
[; ;pic16lf1509.h: 7958: unsigned D4N :1;
[; ;pic16lf1509.h: 7959: unsigned D4T :1;
[; ;pic16lf1509.h: 7960: };
[; ;pic16lf1509.h: 7961: } CLC3GLS1bits_t;
[; ;pic16lf1509.h: 7962: extern volatile CLC3GLS1bits_t CLC3GLS1bits @ 0xF25;
[; ;pic16lf1509.h: 8047: extern volatile unsigned char CLC3GLS2 @ 0xF26;
"8049
[; ;pic16lf1509.h: 8049: asm("CLC3GLS2 equ 0F26h");
[; <" CLC3GLS2 equ 0F26h ;# ">
[; ;pic16lf1509.h: 8052: typedef union {
[; ;pic16lf1509.h: 8053: struct {
[; ;pic16lf1509.h: 8054: unsigned LC3G3D1N :1;
[; ;pic16lf1509.h: 8055: unsigned LC3G3D1T :1;
[; ;pic16lf1509.h: 8056: unsigned LC3G3D2N :1;
[; ;pic16lf1509.h: 8057: unsigned LC3G3D2T :1;
[; ;pic16lf1509.h: 8058: unsigned LC3G3D3N :1;
[; ;pic16lf1509.h: 8059: unsigned LC3G3D3T :1;
[; ;pic16lf1509.h: 8060: unsigned LC3G3D4N :1;
[; ;pic16lf1509.h: 8061: unsigned LC3G3D4T :1;
[; ;pic16lf1509.h: 8062: };
[; ;pic16lf1509.h: 8063: struct {
[; ;pic16lf1509.h: 8064: unsigned D1N :1;
[; ;pic16lf1509.h: 8065: unsigned D1T :1;
[; ;pic16lf1509.h: 8066: unsigned D2N :1;
[; ;pic16lf1509.h: 8067: unsigned D2T :1;
[; ;pic16lf1509.h: 8068: unsigned D3N :1;
[; ;pic16lf1509.h: 8069: unsigned D3T :1;
[; ;pic16lf1509.h: 8070: unsigned D4N :1;
[; ;pic16lf1509.h: 8071: unsigned D4T :1;
[; ;pic16lf1509.h: 8072: };
[; ;pic16lf1509.h: 8073: } CLC3GLS2bits_t;
[; ;pic16lf1509.h: 8074: extern volatile CLC3GLS2bits_t CLC3GLS2bits @ 0xF26;
[; ;pic16lf1509.h: 8159: extern volatile unsigned char CLC3GLS3 @ 0xF27;
"8161
[; ;pic16lf1509.h: 8161: asm("CLC3GLS3 equ 0F27h");
[; <" CLC3GLS3 equ 0F27h ;# ">
[; ;pic16lf1509.h: 8164: typedef union {
[; ;pic16lf1509.h: 8165: struct {
[; ;pic16lf1509.h: 8166: unsigned LC3G4D1N :1;
[; ;pic16lf1509.h: 8167: unsigned LC3G4D1T :1;
[; ;pic16lf1509.h: 8168: unsigned LC3G4D2N :1;
[; ;pic16lf1509.h: 8169: unsigned LC3G4D2T :1;
[; ;pic16lf1509.h: 8170: unsigned LC3G4D3N :1;
[; ;pic16lf1509.h: 8171: unsigned LC3G4D3T :1;
[; ;pic16lf1509.h: 8172: unsigned LC3G4D4N :1;
[; ;pic16lf1509.h: 8173: unsigned LC3G4D4T :1;
[; ;pic16lf1509.h: 8174: };
[; ;pic16lf1509.h: 8175: struct {
[; ;pic16lf1509.h: 8176: unsigned G4D1N :1;
[; ;pic16lf1509.h: 8177: unsigned G4D1T :1;
[; ;pic16lf1509.h: 8178: unsigned G4D2N :1;
[; ;pic16lf1509.h: 8179: unsigned G4D2T :1;
[; ;pic16lf1509.h: 8180: unsigned G4D3N :1;
[; ;pic16lf1509.h: 8181: unsigned G4D3T :1;
[; ;pic16lf1509.h: 8182: unsigned G4D4N :1;
[; ;pic16lf1509.h: 8183: unsigned G4D4T :1;
[; ;pic16lf1509.h: 8184: };
[; ;pic16lf1509.h: 8185: } CLC3GLS3bits_t;
[; ;pic16lf1509.h: 8186: extern volatile CLC3GLS3bits_t CLC3GLS3bits @ 0xF27;
[; ;pic16lf1509.h: 8271: extern volatile unsigned char CLC4CON @ 0xF28;
"8273
[; ;pic16lf1509.h: 8273: asm("CLC4CON equ 0F28h");
[; <" CLC4CON equ 0F28h ;# ">
[; ;pic16lf1509.h: 8276: typedef union {
[; ;pic16lf1509.h: 8277: struct {
[; ;pic16lf1509.h: 8278: unsigned LC4MODE0 :1;
[; ;pic16lf1509.h: 8279: unsigned LC4MODE1 :1;
[; ;pic16lf1509.h: 8280: unsigned LC4MODE2 :1;
[; ;pic16lf1509.h: 8281: unsigned LC4INTN :1;
[; ;pic16lf1509.h: 8282: unsigned LC4INTP :1;
[; ;pic16lf1509.h: 8283: unsigned LC4OUT :1;
[; ;pic16lf1509.h: 8284: unsigned LC4OE :1;
[; ;pic16lf1509.h: 8285: unsigned LC4EN :1;
[; ;pic16lf1509.h: 8286: };
[; ;pic16lf1509.h: 8287: struct {
[; ;pic16lf1509.h: 8288: unsigned LCMODE0 :1;
[; ;pic16lf1509.h: 8289: unsigned LCMODE1 :1;
[; ;pic16lf1509.h: 8290: unsigned LCMODE2 :1;
[; ;pic16lf1509.h: 8291: unsigned LCINTN :1;
[; ;pic16lf1509.h: 8292: unsigned LCINTP :1;
[; ;pic16lf1509.h: 8293: unsigned LCOUT :1;
[; ;pic16lf1509.h: 8294: unsigned LCOE :1;
[; ;pic16lf1509.h: 8295: unsigned LCEN :1;
[; ;pic16lf1509.h: 8296: };
[; ;pic16lf1509.h: 8297: struct {
[; ;pic16lf1509.h: 8298: unsigned LC4MODE :3;
[; ;pic16lf1509.h: 8299: };
[; ;pic16lf1509.h: 8300: } CLC4CONbits_t;
[; ;pic16lf1509.h: 8301: extern volatile CLC4CONbits_t CLC4CONbits @ 0xF28;
[; ;pic16lf1509.h: 8391: extern volatile unsigned char CLC4POL @ 0xF29;
"8393
[; ;pic16lf1509.h: 8393: asm("CLC4POL equ 0F29h");
[; <" CLC4POL equ 0F29h ;# ">
[; ;pic16lf1509.h: 8396: typedef union {
[; ;pic16lf1509.h: 8397: struct {
[; ;pic16lf1509.h: 8398: unsigned LC4G1POL :1;
[; ;pic16lf1509.h: 8399: unsigned LC4G2POL :1;
[; ;pic16lf1509.h: 8400: unsigned LC4G3POL :1;
[; ;pic16lf1509.h: 8401: unsigned LC4G4POL :1;
[; ;pic16lf1509.h: 8402: unsigned :3;
[; ;pic16lf1509.h: 8403: unsigned LC4POL :1;
[; ;pic16lf1509.h: 8404: };
[; ;pic16lf1509.h: 8405: struct {
[; ;pic16lf1509.h: 8406: unsigned G1POL :1;
[; ;pic16lf1509.h: 8407: unsigned G2POL :1;
[; ;pic16lf1509.h: 8408: unsigned G3POL :1;
[; ;pic16lf1509.h: 8409: unsigned G4POL :1;
[; ;pic16lf1509.h: 8410: unsigned :3;
[; ;pic16lf1509.h: 8411: unsigned POL :1;
[; ;pic16lf1509.h: 8412: };
[; ;pic16lf1509.h: 8413: } CLC4POLbits_t;
[; ;pic16lf1509.h: 8414: extern volatile CLC4POLbits_t CLC4POLbits @ 0xF29;
[; ;pic16lf1509.h: 8469: extern volatile unsigned char CLC4SEL0 @ 0xF2A;
"8471
[; ;pic16lf1509.h: 8471: asm("CLC4SEL0 equ 0F2Ah");
[; <" CLC4SEL0 equ 0F2Ah ;# ">
[; ;pic16lf1509.h: 8474: typedef union {
[; ;pic16lf1509.h: 8475: struct {
[; ;pic16lf1509.h: 8476: unsigned LC4D1S0 :1;
[; ;pic16lf1509.h: 8477: unsigned LC4D1S1 :1;
[; ;pic16lf1509.h: 8478: unsigned LC4D1S2 :1;
[; ;pic16lf1509.h: 8479: unsigned :1;
[; ;pic16lf1509.h: 8480: unsigned LC4D2S0 :1;
[; ;pic16lf1509.h: 8481: unsigned LC4D2S1 :1;
[; ;pic16lf1509.h: 8482: unsigned LC4D2S2 :1;
[; ;pic16lf1509.h: 8483: };
[; ;pic16lf1509.h: 8484: struct {
[; ;pic16lf1509.h: 8485: unsigned D1S0 :1;
[; ;pic16lf1509.h: 8486: unsigned D1S1 :1;
[; ;pic16lf1509.h: 8487: unsigned D1S2 :1;
[; ;pic16lf1509.h: 8488: unsigned :1;
[; ;pic16lf1509.h: 8489: unsigned D2S0 :1;
[; ;pic16lf1509.h: 8490: unsigned D2S1 :1;
[; ;pic16lf1509.h: 8491: unsigned D2S2 :1;
[; ;pic16lf1509.h: 8492: };
[; ;pic16lf1509.h: 8493: struct {
[; ;pic16lf1509.h: 8494: unsigned LC4D1S :3;
[; ;pic16lf1509.h: 8495: unsigned :1;
[; ;pic16lf1509.h: 8496: unsigned LC4D2S :3;
[; ;pic16lf1509.h: 8497: };
[; ;pic16lf1509.h: 8498: } CLC4SEL0bits_t;
[; ;pic16lf1509.h: 8499: extern volatile CLC4SEL0bits_t CLC4SEL0bits @ 0xF2A;
[; ;pic16lf1509.h: 8574: extern volatile unsigned char CLC4SEL1 @ 0xF2B;
"8576
[; ;pic16lf1509.h: 8576: asm("CLC4SEL1 equ 0F2Bh");
[; <" CLC4SEL1 equ 0F2Bh ;# ">
[; ;pic16lf1509.h: 8579: typedef union {
[; ;pic16lf1509.h: 8580: struct {
[; ;pic16lf1509.h: 8581: unsigned LC4D3S0 :1;
[; ;pic16lf1509.h: 8582: unsigned LC4D3S1 :1;
[; ;pic16lf1509.h: 8583: unsigned LC4D3S2 :1;
[; ;pic16lf1509.h: 8584: unsigned :1;
[; ;pic16lf1509.h: 8585: unsigned LC4D4S0 :1;
[; ;pic16lf1509.h: 8586: unsigned LC4D4S1 :1;
[; ;pic16lf1509.h: 8587: unsigned LC4D4S2 :1;
[; ;pic16lf1509.h: 8588: };
[; ;pic16lf1509.h: 8589: struct {
[; ;pic16lf1509.h: 8590: unsigned D3S0 :1;
[; ;pic16lf1509.h: 8591: unsigned D3S1 :1;
[; ;pic16lf1509.h: 8592: unsigned D3S2 :1;
[; ;pic16lf1509.h: 8593: unsigned :1;
[; ;pic16lf1509.h: 8594: unsigned D4S0 :1;
[; ;pic16lf1509.h: 8595: unsigned D4S1 :1;
[; ;pic16lf1509.h: 8596: unsigned D4S2 :1;
[; ;pic16lf1509.h: 8597: };
[; ;pic16lf1509.h: 8598: struct {
[; ;pic16lf1509.h: 8599: unsigned LC4D3S :3;
[; ;pic16lf1509.h: 8600: unsigned :1;
[; ;pic16lf1509.h: 8601: unsigned LC4D4S :3;
[; ;pic16lf1509.h: 8602: };
[; ;pic16lf1509.h: 8603: } CLC4SEL1bits_t;
[; ;pic16lf1509.h: 8604: extern volatile CLC4SEL1bits_t CLC4SEL1bits @ 0xF2B;
[; ;pic16lf1509.h: 8679: extern volatile unsigned char CLC4GLS0 @ 0xF2C;
"8681
[; ;pic16lf1509.h: 8681: asm("CLC4GLS0 equ 0F2Ch");
[; <" CLC4GLS0 equ 0F2Ch ;# ">
[; ;pic16lf1509.h: 8684: typedef union {
[; ;pic16lf1509.h: 8685: struct {
[; ;pic16lf1509.h: 8686: unsigned LC4G1D1N :1;
[; ;pic16lf1509.h: 8687: unsigned LC4G1D1T :1;
[; ;pic16lf1509.h: 8688: unsigned LC4G1D2N :1;
[; ;pic16lf1509.h: 8689: unsigned LC4G1D2T :1;
[; ;pic16lf1509.h: 8690: unsigned LC4G1D3N :1;
[; ;pic16lf1509.h: 8691: unsigned LC4G1D3T :1;
[; ;pic16lf1509.h: 8692: unsigned LC4G1D4N :1;
[; ;pic16lf1509.h: 8693: unsigned LC4G1D4T :1;
[; ;pic16lf1509.h: 8694: };
[; ;pic16lf1509.h: 8695: struct {
[; ;pic16lf1509.h: 8696: unsigned D1N :1;
[; ;pic16lf1509.h: 8697: unsigned D1T :1;
[; ;pic16lf1509.h: 8698: unsigned D2N :1;
[; ;pic16lf1509.h: 8699: unsigned D2T :1;
[; ;pic16lf1509.h: 8700: unsigned D3N :1;
[; ;pic16lf1509.h: 8701: unsigned D3T :1;
[; ;pic16lf1509.h: 8702: unsigned D4N :1;
[; ;pic16lf1509.h: 8703: unsigned D4T :1;
[; ;pic16lf1509.h: 8704: };
[; ;pic16lf1509.h: 8705: } CLC4GLS0bits_t;
[; ;pic16lf1509.h: 8706: extern volatile CLC4GLS0bits_t CLC4GLS0bits @ 0xF2C;
[; ;pic16lf1509.h: 8791: extern volatile unsigned char CLC4GLS1 @ 0xF2D;
"8793
[; ;pic16lf1509.h: 8793: asm("CLC4GLS1 equ 0F2Dh");
[; <" CLC4GLS1 equ 0F2Dh ;# ">
[; ;pic16lf1509.h: 8796: typedef union {
[; ;pic16lf1509.h: 8797: struct {
[; ;pic16lf1509.h: 8798: unsigned LC4G2D1N :1;
[; ;pic16lf1509.h: 8799: unsigned LC4G2D1T :1;
[; ;pic16lf1509.h: 8800: unsigned LC4G2D2N :1;
[; ;pic16lf1509.h: 8801: unsigned LC4G2D2T :1;
[; ;pic16lf1509.h: 8802: unsigned LC4G2D3N :1;
[; ;pic16lf1509.h: 8803: unsigned LC4G2D3T :1;
[; ;pic16lf1509.h: 8804: unsigned LC4G2D4N :1;
[; ;pic16lf1509.h: 8805: unsigned LC4G2D4T :1;
[; ;pic16lf1509.h: 8806: };
[; ;pic16lf1509.h: 8807: struct {
[; ;pic16lf1509.h: 8808: unsigned D1N :1;
[; ;pic16lf1509.h: 8809: unsigned D1T :1;
[; ;pic16lf1509.h: 8810: unsigned D2N :1;
[; ;pic16lf1509.h: 8811: unsigned D2T :1;
[; ;pic16lf1509.h: 8812: unsigned D3N :1;
[; ;pic16lf1509.h: 8813: unsigned D3T :1;
[; ;pic16lf1509.h: 8814: unsigned D4N :1;
[; ;pic16lf1509.h: 8815: unsigned D4T :1;
[; ;pic16lf1509.h: 8816: };
[; ;pic16lf1509.h: 8817: } CLC4GLS1bits_t;
[; ;pic16lf1509.h: 8818: extern volatile CLC4GLS1bits_t CLC4GLS1bits @ 0xF2D;
[; ;pic16lf1509.h: 8903: extern volatile unsigned char CLC4GLS2 @ 0xF2E;
"8905
[; ;pic16lf1509.h: 8905: asm("CLC4GLS2 equ 0F2Eh");
[; <" CLC4GLS2 equ 0F2Eh ;# ">
[; ;pic16lf1509.h: 8908: typedef union {
[; ;pic16lf1509.h: 8909: struct {
[; ;pic16lf1509.h: 8910: unsigned LC4G3D1N :1;
[; ;pic16lf1509.h: 8911: unsigned LC4G3D1T :1;
[; ;pic16lf1509.h: 8912: unsigned LC4G3D2N :1;
[; ;pic16lf1509.h: 8913: unsigned LC4G3D2T :1;
[; ;pic16lf1509.h: 8914: unsigned LC4G3D3N :1;
[; ;pic16lf1509.h: 8915: unsigned LC4G3D3T :1;
[; ;pic16lf1509.h: 8916: unsigned LC4G3D4N :1;
[; ;pic16lf1509.h: 8917: unsigned LC4G3D4T :1;
[; ;pic16lf1509.h: 8918: };
[; ;pic16lf1509.h: 8919: struct {
[; ;pic16lf1509.h: 8920: unsigned D1N :1;
[; ;pic16lf1509.h: 8921: unsigned D1T :1;
[; ;pic16lf1509.h: 8922: unsigned D2N :1;
[; ;pic16lf1509.h: 8923: unsigned D2T :1;
[; ;pic16lf1509.h: 8924: unsigned D3N :1;
[; ;pic16lf1509.h: 8925: unsigned D3T :1;
[; ;pic16lf1509.h: 8926: unsigned D4N :1;
[; ;pic16lf1509.h: 8927: unsigned D4T :1;
[; ;pic16lf1509.h: 8928: };
[; ;pic16lf1509.h: 8929: } CLC4GLS2bits_t;
[; ;pic16lf1509.h: 8930: extern volatile CLC4GLS2bits_t CLC4GLS2bits @ 0xF2E;
[; ;pic16lf1509.h: 9015: extern volatile unsigned char CLC4GLS3 @ 0xF2F;
"9017
[; ;pic16lf1509.h: 9017: asm("CLC4GLS3 equ 0F2Fh");
[; <" CLC4GLS3 equ 0F2Fh ;# ">
[; ;pic16lf1509.h: 9020: typedef union {
[; ;pic16lf1509.h: 9021: struct {
[; ;pic16lf1509.h: 9022: unsigned LC4G4D1N :1;
[; ;pic16lf1509.h: 9023: unsigned LC4G4D1T :1;
[; ;pic16lf1509.h: 9024: unsigned LC4G4D2N :1;
[; ;pic16lf1509.h: 9025: unsigned LC4G4D2T :1;
[; ;pic16lf1509.h: 9026: unsigned LC4G4D3N :1;
[; ;pic16lf1509.h: 9027: unsigned LC4G4D3T :1;
[; ;pic16lf1509.h: 9028: unsigned LC4G4D4N :1;
[; ;pic16lf1509.h: 9029: unsigned LC4G4D4T :1;
[; ;pic16lf1509.h: 9030: };
[; ;pic16lf1509.h: 9031: struct {
[; ;pic16lf1509.h: 9032: unsigned G4D1N :1;
[; ;pic16lf1509.h: 9033: unsigned G4D1T :1;
[; ;pic16lf1509.h: 9034: unsigned G4D2N :1;
[; ;pic16lf1509.h: 9035: unsigned G4D2T :1;
[; ;pic16lf1509.h: 9036: unsigned G4D3N :1;
[; ;pic16lf1509.h: 9037: unsigned G4D3T :1;
[; ;pic16lf1509.h: 9038: unsigned G4D4N :1;
[; ;pic16lf1509.h: 9039: unsigned G4D4T :1;
[; ;pic16lf1509.h: 9040: };
[; ;pic16lf1509.h: 9041: } CLC4GLS3bits_t;
[; ;pic16lf1509.h: 9042: extern volatile CLC4GLS3bits_t CLC4GLS3bits @ 0xF2F;
[; ;pic16lf1509.h: 9127: extern volatile unsigned char ICDIO @ 0xF8C;
"9129
[; ;pic16lf1509.h: 9129: asm("ICDIO equ 0F8Ch");
[; <" ICDIO equ 0F8Ch ;# ">
[; ;pic16lf1509.h: 9132: typedef union {
[; ;pic16lf1509.h: 9133: struct {
[; ;pic16lf1509.h: 9134: unsigned :2;
[; ;pic16lf1509.h: 9135: unsigned TRIS_ICDCLK :1;
[; ;pic16lf1509.h: 9136: unsigned TRIS_ICDDAT :1;
[; ;pic16lf1509.h: 9137: unsigned LAT_ICDCLK :1;
[; ;pic16lf1509.h: 9138: unsigned LAT_ICDDAT :1;
[; ;pic16lf1509.h: 9139: unsigned PORT_ICDCLK :1;
[; ;pic16lf1509.h: 9140: unsigned PORT_ICDDAT :1;
[; ;pic16lf1509.h: 9141: };
[; ;pic16lf1509.h: 9142: } ICDIObits_t;
[; ;pic16lf1509.h: 9143: extern volatile ICDIObits_t ICDIObits @ 0xF8C;
[; ;pic16lf1509.h: 9178: extern volatile unsigned char ICDCON0 @ 0xF8D;
"9180
[; ;pic16lf1509.h: 9180: asm("ICDCON0 equ 0F8Dh");
[; <" ICDCON0 equ 0F8Dh ;# ">
[; ;pic16lf1509.h: 9183: typedef union {
[; ;pic16lf1509.h: 9184: struct {
[; ;pic16lf1509.h: 9185: unsigned RSTVEC :1;
[; ;pic16lf1509.h: 9186: unsigned :2;
[; ;pic16lf1509.h: 9187: unsigned DBGINEX :1;
[; ;pic16lf1509.h: 9188: unsigned :1;
[; ;pic16lf1509.h: 9189: unsigned SSTEP :1;
[; ;pic16lf1509.h: 9190: unsigned FREEZ :1;
[; ;pic16lf1509.h: 9191: unsigned INBUG :1;
[; ;pic16lf1509.h: 9192: };
[; ;pic16lf1509.h: 9193: } ICDCON0bits_t;
[; ;pic16lf1509.h: 9194: extern volatile ICDCON0bits_t ICDCON0bits @ 0xF8D;
[; ;pic16lf1509.h: 9224: extern volatile unsigned char ICDSTAT @ 0xF91;
"9226
[; ;pic16lf1509.h: 9226: asm("ICDSTAT equ 0F91h");
[; <" ICDSTAT equ 0F91h ;# ">
[; ;pic16lf1509.h: 9229: typedef union {
[; ;pic16lf1509.h: 9230: struct {
[; ;pic16lf1509.h: 9231: unsigned :1;
[; ;pic16lf1509.h: 9232: unsigned USRHLTF :1;
[; ;pic16lf1509.h: 9233: unsigned :4;
[; ;pic16lf1509.h: 9234: unsigned TRP0HLTF :1;
[; ;pic16lf1509.h: 9235: unsigned TRP1HLTF :1;
[; ;pic16lf1509.h: 9236: };
[; ;pic16lf1509.h: 9237: } ICDSTATbits_t;
[; ;pic16lf1509.h: 9238: extern volatile ICDSTATbits_t ICDSTATbits @ 0xF91;
[; ;pic16lf1509.h: 9258: extern volatile unsigned char DEVSEL @ 0xF95;
"9260
[; ;pic16lf1509.h: 9260: asm("DEVSEL equ 0F95h");
[; <" DEVSEL equ 0F95h ;# ">
[; ;pic16lf1509.h: 9263: typedef union {
[; ;pic16lf1509.h: 9264: struct {
[; ;pic16lf1509.h: 9265: unsigned DEVSEL0 :1;
[; ;pic16lf1509.h: 9266: unsigned DEVSEL1 :1;
[; ;pic16lf1509.h: 9267: unsigned DEVSEL2 :1;
[; ;pic16lf1509.h: 9268: };
[; ;pic16lf1509.h: 9269: } DEVSELbits_t;
[; ;pic16lf1509.h: 9270: extern volatile DEVSELbits_t DEVSELbits @ 0xF95;
[; ;pic16lf1509.h: 9290: extern volatile unsigned char ICDINSTL @ 0xF96;
"9292
[; ;pic16lf1509.h: 9292: asm("ICDINSTL equ 0F96h");
[; <" ICDINSTL equ 0F96h ;# ">
[; ;pic16lf1509.h: 9295: typedef union {
[; ;pic16lf1509.h: 9296: struct {
[; ;pic16lf1509.h: 9297: unsigned DBGIN0 :1;
[; ;pic16lf1509.h: 9298: unsigned DBGIN1 :1;
[; ;pic16lf1509.h: 9299: unsigned DBGIN2 :1;
[; ;pic16lf1509.h: 9300: unsigned DBGIN3 :1;
[; ;pic16lf1509.h: 9301: unsigned DBGIN4 :1;
[; ;pic16lf1509.h: 9302: unsigned DBGIN5 :1;
[; ;pic16lf1509.h: 9303: unsigned DBGIN6 :1;
[; ;pic16lf1509.h: 9304: unsigned DBGIN7 :1;
[; ;pic16lf1509.h: 9305: };
[; ;pic16lf1509.h: 9306: } ICDINSTLbits_t;
[; ;pic16lf1509.h: 9307: extern volatile ICDINSTLbits_t ICDINSTLbits @ 0xF96;
[; ;pic16lf1509.h: 9352: extern volatile unsigned char ICDINSTH @ 0xF97;
"9354
[; ;pic16lf1509.h: 9354: asm("ICDINSTH equ 0F97h");
[; <" ICDINSTH equ 0F97h ;# ">
[; ;pic16lf1509.h: 9357: typedef union {
[; ;pic16lf1509.h: 9358: struct {
[; ;pic16lf1509.h: 9359: unsigned DBGIN8 :1;
[; ;pic16lf1509.h: 9360: unsigned DBGIN9 :1;
[; ;pic16lf1509.h: 9361: unsigned DBGIN10 :1;
[; ;pic16lf1509.h: 9362: unsigned DBGIN11 :1;
[; ;pic16lf1509.h: 9363: unsigned DBGIN12 :1;
[; ;pic16lf1509.h: 9364: unsigned DBGIN13 :1;
[; ;pic16lf1509.h: 9365: };
[; ;pic16lf1509.h: 9366: } ICDINSTHbits_t;
[; ;pic16lf1509.h: 9367: extern volatile ICDINSTHbits_t ICDINSTHbits @ 0xF97;
[; ;pic16lf1509.h: 9402: extern volatile unsigned char ICDBK0CON @ 0xF9C;
"9404
[; ;pic16lf1509.h: 9404: asm("ICDBK0CON equ 0F9Ch");
[; <" ICDBK0CON equ 0F9Ch ;# ">
[; ;pic16lf1509.h: 9407: typedef union {
[; ;pic16lf1509.h: 9408: struct {
[; ;pic16lf1509.h: 9409: unsigned BKHLT :1;
[; ;pic16lf1509.h: 9410: unsigned :6;
[; ;pic16lf1509.h: 9411: unsigned BKEN :1;
[; ;pic16lf1509.h: 9412: };
[; ;pic16lf1509.h: 9413: } ICDBK0CONbits_t;
[; ;pic16lf1509.h: 9414: extern volatile ICDBK0CONbits_t ICDBK0CONbits @ 0xF9C;
[; ;pic16lf1509.h: 9429: extern volatile unsigned char ICDBK0L @ 0xF9D;
"9431
[; ;pic16lf1509.h: 9431: asm("ICDBK0L equ 0F9Dh");
[; <" ICDBK0L equ 0F9Dh ;# ">
[; ;pic16lf1509.h: 9434: typedef union {
[; ;pic16lf1509.h: 9435: struct {
[; ;pic16lf1509.h: 9436: unsigned BKA0 :1;
[; ;pic16lf1509.h: 9437: unsigned BKA1 :1;
[; ;pic16lf1509.h: 9438: unsigned BKA2 :1;
[; ;pic16lf1509.h: 9439: unsigned BKA3 :1;
[; ;pic16lf1509.h: 9440: unsigned BKA4 :1;
[; ;pic16lf1509.h: 9441: unsigned BKA5 :1;
[; ;pic16lf1509.h: 9442: unsigned BKA6 :1;
[; ;pic16lf1509.h: 9443: unsigned BKA7 :1;
[; ;pic16lf1509.h: 9444: };
[; ;pic16lf1509.h: 9445: } ICDBK0Lbits_t;
[; ;pic16lf1509.h: 9446: extern volatile ICDBK0Lbits_t ICDBK0Lbits @ 0xF9D;
[; ;pic16lf1509.h: 9491: extern volatile unsigned char ICDBK0H @ 0xF9E;
"9493
[; ;pic16lf1509.h: 9493: asm("ICDBK0H equ 0F9Eh");
[; <" ICDBK0H equ 0F9Eh ;# ">
[; ;pic16lf1509.h: 9496: typedef union {
[; ;pic16lf1509.h: 9497: struct {
[; ;pic16lf1509.h: 9498: unsigned BKA8 :1;
[; ;pic16lf1509.h: 9499: unsigned BKA9 :1;
[; ;pic16lf1509.h: 9500: unsigned BKA10 :1;
[; ;pic16lf1509.h: 9501: unsigned BKA11 :1;
[; ;pic16lf1509.h: 9502: unsigned BKA12 :1;
[; ;pic16lf1509.h: 9503: unsigned BKA13 :1;
[; ;pic16lf1509.h: 9504: unsigned BKA14 :1;
[; ;pic16lf1509.h: 9505: };
[; ;pic16lf1509.h: 9506: } ICDBK0Hbits_t;
[; ;pic16lf1509.h: 9507: extern volatile ICDBK0Hbits_t ICDBK0Hbits @ 0xF9E;
[; ;pic16lf1509.h: 9547: extern volatile unsigned char BSRICDSHAD @ 0xFE3;
"9549
[; ;pic16lf1509.h: 9549: asm("BSRICDSHAD equ 0FE3h");
[; <" BSRICDSHAD equ 0FE3h ;# ">
[; ;pic16lf1509.h: 9552: typedef union {
[; ;pic16lf1509.h: 9553: struct {
[; ;pic16lf1509.h: 9554: unsigned BSR_ICDSHAD :5;
[; ;pic16lf1509.h: 9555: };
[; ;pic16lf1509.h: 9556: } BSRICDSHADbits_t;
[; ;pic16lf1509.h: 9557: extern volatile BSRICDSHADbits_t BSRICDSHADbits @ 0xFE3;
[; ;pic16lf1509.h: 9567: extern volatile unsigned char STATUS_SHAD @ 0xFE4;
"9569
[; ;pic16lf1509.h: 9569: asm("STATUS_SHAD equ 0FE4h");
[; <" STATUS_SHAD equ 0FE4h ;# ">
[; ;pic16lf1509.h: 9572: typedef union {
[; ;pic16lf1509.h: 9573: struct {
[; ;pic16lf1509.h: 9574: unsigned C_SHAD :1;
[; ;pic16lf1509.h: 9575: unsigned DC_SHAD :1;
[; ;pic16lf1509.h: 9576: unsigned Z_SHAD :1;
[; ;pic16lf1509.h: 9577: };
[; ;pic16lf1509.h: 9578: } STATUS_SHADbits_t;
[; ;pic16lf1509.h: 9579: extern volatile STATUS_SHADbits_t STATUS_SHADbits @ 0xFE4;
[; ;pic16lf1509.h: 9599: extern volatile unsigned char WREG_SHAD @ 0xFE5;
"9601
[; ;pic16lf1509.h: 9601: asm("WREG_SHAD equ 0FE5h");
[; <" WREG_SHAD equ 0FE5h ;# ">
[; ;pic16lf1509.h: 9604: typedef union {
[; ;pic16lf1509.h: 9605: struct {
[; ;pic16lf1509.h: 9606: unsigned WREG_SHAD :8;
[; ;pic16lf1509.h: 9607: };
[; ;pic16lf1509.h: 9608: } WREG_SHADbits_t;
[; ;pic16lf1509.h: 9609: extern volatile WREG_SHADbits_t WREG_SHADbits @ 0xFE5;
[; ;pic16lf1509.h: 9619: extern volatile unsigned char BSR_SHAD @ 0xFE6;
"9621
[; ;pic16lf1509.h: 9621: asm("BSR_SHAD equ 0FE6h");
[; <" BSR_SHAD equ 0FE6h ;# ">
[; ;pic16lf1509.h: 9624: typedef union {
[; ;pic16lf1509.h: 9625: struct {
[; ;pic16lf1509.h: 9626: unsigned BSR_SHAD :5;
[; ;pic16lf1509.h: 9627: };
[; ;pic16lf1509.h: 9628: } BSR_SHADbits_t;
[; ;pic16lf1509.h: 9629: extern volatile BSR_SHADbits_t BSR_SHADbits @ 0xFE6;
[; ;pic16lf1509.h: 9639: extern volatile unsigned char PCLATH_SHAD @ 0xFE7;
"9641
[; ;pic16lf1509.h: 9641: asm("PCLATH_SHAD equ 0FE7h");
[; <" PCLATH_SHAD equ 0FE7h ;# ">
[; ;pic16lf1509.h: 9644: typedef union {
[; ;pic16lf1509.h: 9645: struct {
[; ;pic16lf1509.h: 9646: unsigned PCLATH_SHAD :7;
[; ;pic16lf1509.h: 9647: };
[; ;pic16lf1509.h: 9648: } PCLATH_SHADbits_t;
[; ;pic16lf1509.h: 9649: extern volatile PCLATH_SHADbits_t PCLATH_SHADbits @ 0xFE7;
[; ;pic16lf1509.h: 9659: extern volatile unsigned char FSR0L_SHAD @ 0xFE8;
"9661
[; ;pic16lf1509.h: 9661: asm("FSR0L_SHAD equ 0FE8h");
[; <" FSR0L_SHAD equ 0FE8h ;# ">
[; ;pic16lf1509.h: 9664: typedef union {
[; ;pic16lf1509.h: 9665: struct {
[; ;pic16lf1509.h: 9666: unsigned FSR0L_SHAD :8;
[; ;pic16lf1509.h: 9667: };
[; ;pic16lf1509.h: 9668: } FSR0L_SHADbits_t;
[; ;pic16lf1509.h: 9669: extern volatile FSR0L_SHADbits_t FSR0L_SHADbits @ 0xFE8;
[; ;pic16lf1509.h: 9679: extern volatile unsigned char FSR0H_SHAD @ 0xFE9;
"9681
[; ;pic16lf1509.h: 9681: asm("FSR0H_SHAD equ 0FE9h");
[; <" FSR0H_SHAD equ 0FE9h ;# ">
[; ;pic16lf1509.h: 9684: typedef union {
[; ;pic16lf1509.h: 9685: struct {
[; ;pic16lf1509.h: 9686: unsigned FSR0H_SHAD :8;
[; ;pic16lf1509.h: 9687: };
[; ;pic16lf1509.h: 9688: } FSR0H_SHADbits_t;
[; ;pic16lf1509.h: 9689: extern volatile FSR0H_SHADbits_t FSR0H_SHADbits @ 0xFE9;
[; ;pic16lf1509.h: 9699: extern volatile unsigned char FSR1L_SHAD @ 0xFEA;
"9701
[; ;pic16lf1509.h: 9701: asm("FSR1L_SHAD equ 0FEAh");
[; <" FSR1L_SHAD equ 0FEAh ;# ">
[; ;pic16lf1509.h: 9704: typedef union {
[; ;pic16lf1509.h: 9705: struct {
[; ;pic16lf1509.h: 9706: unsigned FSR1L_SHAD :8;
[; ;pic16lf1509.h: 9707: };
[; ;pic16lf1509.h: 9708: } FSR1L_SHADbits_t;
[; ;pic16lf1509.h: 9709: extern volatile FSR1L_SHADbits_t FSR1L_SHADbits @ 0xFEA;
[; ;pic16lf1509.h: 9719: extern volatile unsigned char FSR1H_SHAD @ 0xFEB;
"9721
[; ;pic16lf1509.h: 9721: asm("FSR1H_SHAD equ 0FEBh");
[; <" FSR1H_SHAD equ 0FEBh ;# ">
[; ;pic16lf1509.h: 9724: typedef union {
[; ;pic16lf1509.h: 9725: struct {
[; ;pic16lf1509.h: 9726: unsigned FSR1H_SHAD :8;
[; ;pic16lf1509.h: 9727: };
[; ;pic16lf1509.h: 9728: } FSR1H_SHADbits_t;
[; ;pic16lf1509.h: 9729: extern volatile FSR1H_SHADbits_t FSR1H_SHADbits @ 0xFEB;
[; ;pic16lf1509.h: 9739: extern volatile unsigned char STKPTR @ 0xFED;
"9741
[; ;pic16lf1509.h: 9741: asm("STKPTR equ 0FEDh");
[; <" STKPTR equ 0FEDh ;# ">
[; ;pic16lf1509.h: 9744: typedef union {
[; ;pic16lf1509.h: 9745: struct {
[; ;pic16lf1509.h: 9746: unsigned STKPTR :5;
[; ;pic16lf1509.h: 9747: };
[; ;pic16lf1509.h: 9748: } STKPTRbits_t;
[; ;pic16lf1509.h: 9749: extern volatile STKPTRbits_t STKPTRbits @ 0xFED;
[; ;pic16lf1509.h: 9759: extern volatile unsigned char TOSL @ 0xFEE;
"9761
[; ;pic16lf1509.h: 9761: asm("TOSL equ 0FEEh");
[; <" TOSL equ 0FEEh ;# ">
[; ;pic16lf1509.h: 9764: typedef union {
[; ;pic16lf1509.h: 9765: struct {
[; ;pic16lf1509.h: 9766: unsigned TOSL :8;
[; ;pic16lf1509.h: 9767: };
[; ;pic16lf1509.h: 9768: } TOSLbits_t;
[; ;pic16lf1509.h: 9769: extern volatile TOSLbits_t TOSLbits @ 0xFEE;
[; ;pic16lf1509.h: 9779: extern volatile unsigned char TOSH @ 0xFEF;
"9781
[; ;pic16lf1509.h: 9781: asm("TOSH equ 0FEFh");
[; <" TOSH equ 0FEFh ;# ">
[; ;pic16lf1509.h: 9784: typedef union {
[; ;pic16lf1509.h: 9785: struct {
[; ;pic16lf1509.h: 9786: unsigned TOSH :7;
[; ;pic16lf1509.h: 9787: };
[; ;pic16lf1509.h: 9788: } TOSHbits_t;
[; ;pic16lf1509.h: 9789: extern volatile TOSHbits_t TOSHbits @ 0xFEF;
[; ;pic16lf1509.h: 9804: extern volatile __bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;
[; ;pic16lf1509.h: 9806: extern volatile __bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;
[; ;pic16lf1509.h: 9808: extern volatile __bit ACKDT @ (((unsigned) &SSP1CON2)*8) + 5;
[; ;pic16lf1509.h: 9810: extern volatile __bit ACKEN @ (((unsigned) &SSP1CON2)*8) + 4;
[; ;pic16lf1509.h: 9812: extern volatile __bit ACKSTAT @ (((unsigned) &SSP1CON2)*8) + 6;
[; ;pic16lf1509.h: 9814: extern volatile __bit ACKTIM @ (((unsigned) &SSP1CON3)*8) + 7;
[; ;pic16lf1509.h: 9816: extern volatile __bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
[; ;pic16lf1509.h: 9818: extern volatile __bit ADFM @ (((unsigned) &ADCON1)*8) + 7;
[; ;pic16lf1509.h: 9820: extern volatile __bit ADFVR0 @ (((unsigned) &FVRCON)*8) + 0;
[; ;pic16lf1509.h: 9822: extern volatile __bit ADFVR1 @ (((unsigned) &FVRCON)*8) + 1;
[; ;pic16lf1509.h: 9824: extern volatile __bit ADGO @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic16lf1509.h: 9826: extern volatile __bit ADIE @ (((unsigned) &PIE1)*8) + 6;
[; ;pic16lf1509.h: 9828: extern volatile __bit ADIF @ (((unsigned) &PIR1)*8) + 6;
[; ;pic16lf1509.h: 9830: extern volatile __bit ADON @ (((unsigned) &ADCON0)*8) + 0;
[; ;pic16lf1509.h: 9832: extern volatile __bit ADPREF0 @ (((unsigned) &ADCON1)*8) + 0;
[; ;pic16lf1509.h: 9834: extern volatile __bit ADPREF1 @ (((unsigned) &ADCON1)*8) + 1;
[; ;pic16lf1509.h: 9836: extern volatile __bit AHEN @ (((unsigned) &SSP1CON3)*8) + 1;
[; ;pic16lf1509.h: 9838: extern volatile __bit ANSA0 @ (((unsigned) &ANSELA)*8) + 0;
[; ;pic16lf1509.h: 9840: extern volatile __bit ANSA1 @ (((unsigned) &ANSELA)*8) + 1;
[; ;pic16lf1509.h: 9842: extern volatile __bit ANSA2 @ (((unsigned) &ANSELA)*8) + 2;
[; ;pic16lf1509.h: 9844: extern volatile __bit ANSA4 @ (((unsigned) &ANSELA)*8) + 4;
[; ;pic16lf1509.h: 9846: extern volatile __bit ANSB4 @ (((unsigned) &ANSELB)*8) + 4;
[; ;pic16lf1509.h: 9848: extern volatile __bit ANSB5 @ (((unsigned) &ANSELB)*8) + 5;
[; ;pic16lf1509.h: 9850: extern volatile __bit ANSC0 @ (((unsigned) &ANSELC)*8) + 0;
[; ;pic16lf1509.h: 9852: extern volatile __bit ANSC1 @ (((unsigned) &ANSELC)*8) + 1;
[; ;pic16lf1509.h: 9854: extern volatile __bit ANSC2 @ (((unsigned) &ANSELC)*8) + 2;
[; ;pic16lf1509.h: 9856: extern volatile __bit ANSC3 @ (((unsigned) &ANSELC)*8) + 3;
[; ;pic16lf1509.h: 9858: extern volatile __bit ANSC6 @ (((unsigned) &ANSELC)*8) + 6;
[; ;pic16lf1509.h: 9860: extern volatile __bit ANSC7 @ (((unsigned) &ANSELC)*8) + 7;
[; ;pic16lf1509.h: 9862: extern volatile __bit BCL1IE @ (((unsigned) &PIE2)*8) + 3;
[; ;pic16lf1509.h: 9864: extern volatile __bit BCL1IF @ (((unsigned) &PIR2)*8) + 3;
[; ;pic16lf1509.h: 9866: extern volatile __bit BF @ (((unsigned) &SSP1STAT)*8) + 0;
[; ;pic16lf1509.h: 9868: extern volatile __bit BKA0 @ (((unsigned) &ICDBK0L)*8) + 0;
[; ;pic16lf1509.h: 9870: extern volatile __bit BKA1 @ (((unsigned) &ICDBK0L)*8) + 1;
[; ;pic16lf1509.h: 9872: extern volatile __bit BKA10 @ (((unsigned) &ICDBK0H)*8) + 2;
[; ;pic16lf1509.h: 9874: extern volatile __bit BKA11 @ (((unsigned) &ICDBK0H)*8) + 3;
[; ;pic16lf1509.h: 9876: extern volatile __bit BKA12 @ (((unsigned) &ICDBK0H)*8) + 4;
[; ;pic16lf1509.h: 9878: extern volatile __bit BKA13 @ (((unsigned) &ICDBK0H)*8) + 5;
[; ;pic16lf1509.h: 9880: extern volatile __bit BKA14 @ (((unsigned) &ICDBK0H)*8) + 6;
[; ;pic16lf1509.h: 9882: extern volatile __bit BKA2 @ (((unsigned) &ICDBK0L)*8) + 2;
[; ;pic16lf1509.h: 9884: extern volatile __bit BKA3 @ (((unsigned) &ICDBK0L)*8) + 3;
[; ;pic16lf1509.h: 9886: extern volatile __bit BKA4 @ (((unsigned) &ICDBK0L)*8) + 4;
[; ;pic16lf1509.h: 9888: extern volatile __bit BKA5 @ (((unsigned) &ICDBK0L)*8) + 5;
[; ;pic16lf1509.h: 9890: extern volatile __bit BKA6 @ (((unsigned) &ICDBK0L)*8) + 6;
[; ;pic16lf1509.h: 9892: extern volatile __bit BKA7 @ (((unsigned) &ICDBK0L)*8) + 7;
[; ;pic16lf1509.h: 9894: extern volatile __bit BKA8 @ (((unsigned) &ICDBK0H)*8) + 0;
[; ;pic16lf1509.h: 9896: extern volatile __bit BKA9 @ (((unsigned) &ICDBK0H)*8) + 1;
[; ;pic16lf1509.h: 9898: extern volatile __bit BKEN @ (((unsigned) &ICDBK0CON)*8) + 7;
[; ;pic16lf1509.h: 9900: extern volatile __bit BKHLT @ (((unsigned) &ICDBK0CON)*8) + 0;
[; ;pic16lf1509.h: 9902: extern volatile __bit BOEN @ (((unsigned) &SSP1CON3)*8) + 4;
[; ;pic16lf1509.h: 9904: extern volatile __bit BORFS @ (((unsigned) &BORCON)*8) + 6;
[; ;pic16lf1509.h: 9906: extern volatile __bit BORRDY @ (((unsigned) &BORCON)*8) + 0;
[; ;pic16lf1509.h: 9908: extern volatile __bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;
[; ;pic16lf1509.h: 9910: extern volatile __bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
[; ;pic16lf1509.h: 9912: extern volatile __bit BSR0 @ (((unsigned) &BSR)*8) + 0;
[; ;pic16lf1509.h: 9914: extern volatile __bit BSR1 @ (((unsigned) &BSR)*8) + 1;
[; ;pic16lf1509.h: 9916: extern volatile __bit BSR2 @ (((unsigned) &BSR)*8) + 2;
[; ;pic16lf1509.h: 9918: extern volatile __bit BSR3 @ (((unsigned) &BSR)*8) + 3;
[; ;pic16lf1509.h: 9920: extern volatile __bit BSR4 @ (((unsigned) &BSR)*8) + 4;
[; ;pic16lf1509.h: 9922: extern volatile __bit C1HYS @ (((unsigned) &CM1CON0)*8) + 1;
[; ;pic16lf1509.h: 9924: extern volatile __bit C1IE @ (((unsigned) &PIE2)*8) + 5;
[; ;pic16lf1509.h: 9926: extern volatile __bit C1IF @ (((unsigned) &PIR2)*8) + 5;
[; ;pic16lf1509.h: 9928: extern volatile __bit C1INTN @ (((unsigned) &CM1CON1)*8) + 6;
[; ;pic16lf1509.h: 9930: extern volatile __bit C1INTP @ (((unsigned) &CM1CON1)*8) + 7;
[; ;pic16lf1509.h: 9932: extern volatile __bit C1NCH0 @ (((unsigned) &CM1CON1)*8) + 0;
[; ;pic16lf1509.h: 9934: extern volatile __bit C1NCH1 @ (((unsigned) &CM1CON1)*8) + 1;
[; ;pic16lf1509.h: 9936: extern volatile __bit C1NCH2 @ (((unsigned) &CM1CON1)*8) + 2;
[; ;pic16lf1509.h: 9938: extern volatile __bit C1OE @ (((unsigned) &CM1CON0)*8) + 5;
[; ;pic16lf1509.h: 9940: extern volatile __bit C1ON @ (((unsigned) &CM1CON0)*8) + 7;
[; ;pic16lf1509.h: 9942: extern volatile __bit C1OUT @ (((unsigned) &CM1CON0)*8) + 6;
[; ;pic16lf1509.h: 9944: extern volatile __bit C1PCH0 @ (((unsigned) &CM1CON1)*8) + 4;
[; ;pic16lf1509.h: 9946: extern volatile __bit C1PCH1 @ (((unsigned) &CM1CON1)*8) + 5;
[; ;pic16lf1509.h: 9948: extern volatile __bit C1POL @ (((unsigned) &CM1CON0)*8) + 4;
[; ;pic16lf1509.h: 9950: extern volatile __bit C1SP @ (((unsigned) &CM1CON0)*8) + 2;
[; ;pic16lf1509.h: 9952: extern volatile __bit C1SYNC @ (((unsigned) &CM1CON0)*8) + 0;
[; ;pic16lf1509.h: 9954: extern volatile __bit C2HYS @ (((unsigned) &CM2CON0)*8) + 1;
[; ;pic16lf1509.h: 9956: extern volatile __bit C2IE @ (((unsigned) &PIE2)*8) + 6;
[; ;pic16lf1509.h: 9958: extern volatile __bit C2IF @ (((unsigned) &PIR2)*8) + 6;
[; ;pic16lf1509.h: 9960: extern volatile __bit C2INTN @ (((unsigned) &CM2CON1)*8) + 6;
[; ;pic16lf1509.h: 9962: extern volatile __bit C2INTP @ (((unsigned) &CM2CON1)*8) + 7;
[; ;pic16lf1509.h: 9964: extern volatile __bit C2NCH0 @ (((unsigned) &CM2CON1)*8) + 0;
[; ;pic16lf1509.h: 9966: extern volatile __bit C2NCH1 @ (((unsigned) &CM2CON1)*8) + 1;
[; ;pic16lf1509.h: 9968: extern volatile __bit C2NCH2 @ (((unsigned) &CM2CON1)*8) + 2;
[; ;pic16lf1509.h: 9970: extern volatile __bit C2OE @ (((unsigned) &CM2CON0)*8) + 5;
[; ;pic16lf1509.h: 9972: extern volatile __bit C2ON @ (((unsigned) &CM2CON0)*8) + 7;
[; ;pic16lf1509.h: 9974: extern volatile __bit C2OUT @ (((unsigned) &CM2CON0)*8) + 6;
[; ;pic16lf1509.h: 9976: extern volatile __bit C2PCH0 @ (((unsigned) &CM2CON1)*8) + 4;
[; ;pic16lf1509.h: 9978: extern volatile __bit C2PCH1 @ (((unsigned) &CM2CON1)*8) + 5;
[; ;pic16lf1509.h: 9980: extern volatile __bit C2POL @ (((unsigned) &CM2CON0)*8) + 4;
[; ;pic16lf1509.h: 9982: extern volatile __bit C2SP @ (((unsigned) &CM2CON0)*8) + 2;
[; ;pic16lf1509.h: 9984: extern volatile __bit C2SYNC @ (((unsigned) &CM2CON0)*8) + 0;
[; ;pic16lf1509.h: 9986: extern volatile __bit CARRY @ (((unsigned) &STATUS)*8) + 0;
[; ;pic16lf1509.h: 9988: extern volatile __bit CDAFVR0 @ (((unsigned) &FVRCON)*8) + 2;
[; ;pic16lf1509.h: 9990: extern volatile __bit CDAFVR1 @ (((unsigned) &FVRCON)*8) + 3;
[; ;pic16lf1509.h: 9992: extern volatile __bit CFGS @ (((unsigned) &PMCON1)*8) + 6;
[; ;pic16lf1509.h: 9994: extern volatile __bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic16lf1509.h: 9996: extern volatile __bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
[; ;pic16lf1509.h: 9998: extern volatile __bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
[; ;pic16lf1509.h: 10000: extern volatile __bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
[; ;pic16lf1509.h: 10002: extern volatile __bit CHS4 @ (((unsigned) &ADCON0)*8) + 6;
[; ;pic16lf1509.h: 10004: extern volatile __bit CKE @ (((unsigned) &SSP1STAT)*8) + 6;
[; ;pic16lf1509.h: 10006: extern volatile __bit CKP @ (((unsigned) &SSP1CON1)*8) + 4;
[; ;pic16lf1509.h: 10008: extern volatile __bit CLC1IE @ (((unsigned) &PIE3)*8) + 0;
[; ;pic16lf1509.h: 10010: extern volatile __bit CLC1IF @ (((unsigned) &PIR3)*8) + 0;
[; ;pic16lf1509.h: 10012: extern volatile __bit CLC1SEL @ (((unsigned) &APFCON)*8) + 1;
[; ;pic16lf1509.h: 10014: extern volatile __bit CLC2IE @ (((unsigned) &PIE3)*8) + 1;
[; ;pic16lf1509.h: 10016: extern volatile __bit CLC2IF @ (((unsigned) &PIR3)*8) + 1;
[; ;pic16lf1509.h: 10018: extern volatile __bit CLC3IE @ (((unsigned) &PIE3)*8) + 2;
[; ;pic16lf1509.h: 10020: extern volatile __bit CLC3IF @ (((unsigned) &PIR3)*8) + 2;
[; ;pic16lf1509.h: 10022: extern volatile __bit CLC4IE @ (((unsigned) &PIE3)*8) + 3;
[; ;pic16lf1509.h: 10024: extern volatile __bit CLC4IF @ (((unsigned) &PIR3)*8) + 3;
[; ;pic16lf1509.h: 10026: extern volatile __bit CREN @ (((unsigned) &RCSTA)*8) + 4;
[; ;pic16lf1509.h: 10028: extern volatile __bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
[; ;pic16lf1509.h: 10030: extern volatile __bit CWG1DBF0 @ (((unsigned) &CWG1DBF)*8) + 0;
[; ;pic16lf1509.h: 10032: extern volatile __bit CWG1DBF1 @ (((unsigned) &CWG1DBF)*8) + 1;
[; ;pic16lf1509.h: 10034: extern volatile __bit CWG1DBF2 @ (((unsigned) &CWG1DBF)*8) + 2;
[; ;pic16lf1509.h: 10036: extern volatile __bit CWG1DBF3 @ (((unsigned) &CWG1DBF)*8) + 3;
[; ;pic16lf1509.h: 10038: extern volatile __bit CWG1DBF4 @ (((unsigned) &CWG1DBF)*8) + 4;
[; ;pic16lf1509.h: 10040: extern volatile __bit CWG1DBF5 @ (((unsigned) &CWG1DBF)*8) + 5;
[; ;pic16lf1509.h: 10042: extern volatile __bit CWG1DBR0 @ (((unsigned) &CWG1DBR)*8) + 0;
[; ;pic16lf1509.h: 10044: extern volatile __bit CWG1DBR1 @ (((unsigned) &CWG1DBR)*8) + 1;
[; ;pic16lf1509.h: 10046: extern volatile __bit CWG1DBR2 @ (((unsigned) &CWG1DBR)*8) + 2;
[; ;pic16lf1509.h: 10048: extern volatile __bit CWG1DBR3 @ (((unsigned) &CWG1DBR)*8) + 3;
[; ;pic16lf1509.h: 10050: extern volatile __bit CWG1DBR4 @ (((unsigned) &CWG1DBR)*8) + 4;
[; ;pic16lf1509.h: 10052: extern volatile __bit CWG1DBR5 @ (((unsigned) &CWG1DBR)*8) + 5;
[; ;pic16lf1509.h: 10054: extern volatile __bit C_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 0;
[; ;pic16lf1509.h: 10056: extern volatile __bit DACEN @ (((unsigned) &DACCON0)*8) + 7;
[; ;pic16lf1509.h: 10058: extern volatile __bit DACOE1 @ (((unsigned) &DACCON0)*8) + 5;
[; ;pic16lf1509.h: 10060: extern volatile __bit DACOE2 @ (((unsigned) &DACCON0)*8) + 4;
[; ;pic16lf1509.h: 10062: extern volatile __bit DACPSS @ (((unsigned) &DACCON0)*8) + 2;
[; ;pic16lf1509.h: 10064: extern volatile __bit DACR0 @ (((unsigned) &DACCON1)*8) + 0;
[; ;pic16lf1509.h: 10066: extern volatile __bit DACR1 @ (((unsigned) &DACCON1)*8) + 1;
[; ;pic16lf1509.h: 10068: extern volatile __bit DACR2 @ (((unsigned) &DACCON1)*8) + 2;
[; ;pic16lf1509.h: 10070: extern volatile __bit DACR3 @ (((unsigned) &DACCON1)*8) + 3;
[; ;pic16lf1509.h: 10072: extern volatile __bit DACR4 @ (((unsigned) &DACCON1)*8) + 4;
[; ;pic16lf1509.h: 10074: extern volatile __bit DBGIN0 @ (((unsigned) &ICDINSTL)*8) + 0;
[; ;pic16lf1509.h: 10076: extern volatile __bit DBGIN1 @ (((unsigned) &ICDINSTL)*8) + 1;
[; ;pic16lf1509.h: 10078: extern volatile __bit DBGIN10 @ (((unsigned) &ICDINSTH)*8) + 2;
[; ;pic16lf1509.h: 10080: extern volatile __bit DBGIN11 @ (((unsigned) &ICDINSTH)*8) + 3;
[; ;pic16lf1509.h: 10082: extern volatile __bit DBGIN12 @ (((unsigned) &ICDINSTH)*8) + 4;
[; ;pic16lf1509.h: 10084: extern volatile __bit DBGIN13 @ (((unsigned) &ICDINSTH)*8) + 5;
[; ;pic16lf1509.h: 10086: extern volatile __bit DBGIN2 @ (((unsigned) &ICDINSTL)*8) + 2;
[; ;pic16lf1509.h: 10088: extern volatile __bit DBGIN3 @ (((unsigned) &ICDINSTL)*8) + 3;
[; ;pic16lf1509.h: 10090: extern volatile __bit DBGIN4 @ (((unsigned) &ICDINSTL)*8) + 4;
[; ;pic16lf1509.h: 10092: extern volatile __bit DBGIN5 @ (((unsigned) &ICDINSTL)*8) + 5;
[; ;pic16lf1509.h: 10094: extern volatile __bit DBGIN6 @ (((unsigned) &ICDINSTL)*8) + 6;
[; ;pic16lf1509.h: 10096: extern volatile __bit DBGIN7 @ (((unsigned) &ICDINSTL)*8) + 7;
[; ;pic16lf1509.h: 10098: extern volatile __bit DBGIN8 @ (((unsigned) &ICDINSTH)*8) + 0;
[; ;pic16lf1509.h: 10100: extern volatile __bit DBGIN9 @ (((unsigned) &ICDINSTH)*8) + 1;
[; ;pic16lf1509.h: 10102: extern volatile __bit DBGINEX @ (((unsigned) &ICDCON0)*8) + 3;
[; ;pic16lf1509.h: 10104: extern volatile __bit DC @ (((unsigned) &STATUS)*8) + 1;
[; ;pic16lf1509.h: 10106: extern volatile __bit DC_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 1;
[; ;pic16lf1509.h: 10108: extern volatile __bit DEVSEL0 @ (((unsigned) &DEVSEL)*8) + 0;
[; ;pic16lf1509.h: 10110: extern volatile __bit DEVSEL1 @ (((unsigned) &DEVSEL)*8) + 1;
[; ;pic16lf1509.h: 10112: extern volatile __bit DEVSEL2 @ (((unsigned) &DEVSEL)*8) + 2;
[; ;pic16lf1509.h: 10114: extern volatile __bit DHEN @ (((unsigned) &SSP1CON3)*8) + 0;
[; ;pic16lf1509.h: 10116: extern volatile __bit D_nA @ (((unsigned) &SSP1STAT)*8) + 5;
[; ;pic16lf1509.h: 10118: extern volatile __bit FERR @ (((unsigned) &RCSTA)*8) + 2;
[; ;pic16lf1509.h: 10120: extern volatile __bit FREE @ (((unsigned) &PMCON1)*8) + 4;
[; ;pic16lf1509.h: 10122: extern volatile __bit FREEZ @ (((unsigned) &ICDCON0)*8) + 6;
[; ;pic16lf1509.h: 10124: extern volatile __bit FVREN @ (((unsigned) &FVRCON)*8) + 7;
[; ;pic16lf1509.h: 10126: extern volatile __bit FVRRDY @ (((unsigned) &FVRCON)*8) + 6;
[; ;pic16lf1509.h: 10128: extern volatile __bit G1ARSEN @ (((unsigned) &CWG1CON2)*8) + 6;
[; ;pic16lf1509.h: 10130: extern volatile __bit G1ASDLA0 @ (((unsigned) &CWG1CON1)*8) + 4;
[; ;pic16lf1509.h: 10132: extern volatile __bit G1ASDLA1 @ (((unsigned) &CWG1CON1)*8) + 5;
[; ;pic16lf1509.h: 10134: extern volatile __bit G1ASDLB0 @ (((unsigned) &CWG1CON1)*8) + 6;
[; ;pic16lf1509.h: 10136: extern volatile __bit G1ASDLB1 @ (((unsigned) &CWG1CON1)*8) + 7;
[; ;pic16lf1509.h: 10138: extern volatile __bit G1ASDSC1 @ (((unsigned) &CWG1CON2)*8) + 2;
[; ;pic16lf1509.h: 10140: extern volatile __bit G1ASDSC2 @ (((unsigned) &CWG1CON2)*8) + 3;
[; ;pic16lf1509.h: 10142: extern volatile __bit G1ASDSCLC2 @ (((unsigned) &CWG1CON2)*8) + 0;
[; ;pic16lf1509.h: 10144: extern volatile __bit G1ASDSFLT @ (((unsigned) &CWG1CON2)*8) + 1;
[; ;pic16lf1509.h: 10146: extern volatile __bit G1ASE @ (((unsigned) &CWG1CON2)*8) + 7;
[; ;pic16lf1509.h: 10148: extern volatile __bit G1CS0 @ (((unsigned) &CWG1CON0)*8) + 0;
[; ;pic16lf1509.h: 10150: extern volatile __bit G1EN @ (((unsigned) &CWG1CON0)*8) + 7;
[; ;pic16lf1509.h: 10152: extern volatile __bit G1IS0 @ (((unsigned) &CWG1CON1)*8) + 0;
[; ;pic16lf1509.h: 10154: extern volatile __bit G1IS1 @ (((unsigned) &CWG1CON1)*8) + 1;
[; ;pic16lf1509.h: 10156: extern volatile __bit G1IS2 @ (((unsigned) &CWG1CON1)*8) + 2;
[; ;pic16lf1509.h: 10158: extern volatile __bit G1OEA @ (((unsigned) &CWG1CON0)*8) + 5;
[; ;pic16lf1509.h: 10160: extern volatile __bit G1OEB @ (((unsigned) &CWG1CON0)*8) + 6;
[; ;pic16lf1509.h: 10162: extern volatile __bit G1POLA @ (((unsigned) &CWG1CON0)*8) + 3;
[; ;pic16lf1509.h: 10164: extern volatile __bit G1POLB @ (((unsigned) &CWG1CON0)*8) + 4;
[; ;pic16lf1509.h: 10166: extern volatile __bit GCEN @ (((unsigned) &SSP1CON2)*8) + 7;
[; ;pic16lf1509.h: 10168: extern volatile __bit GIE @ (((unsigned) &INTCON)*8) + 7;
[; ;pic16lf1509.h: 10170: extern volatile __bit GO @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic16lf1509.h: 10172: extern volatile __bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic16lf1509.h: 10174: extern volatile __bit HFIOFR @ (((unsigned) &OSCSTAT)*8) + 4;
[; ;pic16lf1509.h: 10176: extern volatile __bit HFIOFS @ (((unsigned) &OSCSTAT)*8) + 0;
[; ;pic16lf1509.h: 10178: extern volatile __bit INBUG @ (((unsigned) &ICDCON0)*8) + 7;
[; ;pic16lf1509.h: 10180: extern volatile __bit INTE @ (((unsigned) &INTCON)*8) + 4;
[; ;pic16lf1509.h: 10182: extern volatile __bit INTEDG @ (((unsigned) &OPTION_REG)*8) + 6;
[; ;pic16lf1509.h: 10184: extern volatile __bit INTF @ (((unsigned) &INTCON)*8) + 1;
[; ;pic16lf1509.h: 10186: extern volatile __bit IOCAF0 @ (((unsigned) &IOCAF)*8) + 0;
[; ;pic16lf1509.h: 10188: extern volatile __bit IOCAF1 @ (((unsigned) &IOCAF)*8) + 1;
[; ;pic16lf1509.h: 10190: extern volatile __bit IOCAF2 @ (((unsigned) &IOCAF)*8) + 2;
[; ;pic16lf1509.h: 10192: extern volatile __bit IOCAF3 @ (((unsigned) &IOCAF)*8) + 3;
[; ;pic16lf1509.h: 10194: extern volatile __bit IOCAF4 @ (((unsigned) &IOCAF)*8) + 4;
[; ;pic16lf1509.h: 10196: extern volatile __bit IOCAF5 @ (((unsigned) &IOCAF)*8) + 5;
[; ;pic16lf1509.h: 10198: extern volatile __bit IOCAN0 @ (((unsigned) &IOCAN)*8) + 0;
[; ;pic16lf1509.h: 10200: extern volatile __bit IOCAN1 @ (((unsigned) &IOCAN)*8) + 1;
[; ;pic16lf1509.h: 10202: extern volatile __bit IOCAN2 @ (((unsigned) &IOCAN)*8) + 2;
[; ;pic16lf1509.h: 10204: extern volatile __bit IOCAN3 @ (((unsigned) &IOCAN)*8) + 3;
[; ;pic16lf1509.h: 10206: extern volatile __bit IOCAN4 @ (((unsigned) &IOCAN)*8) + 4;
[; ;pic16lf1509.h: 10208: extern volatile __bit IOCAN5 @ (((unsigned) &IOCAN)*8) + 5;
[; ;pic16lf1509.h: 10210: extern volatile __bit IOCAP0 @ (((unsigned) &IOCAP)*8) + 0;
[; ;pic16lf1509.h: 10212: extern volatile __bit IOCAP1 @ (((unsigned) &IOCAP)*8) + 1;
[; ;pic16lf1509.h: 10214: extern volatile __bit IOCAP2 @ (((unsigned) &IOCAP)*8) + 2;
[; ;pic16lf1509.h: 10216: extern volatile __bit IOCAP3 @ (((unsigned) &IOCAP)*8) + 3;
[; ;pic16lf1509.h: 10218: extern volatile __bit IOCAP4 @ (((unsigned) &IOCAP)*8) + 4;
[; ;pic16lf1509.h: 10220: extern volatile __bit IOCAP5 @ (((unsigned) &IOCAP)*8) + 5;
[; ;pic16lf1509.h: 10222: extern volatile __bit IOCBF4 @ (((unsigned) &IOCBF)*8) + 4;
[; ;pic16lf1509.h: 10224: extern volatile __bit IOCBF5 @ (((unsigned) &IOCBF)*8) + 5;
[; ;pic16lf1509.h: 10226: extern volatile __bit IOCBF6 @ (((unsigned) &IOCBF)*8) + 6;
[; ;pic16lf1509.h: 10228: extern volatile __bit IOCBF7 @ (((unsigned) &IOCBF)*8) + 7;
[; ;pic16lf1509.h: 10230: extern volatile __bit IOCBN4 @ (((unsigned) &IOCBN)*8) + 4;
[; ;pic16lf1509.h: 10232: extern volatile __bit IOCBN5 @ (((unsigned) &IOCBN)*8) + 5;
[; ;pic16lf1509.h: 10234: extern volatile __bit IOCBN6 @ (((unsigned) &IOCBN)*8) + 6;
[; ;pic16lf1509.h: 10236: extern volatile __bit IOCBN7 @ (((unsigned) &IOCBN)*8) + 7;
[; ;pic16lf1509.h: 10238: extern volatile __bit IOCBP4 @ (((unsigned) &IOCBP)*8) + 4;
[; ;pic16lf1509.h: 10240: extern volatile __bit IOCBP5 @ (((unsigned) &IOCBP)*8) + 5;
[; ;pic16lf1509.h: 10242: extern volatile __bit IOCBP6 @ (((unsigned) &IOCBP)*8) + 6;
[; ;pic16lf1509.h: 10244: extern volatile __bit IOCBP7 @ (((unsigned) &IOCBP)*8) + 7;
[; ;pic16lf1509.h: 10246: extern volatile __bit IOCIE @ (((unsigned) &INTCON)*8) + 3;
[; ;pic16lf1509.h: 10248: extern volatile __bit IOCIF @ (((unsigned) &INTCON)*8) + 0;
[; ;pic16lf1509.h: 10250: extern volatile __bit IRCF0 @ (((unsigned) &OSCCON)*8) + 3;
[; ;pic16lf1509.h: 10252: extern volatile __bit IRCF1 @ (((unsigned) &OSCCON)*8) + 4;
[; ;pic16lf1509.h: 10254: extern volatile __bit IRCF2 @ (((unsigned) &OSCCON)*8) + 5;
[; ;pic16lf1509.h: 10256: extern volatile __bit IRCF3 @ (((unsigned) &OSCCON)*8) + 6;
[; ;pic16lf1509.h: 10258: extern volatile __bit LATA0 @ (((unsigned) &LATA)*8) + 0;
[; ;pic16lf1509.h: 10260: extern volatile __bit LATA1 @ (((unsigned) &LATA)*8) + 1;
[; ;pic16lf1509.h: 10262: extern volatile __bit LATA2 @ (((unsigned) &LATA)*8) + 2;
[; ;pic16lf1509.h: 10264: extern volatile __bit LATA4 @ (((unsigned) &LATA)*8) + 4;
[; ;pic16lf1509.h: 10266: extern volatile __bit LATA5 @ (((unsigned) &LATA)*8) + 5;
[; ;pic16lf1509.h: 10268: extern volatile __bit LATB4 @ (((unsigned) &LATB)*8) + 4;
[; ;pic16lf1509.h: 10270: extern volatile __bit LATB5 @ (((unsigned) &LATB)*8) + 5;
[; ;pic16lf1509.h: 10272: extern volatile __bit LATB6 @ (((unsigned) &LATB)*8) + 6;
[; ;pic16lf1509.h: 10274: extern volatile __bit LATB7 @ (((unsigned) &LATB)*8) + 7;
[; ;pic16lf1509.h: 10276: extern volatile __bit LATC0 @ (((unsigned) &LATC)*8) + 0;
[; ;pic16lf1509.h: 10278: extern volatile __bit LATC1 @ (((unsigned) &LATC)*8) + 1;
[; ;pic16lf1509.h: 10280: extern volatile __bit LATC2 @ (((unsigned) &LATC)*8) + 2;
[; ;pic16lf1509.h: 10282: extern volatile __bit LATC3 @ (((unsigned) &LATC)*8) + 3;
[; ;pic16lf1509.h: 10284: extern volatile __bit LATC4 @ (((unsigned) &LATC)*8) + 4;
[; ;pic16lf1509.h: 10286: extern volatile __bit LATC5 @ (((unsigned) &LATC)*8) + 5;
[; ;pic16lf1509.h: 10288: extern volatile __bit LATC6 @ (((unsigned) &LATC)*8) + 6;
[; ;pic16lf1509.h: 10290: extern volatile __bit LATC7 @ (((unsigned) &LATC)*8) + 7;
[; ;pic16lf1509.h: 10292: extern volatile __bit LAT_ICDCLK @ (((unsigned) &ICDIO)*8) + 4;
[; ;pic16lf1509.h: 10294: extern volatile __bit LAT_ICDDAT @ (((unsigned) &ICDIO)*8) + 5;
[; ;pic16lf1509.h: 10296: extern volatile __bit LC1D1S0 @ (((unsigned) &CLC1SEL0)*8) + 0;
[; ;pic16lf1509.h: 10298: extern volatile __bit LC1D1S1 @ (((unsigned) &CLC1SEL0)*8) + 1;
[; ;pic16lf1509.h: 10300: extern volatile __bit LC1D1S2 @ (((unsigned) &CLC1SEL0)*8) + 2;
[; ;pic16lf1509.h: 10302: extern volatile __bit LC1D2S0 @ (((unsigned) &CLC1SEL0)*8) + 4;
[; ;pic16lf1509.h: 10304: extern volatile __bit LC1D2S1 @ (((unsigned) &CLC1SEL0)*8) + 5;
[; ;pic16lf1509.h: 10306: extern volatile __bit LC1D2S2 @ (((unsigned) &CLC1SEL0)*8) + 6;
[; ;pic16lf1509.h: 10308: extern volatile __bit LC1D3S0 @ (((unsigned) &CLC1SEL1)*8) + 0;
[; ;pic16lf1509.h: 10310: extern volatile __bit LC1D3S1 @ (((unsigned) &CLC1SEL1)*8) + 1;
[; ;pic16lf1509.h: 10312: extern volatile __bit LC1D3S2 @ (((unsigned) &CLC1SEL1)*8) + 2;
[; ;pic16lf1509.h: 10314: extern volatile __bit LC1D4S0 @ (((unsigned) &CLC1SEL1)*8) + 4;
[; ;pic16lf1509.h: 10316: extern volatile __bit LC1D4S1 @ (((unsigned) &CLC1SEL1)*8) + 5;
[; ;pic16lf1509.h: 10318: extern volatile __bit LC1D4S2 @ (((unsigned) &CLC1SEL1)*8) + 6;
[; ;pic16lf1509.h: 10320: extern volatile __bit LC1EN @ (((unsigned) &CLC1CON)*8) + 7;
[; ;pic16lf1509.h: 10322: extern volatile __bit LC1G1D1N @ (((unsigned) &CLC1GLS0)*8) + 0;
[; ;pic16lf1509.h: 10324: extern volatile __bit LC1G1D1T @ (((unsigned) &CLC1GLS0)*8) + 1;
[; ;pic16lf1509.h: 10326: extern volatile __bit LC1G1D2N @ (((unsigned) &CLC1GLS0)*8) + 2;
[; ;pic16lf1509.h: 10328: extern volatile __bit LC1G1D2T @ (((unsigned) &CLC1GLS0)*8) + 3;
[; ;pic16lf1509.h: 10330: extern volatile __bit LC1G1D3N @ (((unsigned) &CLC1GLS0)*8) + 4;
[; ;pic16lf1509.h: 10332: extern volatile __bit LC1G1D3T @ (((unsigned) &CLC1GLS0)*8) + 5;
[; ;pic16lf1509.h: 10334: extern volatile __bit LC1G1D4N @ (((unsigned) &CLC1GLS0)*8) + 6;
[; ;pic16lf1509.h: 10336: extern volatile __bit LC1G1D4T @ (((unsigned) &CLC1GLS0)*8) + 7;
[; ;pic16lf1509.h: 10338: extern volatile __bit LC1G1POL @ (((unsigned) &CLC1POL)*8) + 0;
[; ;pic16lf1509.h: 10340: extern volatile __bit LC1G2D1N @ (((unsigned) &CLC1GLS1)*8) + 0;
[; ;pic16lf1509.h: 10342: extern volatile __bit LC1G2D1T @ (((unsigned) &CLC1GLS1)*8) + 1;
[; ;pic16lf1509.h: 10344: extern volatile __bit LC1G2D2N @ (((unsigned) &CLC1GLS1)*8) + 2;
[; ;pic16lf1509.h: 10346: extern volatile __bit LC1G2D2T @ (((unsigned) &CLC1GLS1)*8) + 3;
[; ;pic16lf1509.h: 10348: extern volatile __bit LC1G2D3N @ (((unsigned) &CLC1GLS1)*8) + 4;
[; ;pic16lf1509.h: 10350: extern volatile __bit LC1G2D3T @ (((unsigned) &CLC1GLS1)*8) + 5;
[; ;pic16lf1509.h: 10352: extern volatile __bit LC1G2D4N @ (((unsigned) &CLC1GLS1)*8) + 6;
[; ;pic16lf1509.h: 10354: extern volatile __bit LC1G2D4T @ (((unsigned) &CLC1GLS1)*8) + 7;
[; ;pic16lf1509.h: 10356: extern volatile __bit LC1G2POL @ (((unsigned) &CLC1POL)*8) + 1;
[; ;pic16lf1509.h: 10358: extern volatile __bit LC1G3D1N @ (((unsigned) &CLC1GLS2)*8) + 0;
[; ;pic16lf1509.h: 10360: extern volatile __bit LC1G3D1T @ (((unsigned) &CLC1GLS2)*8) + 1;
[; ;pic16lf1509.h: 10362: extern volatile __bit LC1G3D2N @ (((unsigned) &CLC1GLS2)*8) + 2;
[; ;pic16lf1509.h: 10364: extern volatile __bit LC1G3D2T @ (((unsigned) &CLC1GLS2)*8) + 3;
[; ;pic16lf1509.h: 10366: extern volatile __bit LC1G3D3N @ (((unsigned) &CLC1GLS2)*8) + 4;
[; ;pic16lf1509.h: 10368: extern volatile __bit LC1G3D3T @ (((unsigned) &CLC1GLS2)*8) + 5;
[; ;pic16lf1509.h: 10370: extern volatile __bit LC1G3D4N @ (((unsigned) &CLC1GLS2)*8) + 6;
[; ;pic16lf1509.h: 10372: extern volatile __bit LC1G3D4T @ (((unsigned) &CLC1GLS2)*8) + 7;
[; ;pic16lf1509.h: 10374: extern volatile __bit LC1G3POL @ (((unsigned) &CLC1POL)*8) + 2;
[; ;pic16lf1509.h: 10376: extern volatile __bit LC1G4D1N @ (((unsigned) &CLC1GLS3)*8) + 0;
[; ;pic16lf1509.h: 10378: extern volatile __bit LC1G4D1T @ (((unsigned) &CLC1GLS3)*8) + 1;
[; ;pic16lf1509.h: 10380: extern volatile __bit LC1G4D2N @ (((unsigned) &CLC1GLS3)*8) + 2;
[; ;pic16lf1509.h: 10382: extern volatile __bit LC1G4D2T @ (((unsigned) &CLC1GLS3)*8) + 3;
[; ;pic16lf1509.h: 10384: extern volatile __bit LC1G4D3N @ (((unsigned) &CLC1GLS3)*8) + 4;
[; ;pic16lf1509.h: 10386: extern volatile __bit LC1G4D3T @ (((unsigned) &CLC1GLS3)*8) + 5;
[; ;pic16lf1509.h: 10388: extern volatile __bit LC1G4D4N @ (((unsigned) &CLC1GLS3)*8) + 6;
[; ;pic16lf1509.h: 10390: extern volatile __bit LC1G4D4T @ (((unsigned) &CLC1GLS3)*8) + 7;
[; ;pic16lf1509.h: 10392: extern volatile __bit LC1G4POL @ (((unsigned) &CLC1POL)*8) + 3;
[; ;pic16lf1509.h: 10394: extern volatile __bit LC1INTN @ (((unsigned) &CLC1CON)*8) + 3;
[; ;pic16lf1509.h: 10396: extern volatile __bit LC1INTP @ (((unsigned) &CLC1CON)*8) + 4;
[; ;pic16lf1509.h: 10398: extern volatile __bit LC1MODE0 @ (((unsigned) &CLC1CON)*8) + 0;
[; ;pic16lf1509.h: 10400: extern volatile __bit LC1MODE1 @ (((unsigned) &CLC1CON)*8) + 1;
[; ;pic16lf1509.h: 10402: extern volatile __bit LC1MODE2 @ (((unsigned) &CLC1CON)*8) + 2;
[; ;pic16lf1509.h: 10404: extern volatile __bit LC1OE @ (((unsigned) &CLC1CON)*8) + 6;
[; ;pic16lf1509.h: 10406: extern volatile __bit LC1OUT @ (((unsigned) &CLC1CON)*8) + 5;
[; ;pic16lf1509.h: 10408: extern volatile __bit LC1POL @ (((unsigned) &CLC1POL)*8) + 7;
[; ;pic16lf1509.h: 10410: extern volatile __bit LC2D1S0 @ (((unsigned) &CLC2SEL0)*8) + 0;
[; ;pic16lf1509.h: 10412: extern volatile __bit LC2D1S1 @ (((unsigned) &CLC2SEL0)*8) + 1;
[; ;pic16lf1509.h: 10414: extern volatile __bit LC2D1S2 @ (((unsigned) &CLC2SEL0)*8) + 2;
[; ;pic16lf1509.h: 10416: extern volatile __bit LC2D2S0 @ (((unsigned) &CLC2SEL0)*8) + 4;
[; ;pic16lf1509.h: 10418: extern volatile __bit LC2D2S1 @ (((unsigned) &CLC2SEL0)*8) + 5;
[; ;pic16lf1509.h: 10420: extern volatile __bit LC2D2S2 @ (((unsigned) &CLC2SEL0)*8) + 6;
[; ;pic16lf1509.h: 10422: extern volatile __bit LC2D3S0 @ (((unsigned) &CLC2SEL1)*8) + 0;
[; ;pic16lf1509.h: 10424: extern volatile __bit LC2D3S1 @ (((unsigned) &CLC2SEL1)*8) + 1;
[; ;pic16lf1509.h: 10426: extern volatile __bit LC2D3S2 @ (((unsigned) &CLC2SEL1)*8) + 2;
[; ;pic16lf1509.h: 10428: extern volatile __bit LC2D4S0 @ (((unsigned) &CLC2SEL1)*8) + 4;
[; ;pic16lf1509.h: 10430: extern volatile __bit LC2D4S1 @ (((unsigned) &CLC2SEL1)*8) + 5;
[; ;pic16lf1509.h: 10432: extern volatile __bit LC2D4S2 @ (((unsigned) &CLC2SEL1)*8) + 6;
[; ;pic16lf1509.h: 10434: extern volatile __bit LC2EN @ (((unsigned) &CLC2CON)*8) + 7;
[; ;pic16lf1509.h: 10436: extern volatile __bit LC2G1D1N @ (((unsigned) &CLC2GLS0)*8) + 0;
[; ;pic16lf1509.h: 10438: extern volatile __bit LC2G1D1T @ (((unsigned) &CLC2GLS0)*8) + 1;
[; ;pic16lf1509.h: 10440: extern volatile __bit LC2G1D2N @ (((unsigned) &CLC2GLS0)*8) + 2;
[; ;pic16lf1509.h: 10442: extern volatile __bit LC2G1D2T @ (((unsigned) &CLC2GLS0)*8) + 3;
[; ;pic16lf1509.h: 10444: extern volatile __bit LC2G1D3N @ (((unsigned) &CLC2GLS0)*8) + 4;
[; ;pic16lf1509.h: 10446: extern volatile __bit LC2G1D3T @ (((unsigned) &CLC2GLS0)*8) + 5;
[; ;pic16lf1509.h: 10448: extern volatile __bit LC2G1D4N @ (((unsigned) &CLC2GLS0)*8) + 6;
[; ;pic16lf1509.h: 10450: extern volatile __bit LC2G1D4T @ (((unsigned) &CLC2GLS0)*8) + 7;
[; ;pic16lf1509.h: 10452: extern volatile __bit LC2G1POL @ (((unsigned) &CLC2POL)*8) + 0;
[; ;pic16lf1509.h: 10454: extern volatile __bit LC2G2D1N @ (((unsigned) &CLC2GLS1)*8) + 0;
[; ;pic16lf1509.h: 10456: extern volatile __bit LC2G2D1T @ (((unsigned) &CLC2GLS1)*8) + 1;
[; ;pic16lf1509.h: 10458: extern volatile __bit LC2G2D2N @ (((unsigned) &CLC2GLS1)*8) + 2;
[; ;pic16lf1509.h: 10460: extern volatile __bit LC2G2D2T @ (((unsigned) &CLC2GLS1)*8) + 3;
[; ;pic16lf1509.h: 10462: extern volatile __bit LC2G2D3N @ (((unsigned) &CLC2GLS1)*8) + 4;
[; ;pic16lf1509.h: 10464: extern volatile __bit LC2G2D3T @ (((unsigned) &CLC2GLS1)*8) + 5;
[; ;pic16lf1509.h: 10466: extern volatile __bit LC2G2D4N @ (((unsigned) &CLC2GLS1)*8) + 6;
[; ;pic16lf1509.h: 10468: extern volatile __bit LC2G2D4T @ (((unsigned) &CLC2GLS1)*8) + 7;
[; ;pic16lf1509.h: 10470: extern volatile __bit LC2G2POL @ (((unsigned) &CLC2POL)*8) + 1;
[; ;pic16lf1509.h: 10472: extern volatile __bit LC2G3D1N @ (((unsigned) &CLC2GLS2)*8) + 0;
[; ;pic16lf1509.h: 10474: extern volatile __bit LC2G3D1T @ (((unsigned) &CLC2GLS2)*8) + 1;
[; ;pic16lf1509.h: 10476: extern volatile __bit LC2G3D2N @ (((unsigned) &CLC2GLS2)*8) + 2;
[; ;pic16lf1509.h: 10478: extern volatile __bit LC2G3D2T @ (((unsigned) &CLC2GLS2)*8) + 3;
[; ;pic16lf1509.h: 10480: extern volatile __bit LC2G3D3N @ (((unsigned) &CLC2GLS2)*8) + 4;
[; ;pic16lf1509.h: 10482: extern volatile __bit LC2G3D3T @ (((unsigned) &CLC2GLS2)*8) + 5;
[; ;pic16lf1509.h: 10484: extern volatile __bit LC2G3D4N @ (((unsigned) &CLC2GLS2)*8) + 6;
[; ;pic16lf1509.h: 10486: extern volatile __bit LC2G3D4T @ (((unsigned) &CLC2GLS2)*8) + 7;
[; ;pic16lf1509.h: 10488: extern volatile __bit LC2G3POL @ (((unsigned) &CLC2POL)*8) + 2;
[; ;pic16lf1509.h: 10490: extern volatile __bit LC2G4D1N @ (((unsigned) &CLC2GLS3)*8) + 0;
[; ;pic16lf1509.h: 10492: extern volatile __bit LC2G4D1T @ (((unsigned) &CLC2GLS3)*8) + 1;
[; ;pic16lf1509.h: 10494: extern volatile __bit LC2G4D2N @ (((unsigned) &CLC2GLS3)*8) + 2;
[; ;pic16lf1509.h: 10496: extern volatile __bit LC2G4D2T @ (((unsigned) &CLC2GLS3)*8) + 3;
[; ;pic16lf1509.h: 10498: extern volatile __bit LC2G4D3N @ (((unsigned) &CLC2GLS3)*8) + 4;
[; ;pic16lf1509.h: 10500: extern volatile __bit LC2G4D3T @ (((unsigned) &CLC2GLS3)*8) + 5;
[; ;pic16lf1509.h: 10502: extern volatile __bit LC2G4D4N @ (((unsigned) &CLC2GLS3)*8) + 6;
[; ;pic16lf1509.h: 10504: extern volatile __bit LC2G4D4T @ (((unsigned) &CLC2GLS3)*8) + 7;
[; ;pic16lf1509.h: 10506: extern volatile __bit LC2G4POL @ (((unsigned) &CLC2POL)*8) + 3;
[; ;pic16lf1509.h: 10508: extern volatile __bit LC2INTN @ (((unsigned) &CLC2CON)*8) + 3;
[; ;pic16lf1509.h: 10510: extern volatile __bit LC2INTP @ (((unsigned) &CLC2CON)*8) + 4;
[; ;pic16lf1509.h: 10512: extern volatile __bit LC2MODE0 @ (((unsigned) &CLC2CON)*8) + 0;
[; ;pic16lf1509.h: 10514: extern volatile __bit LC2MODE1 @ (((unsigned) &CLC2CON)*8) + 1;
[; ;pic16lf1509.h: 10516: extern volatile __bit LC2MODE2 @ (((unsigned) &CLC2CON)*8) + 2;
[; ;pic16lf1509.h: 10518: extern volatile __bit LC2OE @ (((unsigned) &CLC2CON)*8) + 6;
[; ;pic16lf1509.h: 10520: extern volatile __bit LC2OUT @ (((unsigned) &CLC2CON)*8) + 5;
[; ;pic16lf1509.h: 10522: extern volatile __bit LC2POL @ (((unsigned) &CLC2POL)*8) + 7;
[; ;pic16lf1509.h: 10524: extern volatile __bit LC3D1S0 @ (((unsigned) &CLC3SEL0)*8) + 0;
[; ;pic16lf1509.h: 10526: extern volatile __bit LC3D1S1 @ (((unsigned) &CLC3SEL0)*8) + 1;
[; ;pic16lf1509.h: 10528: extern volatile __bit LC3D1S2 @ (((unsigned) &CLC3SEL0)*8) + 2;
[; ;pic16lf1509.h: 10530: extern volatile __bit LC3D2S0 @ (((unsigned) &CLC3SEL0)*8) + 4;
[; ;pic16lf1509.h: 10532: extern volatile __bit LC3D2S1 @ (((unsigned) &CLC3SEL0)*8) + 5;
[; ;pic16lf1509.h: 10534: extern volatile __bit LC3D2S2 @ (((unsigned) &CLC3SEL0)*8) + 6;
[; ;pic16lf1509.h: 10536: extern volatile __bit LC3D3S0 @ (((unsigned) &CLC3SEL1)*8) + 0;
[; ;pic16lf1509.h: 10538: extern volatile __bit LC3D3S1 @ (((unsigned) &CLC3SEL1)*8) + 1;
[; ;pic16lf1509.h: 10540: extern volatile __bit LC3D3S2 @ (((unsigned) &CLC3SEL1)*8) + 2;
[; ;pic16lf1509.h: 10542: extern volatile __bit LC3D4S0 @ (((unsigned) &CLC3SEL1)*8) + 4;
[; ;pic16lf1509.h: 10544: extern volatile __bit LC3D4S1 @ (((unsigned) &CLC3SEL1)*8) + 5;
[; ;pic16lf1509.h: 10546: extern volatile __bit LC3D4S2 @ (((unsigned) &CLC3SEL1)*8) + 6;
[; ;pic16lf1509.h: 10548: extern volatile __bit LC3EN @ (((unsigned) &CLC3CON)*8) + 7;
[; ;pic16lf1509.h: 10550: extern volatile __bit LC3G1D1N @ (((unsigned) &CLC3GLS0)*8) + 0;
[; ;pic16lf1509.h: 10552: extern volatile __bit LC3G1D1T @ (((unsigned) &CLC3GLS0)*8) + 1;
[; ;pic16lf1509.h: 10554: extern volatile __bit LC3G1D2N @ (((unsigned) &CLC3GLS0)*8) + 2;
[; ;pic16lf1509.h: 10556: extern volatile __bit LC3G1D2T @ (((unsigned) &CLC3GLS0)*8) + 3;
[; ;pic16lf1509.h: 10558: extern volatile __bit LC3G1D3N @ (((unsigned) &CLC3GLS0)*8) + 4;
[; ;pic16lf1509.h: 10560: extern volatile __bit LC3G1D3T @ (((unsigned) &CLC3GLS0)*8) + 5;
[; ;pic16lf1509.h: 10562: extern volatile __bit LC3G1D4N @ (((unsigned) &CLC3GLS0)*8) + 6;
[; ;pic16lf1509.h: 10564: extern volatile __bit LC3G1D4T @ (((unsigned) &CLC3GLS0)*8) + 7;
[; ;pic16lf1509.h: 10566: extern volatile __bit LC3G1POL @ (((unsigned) &CLC3POL)*8) + 0;
[; ;pic16lf1509.h: 10568: extern volatile __bit LC3G2D1N @ (((unsigned) &CLC3GLS1)*8) + 0;
[; ;pic16lf1509.h: 10570: extern volatile __bit LC3G2D1T @ (((unsigned) &CLC3GLS1)*8) + 1;
[; ;pic16lf1509.h: 10572: extern volatile __bit LC3G2D2N @ (((unsigned) &CLC3GLS1)*8) + 2;
[; ;pic16lf1509.h: 10574: extern volatile __bit LC3G2D2T @ (((unsigned) &CLC3GLS1)*8) + 3;
[; ;pic16lf1509.h: 10576: extern volatile __bit LC3G2D3N @ (((unsigned) &CLC3GLS1)*8) + 4;
[; ;pic16lf1509.h: 10578: extern volatile __bit LC3G2D3T @ (((unsigned) &CLC3GLS1)*8) + 5;
[; ;pic16lf1509.h: 10580: extern volatile __bit LC3G2D4N @ (((unsigned) &CLC3GLS1)*8) + 6;
[; ;pic16lf1509.h: 10582: extern volatile __bit LC3G2D4T @ (((unsigned) &CLC3GLS1)*8) + 7;
[; ;pic16lf1509.h: 10584: extern volatile __bit LC3G2POL @ (((unsigned) &CLC3POL)*8) + 1;
[; ;pic16lf1509.h: 10586: extern volatile __bit LC3G3D1N @ (((unsigned) &CLC3GLS2)*8) + 0;
[; ;pic16lf1509.h: 10588: extern volatile __bit LC3G3D1T @ (((unsigned) &CLC3GLS2)*8) + 1;
[; ;pic16lf1509.h: 10590: extern volatile __bit LC3G3D2N @ (((unsigned) &CLC3GLS2)*8) + 2;
[; ;pic16lf1509.h: 10592: extern volatile __bit LC3G3D2T @ (((unsigned) &CLC3GLS2)*8) + 3;
[; ;pic16lf1509.h: 10594: extern volatile __bit LC3G3D3N @ (((unsigned) &CLC3GLS2)*8) + 4;
[; ;pic16lf1509.h: 10596: extern volatile __bit LC3G3D3T @ (((unsigned) &CLC3GLS2)*8) + 5;
[; ;pic16lf1509.h: 10598: extern volatile __bit LC3G3D4N @ (((unsigned) &CLC3GLS2)*8) + 6;
[; ;pic16lf1509.h: 10600: extern volatile __bit LC3G3D4T @ (((unsigned) &CLC3GLS2)*8) + 7;
[; ;pic16lf1509.h: 10602: extern volatile __bit LC3G3POL @ (((unsigned) &CLC3POL)*8) + 2;
[; ;pic16lf1509.h: 10604: extern volatile __bit LC3G4D1N @ (((unsigned) &CLC3GLS3)*8) + 0;
[; ;pic16lf1509.h: 10606: extern volatile __bit LC3G4D1T @ (((unsigned) &CLC3GLS3)*8) + 1;
[; ;pic16lf1509.h: 10608: extern volatile __bit LC3G4D2N @ (((unsigned) &CLC3GLS3)*8) + 2;
[; ;pic16lf1509.h: 10610: extern volatile __bit LC3G4D2T @ (((unsigned) &CLC3GLS3)*8) + 3;
[; ;pic16lf1509.h: 10612: extern volatile __bit LC3G4D3N @ (((unsigned) &CLC3GLS3)*8) + 4;
[; ;pic16lf1509.h: 10614: extern volatile __bit LC3G4D3T @ (((unsigned) &CLC3GLS3)*8) + 5;
[; ;pic16lf1509.h: 10616: extern volatile __bit LC3G4D4N @ (((unsigned) &CLC3GLS3)*8) + 6;
[; ;pic16lf1509.h: 10618: extern volatile __bit LC3G4D4T @ (((unsigned) &CLC3GLS3)*8) + 7;
[; ;pic16lf1509.h: 10620: extern volatile __bit LC3G4POL @ (((unsigned) &CLC3POL)*8) + 3;
[; ;pic16lf1509.h: 10622: extern volatile __bit LC3INTN @ (((unsigned) &CLC3CON)*8) + 3;
[; ;pic16lf1509.h: 10624: extern volatile __bit LC3INTP @ (((unsigned) &CLC3CON)*8) + 4;
[; ;pic16lf1509.h: 10626: extern volatile __bit LC3MODE0 @ (((unsigned) &CLC3CON)*8) + 0;
[; ;pic16lf1509.h: 10628: extern volatile __bit LC3MODE1 @ (((unsigned) &CLC3CON)*8) + 1;
[; ;pic16lf1509.h: 10630: extern volatile __bit LC3MODE2 @ (((unsigned) &CLC3CON)*8) + 2;
[; ;pic16lf1509.h: 10632: extern volatile __bit LC3OE @ (((unsigned) &CLC3CON)*8) + 6;
[; ;pic16lf1509.h: 10634: extern volatile __bit LC3OUT @ (((unsigned) &CLC3CON)*8) + 5;
[; ;pic16lf1509.h: 10636: extern volatile __bit LC3POL @ (((unsigned) &CLC3POL)*8) + 7;
[; ;pic16lf1509.h: 10638: extern volatile __bit LC4D1S0 @ (((unsigned) &CLC4SEL0)*8) + 0;
[; ;pic16lf1509.h: 10640: extern volatile __bit LC4D1S1 @ (((unsigned) &CLC4SEL0)*8) + 1;
[; ;pic16lf1509.h: 10642: extern volatile __bit LC4D1S2 @ (((unsigned) &CLC4SEL0)*8) + 2;
[; ;pic16lf1509.h: 10644: extern volatile __bit LC4D2S0 @ (((unsigned) &CLC4SEL0)*8) + 4;
[; ;pic16lf1509.h: 10646: extern volatile __bit LC4D2S1 @ (((unsigned) &CLC4SEL0)*8) + 5;
[; ;pic16lf1509.h: 10648: extern volatile __bit LC4D2S2 @ (((unsigned) &CLC4SEL0)*8) + 6;
[; ;pic16lf1509.h: 10650: extern volatile __bit LC4D3S0 @ (((unsigned) &CLC4SEL1)*8) + 0;
[; ;pic16lf1509.h: 10652: extern volatile __bit LC4D3S1 @ (((unsigned) &CLC4SEL1)*8) + 1;
[; ;pic16lf1509.h: 10654: extern volatile __bit LC4D3S2 @ (((unsigned) &CLC4SEL1)*8) + 2;
[; ;pic16lf1509.h: 10656: extern volatile __bit LC4D4S0 @ (((unsigned) &CLC4SEL1)*8) + 4;
[; ;pic16lf1509.h: 10658: extern volatile __bit LC4D4S1 @ (((unsigned) &CLC4SEL1)*8) + 5;
[; ;pic16lf1509.h: 10660: extern volatile __bit LC4D4S2 @ (((unsigned) &CLC4SEL1)*8) + 6;
[; ;pic16lf1509.h: 10662: extern volatile __bit LC4EN @ (((unsigned) &CLC4CON)*8) + 7;
[; ;pic16lf1509.h: 10664: extern volatile __bit LC4G1D1N @ (((unsigned) &CLC4GLS0)*8) + 0;
[; ;pic16lf1509.h: 10666: extern volatile __bit LC4G1D1T @ (((unsigned) &CLC4GLS0)*8) + 1;
[; ;pic16lf1509.h: 10668: extern volatile __bit LC4G1D2N @ (((unsigned) &CLC4GLS0)*8) + 2;
[; ;pic16lf1509.h: 10670: extern volatile __bit LC4G1D2T @ (((unsigned) &CLC4GLS0)*8) + 3;
[; ;pic16lf1509.h: 10672: extern volatile __bit LC4G1D3N @ (((unsigned) &CLC4GLS0)*8) + 4;
[; ;pic16lf1509.h: 10674: extern volatile __bit LC4G1D3T @ (((unsigned) &CLC4GLS0)*8) + 5;
[; ;pic16lf1509.h: 10676: extern volatile __bit LC4G1D4N @ (((unsigned) &CLC4GLS0)*8) + 6;
[; ;pic16lf1509.h: 10678: extern volatile __bit LC4G1D4T @ (((unsigned) &CLC4GLS0)*8) + 7;
[; ;pic16lf1509.h: 10680: extern volatile __bit LC4G1POL @ (((unsigned) &CLC4POL)*8) + 0;
[; ;pic16lf1509.h: 10682: extern volatile __bit LC4G2D1N @ (((unsigned) &CLC4GLS1)*8) + 0;
[; ;pic16lf1509.h: 10684: extern volatile __bit LC4G2D1T @ (((unsigned) &CLC4GLS1)*8) + 1;
[; ;pic16lf1509.h: 10686: extern volatile __bit LC4G2D2N @ (((unsigned) &CLC4GLS1)*8) + 2;
[; ;pic16lf1509.h: 10688: extern volatile __bit LC4G2D2T @ (((unsigned) &CLC4GLS1)*8) + 3;
[; ;pic16lf1509.h: 10690: extern volatile __bit LC4G2D3N @ (((unsigned) &CLC4GLS1)*8) + 4;
[; ;pic16lf1509.h: 10692: extern volatile __bit LC4G2D3T @ (((unsigned) &CLC4GLS1)*8) + 5;
[; ;pic16lf1509.h: 10694: extern volatile __bit LC4G2D4N @ (((unsigned) &CLC4GLS1)*8) + 6;
[; ;pic16lf1509.h: 10696: extern volatile __bit LC4G2D4T @ (((unsigned) &CLC4GLS1)*8) + 7;
[; ;pic16lf1509.h: 10698: extern volatile __bit LC4G2POL @ (((unsigned) &CLC4POL)*8) + 1;
[; ;pic16lf1509.h: 10700: extern volatile __bit LC4G3D1N @ (((unsigned) &CLC4GLS2)*8) + 0;
[; ;pic16lf1509.h: 10702: extern volatile __bit LC4G3D1T @ (((unsigned) &CLC4GLS2)*8) + 1;
[; ;pic16lf1509.h: 10704: extern volatile __bit LC4G3D2N @ (((unsigned) &CLC4GLS2)*8) + 2;
[; ;pic16lf1509.h: 10706: extern volatile __bit LC4G3D2T @ (((unsigned) &CLC4GLS2)*8) + 3;
[; ;pic16lf1509.h: 10708: extern volatile __bit LC4G3D3N @ (((unsigned) &CLC4GLS2)*8) + 4;
[; ;pic16lf1509.h: 10710: extern volatile __bit LC4G3D3T @ (((unsigned) &CLC4GLS2)*8) + 5;
[; ;pic16lf1509.h: 10712: extern volatile __bit LC4G3D4N @ (((unsigned) &CLC4GLS2)*8) + 6;
[; ;pic16lf1509.h: 10714: extern volatile __bit LC4G3D4T @ (((unsigned) &CLC4GLS2)*8) + 7;
[; ;pic16lf1509.h: 10716: extern volatile __bit LC4G3POL @ (((unsigned) &CLC4POL)*8) + 2;
[; ;pic16lf1509.h: 10718: extern volatile __bit LC4G4D1N @ (((unsigned) &CLC4GLS3)*8) + 0;
[; ;pic16lf1509.h: 10720: extern volatile __bit LC4G4D1T @ (((unsigned) &CLC4GLS3)*8) + 1;
[; ;pic16lf1509.h: 10722: extern volatile __bit LC4G4D2N @ (((unsigned) &CLC4GLS3)*8) + 2;
[; ;pic16lf1509.h: 10724: extern volatile __bit LC4G4D2T @ (((unsigned) &CLC4GLS3)*8) + 3;
[; ;pic16lf1509.h: 10726: extern volatile __bit LC4G4D3N @ (((unsigned) &CLC4GLS3)*8) + 4;
[; ;pic16lf1509.h: 10728: extern volatile __bit LC4G4D3T @ (((unsigned) &CLC4GLS3)*8) + 5;
[; ;pic16lf1509.h: 10730: extern volatile __bit LC4G4D4N @ (((unsigned) &CLC4GLS3)*8) + 6;
[; ;pic16lf1509.h: 10732: extern volatile __bit LC4G4D4T @ (((unsigned) &CLC4GLS3)*8) + 7;
[; ;pic16lf1509.h: 10734: extern volatile __bit LC4G4POL @ (((unsigned) &CLC4POL)*8) + 3;
[; ;pic16lf1509.h: 10736: extern volatile __bit LC4INTN @ (((unsigned) &CLC4CON)*8) + 3;
[; ;pic16lf1509.h: 10738: extern volatile __bit LC4INTP @ (((unsigned) &CLC4CON)*8) + 4;
[; ;pic16lf1509.h: 10740: extern volatile __bit LC4MODE0 @ (((unsigned) &CLC4CON)*8) + 0;
[; ;pic16lf1509.h: 10742: extern volatile __bit LC4MODE1 @ (((unsigned) &CLC4CON)*8) + 1;
[; ;pic16lf1509.h: 10744: extern volatile __bit LC4MODE2 @ (((unsigned) &CLC4CON)*8) + 2;
[; ;pic16lf1509.h: 10746: extern volatile __bit LC4OE @ (((unsigned) &CLC4CON)*8) + 6;
[; ;pic16lf1509.h: 10748: extern volatile __bit LC4OUT @ (((unsigned) &CLC4CON)*8) + 5;
[; ;pic16lf1509.h: 10750: extern volatile __bit LC4POL @ (((unsigned) &CLC4POL)*8) + 7;
[; ;pic16lf1509.h: 10752: extern volatile __bit LFIOFR @ (((unsigned) &OSCSTAT)*8) + 1;
[; ;pic16lf1509.h: 10754: extern volatile __bit LWLO @ (((unsigned) &PMCON1)*8) + 5;
[; ;pic16lf1509.h: 10756: extern volatile __bit MC1OUT @ (((unsigned) &CMOUT)*8) + 0;
[; ;pic16lf1509.h: 10758: extern volatile __bit MC2OUT @ (((unsigned) &CMOUT)*8) + 1;
[; ;pic16lf1509.h: 10760: extern volatile __bit MCLC1OUT @ (((unsigned) &CLCDATA)*8) + 0;
[; ;pic16lf1509.h: 10762: extern volatile __bit MCLC2OUT @ (((unsigned) &CLCDATA)*8) + 1;
[; ;pic16lf1509.h: 10764: extern volatile __bit MCLC3OUT @ (((unsigned) &CLCDATA)*8) + 2;
[; ;pic16lf1509.h: 10766: extern volatile __bit MCLC4OUT @ (((unsigned) &CLCDATA)*8) + 3;
[; ;pic16lf1509.h: 10768: extern volatile __bit N1CKS0 @ (((unsigned) &NCO1CLK)*8) + 0;
[; ;pic16lf1509.h: 10770: extern volatile __bit N1CKS1 @ (((unsigned) &NCO1CLK)*8) + 1;
[; ;pic16lf1509.h: 10772: extern volatile __bit N1EN @ (((unsigned) &NCO1CON)*8) + 7;
[; ;pic16lf1509.h: 10774: extern volatile __bit N1OE @ (((unsigned) &NCO1CON)*8) + 6;
[; ;pic16lf1509.h: 10776: extern volatile __bit N1OUT @ (((unsigned) &NCO1CON)*8) + 5;
[; ;pic16lf1509.h: 10778: extern volatile __bit N1PFM @ (((unsigned) &NCO1CON)*8) + 0;
[; ;pic16lf1509.h: 10780: extern volatile __bit N1POL @ (((unsigned) &NCO1CON)*8) + 4;
[; ;pic16lf1509.h: 10782: extern volatile __bit N1PWS0 @ (((unsigned) &NCO1CLK)*8) + 5;
[; ;pic16lf1509.h: 10784: extern volatile __bit N1PWS1 @ (((unsigned) &NCO1CLK)*8) + 6;
[; ;pic16lf1509.h: 10786: extern volatile __bit N1PWS2 @ (((unsigned) &NCO1CLK)*8) + 7;
[; ;pic16lf1509.h: 10788: extern volatile __bit NCO1ACC0 @ (((unsigned) &NCO1ACCL)*8) + 0;
[; ;pic16lf1509.h: 10790: extern volatile __bit NCO1ACC1 @ (((unsigned) &NCO1ACCL)*8) + 1;
[; ;pic16lf1509.h: 10792: extern volatile __bit NCO1ACC10 @ (((unsigned) &NCO1ACCH)*8) + 2;
[; ;pic16lf1509.h: 10794: extern volatile __bit NCO1ACC11 @ (((unsigned) &NCO1ACCH)*8) + 3;
[; ;pic16lf1509.h: 10796: extern volatile __bit NCO1ACC12 @ (((unsigned) &NCO1ACCH)*8) + 4;
[; ;pic16lf1509.h: 10798: extern volatile __bit NCO1ACC13 @ (((unsigned) &NCO1ACCH)*8) + 5;
[; ;pic16lf1509.h: 10800: extern volatile __bit NCO1ACC14 @ (((unsigned) &NCO1ACCH)*8) + 6;
[; ;pic16lf1509.h: 10802: extern volatile __bit NCO1ACC15 @ (((unsigned) &NCO1ACCH)*8) + 7;
[; ;pic16lf1509.h: 10804: extern volatile __bit NCO1ACC16 @ (((unsigned) &NCO1ACCU)*8) + 0;
[; ;pic16lf1509.h: 10806: extern volatile __bit NCO1ACC17 @ (((unsigned) &NCO1ACCU)*8) + 1;
[; ;pic16lf1509.h: 10808: extern volatile __bit NCO1ACC18 @ (((unsigned) &NCO1ACCU)*8) + 2;
[; ;pic16lf1509.h: 10810: extern volatile __bit NCO1ACC19 @ (((unsigned) &NCO1ACCU)*8) + 3;
[; ;pic16lf1509.h: 10812: extern volatile __bit NCO1ACC2 @ (((unsigned) &NCO1ACCL)*8) + 2;
[; ;pic16lf1509.h: 10814: extern volatile __bit NCO1ACC3 @ (((unsigned) &NCO1ACCL)*8) + 3;
[; ;pic16lf1509.h: 10816: extern volatile __bit NCO1ACC4 @ (((unsigned) &NCO1ACCL)*8) + 4;
[; ;pic16lf1509.h: 10818: extern volatile __bit NCO1ACC5 @ (((unsigned) &NCO1ACCL)*8) + 5;
[; ;pic16lf1509.h: 10820: extern volatile __bit NCO1ACC6 @ (((unsigned) &NCO1ACCL)*8) + 6;
[; ;pic16lf1509.h: 10822: extern volatile __bit NCO1ACC7 @ (((unsigned) &NCO1ACCL)*8) + 7;
[; ;pic16lf1509.h: 10824: extern volatile __bit NCO1ACC8 @ (((unsigned) &NCO1ACCH)*8) + 0;
[; ;pic16lf1509.h: 10826: extern volatile __bit NCO1ACC9 @ (((unsigned) &NCO1ACCH)*8) + 1;
[; ;pic16lf1509.h: 10828: extern volatile __bit NCO1IE @ (((unsigned) &PIE2)*8) + 2;
[; ;pic16lf1509.h: 10830: extern volatile __bit NCO1IF @ (((unsigned) &PIR2)*8) + 2;
[; ;pic16lf1509.h: 10832: extern volatile __bit NCO1INC0 @ (((unsigned) &NCO1INCL)*8) + 0;
[; ;pic16lf1509.h: 10834: extern volatile __bit NCO1INC1 @ (((unsigned) &NCO1INCL)*8) + 1;
[; ;pic16lf1509.h: 10836: extern volatile __bit NCO1INC10 @ (((unsigned) &NCO1INCH)*8) + 2;
[; ;pic16lf1509.h: 10838: extern volatile __bit NCO1INC11 @ (((unsigned) &NCO1INCH)*8) + 3;
[; ;pic16lf1509.h: 10840: extern volatile __bit NCO1INC12 @ (((unsigned) &NCO1INCH)*8) + 4;
[; ;pic16lf1509.h: 10842: extern volatile __bit NCO1INC13 @ (((unsigned) &NCO1INCH)*8) + 5;
[; ;pic16lf1509.h: 10844: extern volatile __bit NCO1INC14 @ (((unsigned) &NCO1INCH)*8) + 6;
[; ;pic16lf1509.h: 10846: extern volatile __bit NCO1INC15 @ (((unsigned) &NCO1INCH)*8) + 7;
[; ;pic16lf1509.h: 10848: extern volatile __bit NCO1INC2 @ (((unsigned) &NCO1INCL)*8) + 2;
[; ;pic16lf1509.h: 10850: extern volatile __bit NCO1INC3 @ (((unsigned) &NCO1INCL)*8) + 3;
[; ;pic16lf1509.h: 10852: extern volatile __bit NCO1INC4 @ (((unsigned) &NCO1INCL)*8) + 4;
[; ;pic16lf1509.h: 10854: extern volatile __bit NCO1INC5 @ (((unsigned) &NCO1INCL)*8) + 5;
[; ;pic16lf1509.h: 10856: extern volatile __bit NCO1INC6 @ (((unsigned) &NCO1INCL)*8) + 6;
[; ;pic16lf1509.h: 10858: extern volatile __bit NCO1INC7 @ (((unsigned) &NCO1INCL)*8) + 7;
[; ;pic16lf1509.h: 10860: extern volatile __bit NCO1INC8 @ (((unsigned) &NCO1INCH)*8) + 0;
[; ;pic16lf1509.h: 10862: extern volatile __bit NCO1INC9 @ (((unsigned) &NCO1INCH)*8) + 1;
[; ;pic16lf1509.h: 10864: extern volatile __bit NCO1SEL @ (((unsigned) &APFCON)*8) + 0;
[; ;pic16lf1509.h: 10866: extern volatile __bit OERR @ (((unsigned) &RCSTA)*8) + 1;
[; ;pic16lf1509.h: 10868: extern volatile __bit OSFIE @ (((unsigned) &PIE2)*8) + 7;
[; ;pic16lf1509.h: 10870: extern volatile __bit OSFIF @ (((unsigned) &PIR2)*8) + 7;
[; ;pic16lf1509.h: 10872: extern volatile __bit OSTS @ (((unsigned) &OSCSTAT)*8) + 5;
[; ;pic16lf1509.h: 10874: extern volatile __bit PCIE @ (((unsigned) &SSP1CON3)*8) + 6;
[; ;pic16lf1509.h: 10876: extern volatile __bit PEIE @ (((unsigned) &INTCON)*8) + 6;
[; ;pic16lf1509.h: 10878: extern volatile __bit PEN @ (((unsigned) &SSP1CON2)*8) + 2;
[; ;pic16lf1509.h: 10880: extern volatile __bit PORT_ICDCLK @ (((unsigned) &ICDIO)*8) + 6;
[; ;pic16lf1509.h: 10882: extern volatile __bit PORT_ICDDAT @ (((unsigned) &ICDIO)*8) + 7;
[; ;pic16lf1509.h: 10884: extern volatile __bit PS0 @ (((unsigned) &OPTION_REG)*8) + 0;
[; ;pic16lf1509.h: 10886: extern volatile __bit PS1 @ (((unsigned) &OPTION_REG)*8) + 1;
[; ;pic16lf1509.h: 10888: extern volatile __bit PS2 @ (((unsigned) &OPTION_REG)*8) + 2;
[; ;pic16lf1509.h: 10890: extern volatile __bit PSA @ (((unsigned) &OPTION_REG)*8) + 3;
[; ;pic16lf1509.h: 10892: extern volatile __bit PWM1DCH0 @ (((unsigned) &PWM1DCH)*8) + 0;
[; ;pic16lf1509.h: 10894: extern volatile __bit PWM1DCH1 @ (((unsigned) &PWM1DCH)*8) + 1;
[; ;pic16lf1509.h: 10896: extern volatile __bit PWM1DCH2 @ (((unsigned) &PWM1DCH)*8) + 2;
[; ;pic16lf1509.h: 10898: extern volatile __bit PWM1DCH3 @ (((unsigned) &PWM1DCH)*8) + 3;
[; ;pic16lf1509.h: 10900: extern volatile __bit PWM1DCH4 @ (((unsigned) &PWM1DCH)*8) + 4;
[; ;pic16lf1509.h: 10902: extern volatile __bit PWM1DCH5 @ (((unsigned) &PWM1DCH)*8) + 5;
[; ;pic16lf1509.h: 10904: extern volatile __bit PWM1DCH6 @ (((unsigned) &PWM1DCH)*8) + 6;
[; ;pic16lf1509.h: 10906: extern volatile __bit PWM1DCH7 @ (((unsigned) &PWM1DCH)*8) + 7;
[; ;pic16lf1509.h: 10908: extern volatile __bit PWM1DCL0 @ (((unsigned) &PWM1DCL)*8) + 6;
[; ;pic16lf1509.h: 10910: extern volatile __bit PWM1DCL1 @ (((unsigned) &PWM1DCL)*8) + 7;
[; ;pic16lf1509.h: 10912: extern volatile __bit PWM1EN @ (((unsigned) &PWM1CON)*8) + 7;
[; ;pic16lf1509.h: 10914: extern volatile __bit PWM1OE @ (((unsigned) &PWM1CON)*8) + 6;
[; ;pic16lf1509.h: 10916: extern volatile __bit PWM1OUT @ (((unsigned) &PWM1CON)*8) + 5;
[; ;pic16lf1509.h: 10918: extern volatile __bit PWM1POL @ (((unsigned) &PWM1CON)*8) + 4;
[; ;pic16lf1509.h: 10920: extern volatile __bit PWM2DCH0 @ (((unsigned) &PWM2DCH)*8) + 0;
[; ;pic16lf1509.h: 10922: extern volatile __bit PWM2DCH1 @ (((unsigned) &PWM2DCH)*8) + 1;
[; ;pic16lf1509.h: 10924: extern volatile __bit PWM2DCH2 @ (((unsigned) &PWM2DCH)*8) + 2;
[; ;pic16lf1509.h: 10926: extern volatile __bit PWM2DCH3 @ (((unsigned) &PWM2DCH)*8) + 3;
[; ;pic16lf1509.h: 10928: extern volatile __bit PWM2DCH4 @ (((unsigned) &PWM2DCH)*8) + 4;
[; ;pic16lf1509.h: 10930: extern volatile __bit PWM2DCH5 @ (((unsigned) &PWM2DCH)*8) + 5;
[; ;pic16lf1509.h: 10932: extern volatile __bit PWM2DCH6 @ (((unsigned) &PWM2DCH)*8) + 6;
[; ;pic16lf1509.h: 10934: extern volatile __bit PWM2DCH7 @ (((unsigned) &PWM2DCH)*8) + 7;
[; ;pic16lf1509.h: 10936: extern volatile __bit PWM2DCL0 @ (((unsigned) &PWM2DCL)*8) + 6;
[; ;pic16lf1509.h: 10938: extern volatile __bit PWM2DCL1 @ (((unsigned) &PWM2DCL)*8) + 7;
[; ;pic16lf1509.h: 10940: extern volatile __bit PWM2EN @ (((unsigned) &PWM2CON)*8) + 7;
[; ;pic16lf1509.h: 10942: extern volatile __bit PWM2OE @ (((unsigned) &PWM2CON)*8) + 6;
[; ;pic16lf1509.h: 10944: extern volatile __bit PWM2OUT @ (((unsigned) &PWM2CON)*8) + 5;
[; ;pic16lf1509.h: 10946: extern volatile __bit PWM2POL @ (((unsigned) &PWM2CON)*8) + 4;
[; ;pic16lf1509.h: 10948: extern volatile __bit PWM3DCH0 @ (((unsigned) &PWM3DCH)*8) + 0;
[; ;pic16lf1509.h: 10950: extern volatile __bit PWM3DCH1 @ (((unsigned) &PWM3DCH)*8) + 1;
[; ;pic16lf1509.h: 10952: extern volatile __bit PWM3DCH2 @ (((unsigned) &PWM3DCH)*8) + 2;
[; ;pic16lf1509.h: 10954: extern volatile __bit PWM3DCH3 @ (((unsigned) &PWM3DCH)*8) + 3;
[; ;pic16lf1509.h: 10956: extern volatile __bit PWM3DCH4 @ (((unsigned) &PWM3DCH)*8) + 4;
[; ;pic16lf1509.h: 10958: extern volatile __bit PWM3DCH5 @ (((unsigned) &PWM3DCH)*8) + 5;
[; ;pic16lf1509.h: 10960: extern volatile __bit PWM3DCH6 @ (((unsigned) &PWM3DCH)*8) + 6;
[; ;pic16lf1509.h: 10962: extern volatile __bit PWM3DCH7 @ (((unsigned) &PWM3DCH)*8) + 7;
[; ;pic16lf1509.h: 10964: extern volatile __bit PWM3DCL0 @ (((unsigned) &PWM3DCL)*8) + 6;
[; ;pic16lf1509.h: 10966: extern volatile __bit PWM3DCL1 @ (((unsigned) &PWM3DCL)*8) + 7;
[; ;pic16lf1509.h: 10968: extern volatile __bit PWM3EN @ (((unsigned) &PWM3CON)*8) + 7;
[; ;pic16lf1509.h: 10970: extern volatile __bit PWM3OE @ (((unsigned) &PWM3CON)*8) + 6;
[; ;pic16lf1509.h: 10972: extern volatile __bit PWM3OUT @ (((unsigned) &PWM3CON)*8) + 5;
[; ;pic16lf1509.h: 10974: extern volatile __bit PWM3POL @ (((unsigned) &PWM3CON)*8) + 4;
[; ;pic16lf1509.h: 10976: extern volatile __bit PWM4DCH0 @ (((unsigned) &PWM4DCH)*8) + 0;
[; ;pic16lf1509.h: 10978: extern volatile __bit PWM4DCH1 @ (((unsigned) &PWM4DCH)*8) + 1;
[; ;pic16lf1509.h: 10980: extern volatile __bit PWM4DCH2 @ (((unsigned) &PWM4DCH)*8) + 2;
[; ;pic16lf1509.h: 10982: extern volatile __bit PWM4DCH3 @ (((unsigned) &PWM4DCH)*8) + 3;
[; ;pic16lf1509.h: 10984: extern volatile __bit PWM4DCH4 @ (((unsigned) &PWM4DCH)*8) + 4;
[; ;pic16lf1509.h: 10986: extern volatile __bit PWM4DCH5 @ (((unsigned) &PWM4DCH)*8) + 5;
[; ;pic16lf1509.h: 10988: extern volatile __bit PWM4DCH6 @ (((unsigned) &PWM4DCH)*8) + 6;
[; ;pic16lf1509.h: 10990: extern volatile __bit PWM4DCH7 @ (((unsigned) &PWM4DCH)*8) + 7;
[; ;pic16lf1509.h: 10992: extern volatile __bit PWM4DCL0 @ (((unsigned) &PWM4DCL)*8) + 6;
[; ;pic16lf1509.h: 10994: extern volatile __bit PWM4DCL1 @ (((unsigned) &PWM4DCL)*8) + 7;
[; ;pic16lf1509.h: 10996: extern volatile __bit PWM4EN @ (((unsigned) &PWM4CON)*8) + 7;
[; ;pic16lf1509.h: 10998: extern volatile __bit PWM4OE @ (((unsigned) &PWM4CON)*8) + 6;
[; ;pic16lf1509.h: 11000: extern volatile __bit PWM4OUT @ (((unsigned) &PWM4CON)*8) + 5;
[; ;pic16lf1509.h: 11002: extern volatile __bit PWM4POL @ (((unsigned) &PWM4CON)*8) + 4;
[; ;pic16lf1509.h: 11004: extern volatile __bit RA0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic16lf1509.h: 11006: extern volatile __bit RA1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic16lf1509.h: 11008: extern volatile __bit RA2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic16lf1509.h: 11010: extern volatile __bit RA3 @ (((unsigned) &PORTA)*8) + 3;
[; ;pic16lf1509.h: 11012: extern volatile __bit RA4 @ (((unsigned) &PORTA)*8) + 4;
[; ;pic16lf1509.h: 11014: extern volatile __bit RA5 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic16lf1509.h: 11016: extern volatile __bit RB4 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic16lf1509.h: 11018: extern volatile __bit RB5 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic16lf1509.h: 11020: extern volatile __bit RB6 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic16lf1509.h: 11022: extern volatile __bit RB7 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic16lf1509.h: 11024: extern volatile __bit RC0 @ (((unsigned) &PORTC)*8) + 0;
[; ;pic16lf1509.h: 11026: extern volatile __bit RC1 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic16lf1509.h: 11028: extern volatile __bit RC2 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic16lf1509.h: 11030: extern volatile __bit RC3 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic16lf1509.h: 11032: extern volatile __bit RC4 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic16lf1509.h: 11034: extern volatile __bit RC5 @ (((unsigned) &PORTC)*8) + 5;
[; ;pic16lf1509.h: 11036: extern volatile __bit RC6 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic16lf1509.h: 11038: extern volatile __bit RC7 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic16lf1509.h: 11040: extern volatile __bit RCEN @ (((unsigned) &SSP1CON2)*8) + 3;
[; ;pic16lf1509.h: 11042: extern volatile __bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;
[; ;pic16lf1509.h: 11044: extern volatile __bit RCIE @ (((unsigned) &PIE1)*8) + 5;
[; ;pic16lf1509.h: 11046: extern volatile __bit RCIF @ (((unsigned) &PIR1)*8) + 5;
[; ;pic16lf1509.h: 11048: extern volatile __bit RD @ (((unsigned) &PMCON1)*8) + 0;
[; ;pic16lf1509.h: 11050: extern volatile __bit RSEN @ (((unsigned) &SSP1CON2)*8) + 1;
[; ;pic16lf1509.h: 11052: extern volatile __bit RSTVEC @ (((unsigned) &ICDCON0)*8) + 0;
[; ;pic16lf1509.h: 11054: extern volatile __bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
[; ;pic16lf1509.h: 11056: extern volatile __bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
[; ;pic16lf1509.h: 11058: extern volatile __bit R_nW @ (((unsigned) &SSP1STAT)*8) + 2;
[; ;pic16lf1509.h: 11060: extern volatile __bit SBCDE @ (((unsigned) &SSP1CON3)*8) + 2;
[; ;pic16lf1509.h: 11062: extern volatile __bit SBOREN @ (((unsigned) &BORCON)*8) + 7;
[; ;pic16lf1509.h: 11064: extern volatile __bit SCIE @ (((unsigned) &SSP1CON3)*8) + 5;
[; ;pic16lf1509.h: 11066: extern volatile __bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;
[; ;pic16lf1509.h: 11068: extern volatile __bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
[; ;pic16lf1509.h: 11070: extern volatile __bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
[; ;pic16lf1509.h: 11072: extern volatile __bit SDAHT @ (((unsigned) &SSP1CON3)*8) + 3;
[; ;pic16lf1509.h: 11074: extern volatile __bit SEN @ (((unsigned) &SSP1CON2)*8) + 0;
[; ;pic16lf1509.h: 11076: extern volatile __bit SENDB @ (((unsigned) &TXSTA)*8) + 3;
[; ;pic16lf1509.h: 11078: extern volatile __bit SMP @ (((unsigned) &SSP1STAT)*8) + 7;
[; ;pic16lf1509.h: 11080: extern volatile __bit SOSCR @ (((unsigned) &OSCSTAT)*8) + 7;
[; ;pic16lf1509.h: 11082: extern volatile __bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
[; ;pic16lf1509.h: 11084: extern volatile __bit SREN @ (((unsigned) &RCSTA)*8) + 5;
[; ;pic16lf1509.h: 11086: extern volatile __bit SSP1IE @ (((unsigned) &PIE1)*8) + 3;
[; ;pic16lf1509.h: 11088: extern volatile __bit SSP1IF @ (((unsigned) &PIR1)*8) + 3;
[; ;pic16lf1509.h: 11090: extern volatile __bit SSPEN @ (((unsigned) &SSP1CON1)*8) + 5;
[; ;pic16lf1509.h: 11092: extern volatile __bit SSPM0 @ (((unsigned) &SSP1CON1)*8) + 0;
[; ;pic16lf1509.h: 11094: extern volatile __bit SSPM1 @ (((unsigned) &SSP1CON1)*8) + 1;
[; ;pic16lf1509.h: 11096: extern volatile __bit SSPM2 @ (((unsigned) &SSP1CON1)*8) + 2;
[; ;pic16lf1509.h: 11098: extern volatile __bit SSPM3 @ (((unsigned) &SSP1CON1)*8) + 3;
[; ;pic16lf1509.h: 11100: extern volatile __bit SSPOV @ (((unsigned) &SSP1CON1)*8) + 6;
[; ;pic16lf1509.h: 11102: extern volatile __bit SSSEL @ (((unsigned) &APFCON)*8) + 4;
[; ;pic16lf1509.h: 11104: extern volatile __bit SSTEP @ (((unsigned) &ICDCON0)*8) + 5;
[; ;pic16lf1509.h: 11106: extern volatile __bit STKOVF @ (((unsigned) &PCON)*8) + 7;
[; ;pic16lf1509.h: 11108: extern volatile __bit STKUNF @ (((unsigned) &PCON)*8) + 6;
[; ;pic16lf1509.h: 11110: extern volatile __bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
[; ;pic16lf1509.h: 11112: extern volatile __bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
[; ;pic16lf1509.h: 11114: extern volatile __bit T0CS @ (((unsigned) &OPTION_REG)*8) + 5;
[; ;pic16lf1509.h: 11116: extern volatile __bit T0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic16lf1509.h: 11118: extern volatile __bit T0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic16lf1509.h: 11120: extern volatile __bit T0SE @ (((unsigned) &OPTION_REG)*8) + 4;
[; ;pic16lf1509.h: 11122: extern volatile __bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
[; ;pic16lf1509.h: 11124: extern volatile __bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
[; ;pic16lf1509.h: 11126: extern volatile __bit T1GGO_nDONE @ (((unsigned) &T1GCON)*8) + 3;
[; ;pic16lf1509.h: 11128: extern volatile __bit T1GPOL @ (((unsigned) &T1GCON)*8) + 6;
[; ;pic16lf1509.h: 11130: extern volatile __bit T1GSEL @ (((unsigned) &APFCON)*8) + 3;
[; ;pic16lf1509.h: 11132: extern volatile __bit T1GSPM @ (((unsigned) &T1GCON)*8) + 4;
[; ;pic16lf1509.h: 11134: extern volatile __bit T1GSS0 @ (((unsigned) &T1GCON)*8) + 0;
[; ;pic16lf1509.h: 11136: extern volatile __bit T1GSS1 @ (((unsigned) &T1GCON)*8) + 1;
[; ;pic16lf1509.h: 11138: extern volatile __bit T1GTM @ (((unsigned) &T1GCON)*8) + 5;
[; ;pic16lf1509.h: 11140: extern volatile __bit T1GVAL @ (((unsigned) &T1GCON)*8) + 2;
[; ;pic16lf1509.h: 11142: extern volatile __bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
[; ;pic16lf1509.h: 11144: extern volatile __bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
[; ;pic16lf1509.h: 11146: extern volatile __bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
[; ;pic16lf1509.h: 11148: extern volatile __bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
[; ;pic16lf1509.h: 11150: extern volatile __bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
[; ;pic16lf1509.h: 11152: extern volatile __bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
[; ;pic16lf1509.h: 11154: extern volatile __bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
[; ;pic16lf1509.h: 11156: extern volatile __bit TMR0CS @ (((unsigned) &OPTION_REG)*8) + 5;
[; ;pic16lf1509.h: 11158: extern volatile __bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic16lf1509.h: 11160: extern volatile __bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic16lf1509.h: 11162: extern volatile __bit TMR0SE @ (((unsigned) &OPTION_REG)*8) + 4;
[; ;pic16lf1509.h: 11164: extern volatile __bit TMR1CS0 @ (((unsigned) &T1CON)*8) + 6;
[; ;pic16lf1509.h: 11166: extern volatile __bit TMR1CS1 @ (((unsigned) &T1CON)*8) + 7;
[; ;pic16lf1509.h: 11168: extern volatile __bit TMR1GE @ (((unsigned) &T1GCON)*8) + 7;
[; ;pic16lf1509.h: 11170: extern volatile __bit TMR1GIE @ (((unsigned) &PIE1)*8) + 7;
[; ;pic16lf1509.h: 11172: extern volatile __bit TMR1GIF @ (((unsigned) &PIR1)*8) + 7;
[; ;pic16lf1509.h: 11174: extern volatile __bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
[; ;pic16lf1509.h: 11176: extern volatile __bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
[; ;pic16lf1509.h: 11178: extern volatile __bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
[; ;pic16lf1509.h: 11180: extern volatile __bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
[; ;pic16lf1509.h: 11182: extern volatile __bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
[; ;pic16lf1509.h: 11184: extern volatile __bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
[; ;pic16lf1509.h: 11186: extern volatile __bit TRIGSEL0 @ (((unsigned) &ADCON2)*8) + 4;
[; ;pic16lf1509.h: 11188: extern volatile __bit TRIGSEL1 @ (((unsigned) &ADCON2)*8) + 5;
[; ;pic16lf1509.h: 11190: extern volatile __bit TRIGSEL2 @ (((unsigned) &ADCON2)*8) + 6;
[; ;pic16lf1509.h: 11192: extern volatile __bit TRIGSEL3 @ (((unsigned) &ADCON2)*8) + 7;
[; ;pic16lf1509.h: 11194: extern volatile __bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
[; ;pic16lf1509.h: 11196: extern volatile __bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
[; ;pic16lf1509.h: 11198: extern volatile __bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
[; ;pic16lf1509.h: 11200: extern volatile __bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
[; ;pic16lf1509.h: 11202: extern volatile __bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
[; ;pic16lf1509.h: 11204: extern volatile __bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
[; ;pic16lf1509.h: 11206: extern volatile __bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;
[; ;pic16lf1509.h: 11208: extern volatile __bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;
[; ;pic16lf1509.h: 11210: extern volatile __bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;
[; ;pic16lf1509.h: 11212: extern volatile __bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;
[; ;pic16lf1509.h: 11214: extern volatile __bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;
[; ;pic16lf1509.h: 11216: extern volatile __bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;
[; ;pic16lf1509.h: 11218: extern volatile __bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;
[; ;pic16lf1509.h: 11220: extern volatile __bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;
[; ;pic16lf1509.h: 11222: extern volatile __bit TRISC4 @ (((unsigned) &TRISC)*8) + 4;
[; ;pic16lf1509.h: 11224: extern volatile __bit TRISC5 @ (((unsigned) &TRISC)*8) + 5;
[; ;pic16lf1509.h: 11226: extern volatile __bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;
[; ;pic16lf1509.h: 11228: extern volatile __bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;
[; ;pic16lf1509.h: 11230: extern volatile __bit TRIS_ICDCLK @ (((unsigned) &ICDIO)*8) + 2;
[; ;pic16lf1509.h: 11232: extern volatile __bit TRIS_ICDDAT @ (((unsigned) &ICDIO)*8) + 3;
[; ;pic16lf1509.h: 11234: extern volatile __bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
[; ;pic16lf1509.h: 11236: extern volatile __bit TRP0HLTF @ (((unsigned) &ICDSTAT)*8) + 6;
[; ;pic16lf1509.h: 11238: extern volatile __bit TRP1HLTF @ (((unsigned) &ICDSTAT)*8) + 7;
[; ;pic16lf1509.h: 11240: extern volatile __bit TSEN @ (((unsigned) &FVRCON)*8) + 5;
[; ;pic16lf1509.h: 11242: extern volatile __bit TSRNG @ (((unsigned) &FVRCON)*8) + 4;
[; ;pic16lf1509.h: 11244: extern volatile __bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
[; ;pic16lf1509.h: 11246: extern volatile __bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
[; ;pic16lf1509.h: 11248: extern volatile __bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
[; ;pic16lf1509.h: 11250: extern volatile __bit TXIE @ (((unsigned) &PIE1)*8) + 4;
[; ;pic16lf1509.h: 11252: extern volatile __bit TXIF @ (((unsigned) &PIR1)*8) + 4;
[; ;pic16lf1509.h: 11254: extern volatile __bit UA @ (((unsigned) &SSP1STAT)*8) + 1;
[; ;pic16lf1509.h: 11256: extern volatile __bit USRHLTF @ (((unsigned) &ICDSTAT)*8) + 1;
[; ;pic16lf1509.h: 11258: extern volatile __bit WCOL @ (((unsigned) &SSP1CON1)*8) + 7;
[; ;pic16lf1509.h: 11260: extern volatile __bit WDTPS0 @ (((unsigned) &WDTCON)*8) + 1;
[; ;pic16lf1509.h: 11262: extern volatile __bit WDTPS1 @ (((unsigned) &WDTCON)*8) + 2;
[; ;pic16lf1509.h: 11264: extern volatile __bit WDTPS2 @ (((unsigned) &WDTCON)*8) + 3;
[; ;pic16lf1509.h: 11266: extern volatile __bit WDTPS3 @ (((unsigned) &WDTCON)*8) + 4;
[; ;pic16lf1509.h: 11268: extern volatile __bit WDTPS4 @ (((unsigned) &WDTCON)*8) + 5;
[; ;pic16lf1509.h: 11270: extern volatile __bit WPUA0 @ (((unsigned) &WPUA)*8) + 0;
[; ;pic16lf1509.h: 11272: extern volatile __bit WPUA1 @ (((unsigned) &WPUA)*8) + 1;
[; ;pic16lf1509.h: 11274: extern volatile __bit WPUA2 @ (((unsigned) &WPUA)*8) + 2;
[; ;pic16lf1509.h: 11276: extern volatile __bit WPUA3 @ (((unsigned) &WPUA)*8) + 3;
[; ;pic16lf1509.h: 11278: extern volatile __bit WPUA4 @ (((unsigned) &WPUA)*8) + 4;
[; ;pic16lf1509.h: 11280: extern volatile __bit WPUA5 @ (((unsigned) &WPUA)*8) + 5;
[; ;pic16lf1509.h: 11282: extern volatile __bit WPUB4 @ (((unsigned) &WPUB)*8) + 4;
[; ;pic16lf1509.h: 11284: extern volatile __bit WPUB5 @ (((unsigned) &WPUB)*8) + 5;
[; ;pic16lf1509.h: 11286: extern volatile __bit WPUB6 @ (((unsigned) &WPUB)*8) + 6;
[; ;pic16lf1509.h: 11288: extern volatile __bit WPUB7 @ (((unsigned) &WPUB)*8) + 7;
[; ;pic16lf1509.h: 11290: extern volatile __bit WR @ (((unsigned) &PMCON1)*8) + 1;
[; ;pic16lf1509.h: 11292: extern volatile __bit WREN @ (((unsigned) &PMCON1)*8) + 2;
[; ;pic16lf1509.h: 11294: extern volatile __bit WRERR @ (((unsigned) &PMCON1)*8) + 3;
[; ;pic16lf1509.h: 11296: extern volatile __bit WUE @ (((unsigned) &BAUDCON)*8) + 1;
[; ;pic16lf1509.h: 11298: extern volatile __bit ZERO @ (((unsigned) &STATUS)*8) + 2;
[; ;pic16lf1509.h: 11300: extern volatile __bit Z_SHAD @ (((unsigned) &STATUS_SHAD)*8) + 2;
[; ;pic16lf1509.h: 11302: extern volatile __bit nBOR @ (((unsigned) &PCON)*8) + 0;
[; ;pic16lf1509.h: 11304: extern volatile __bit nPD @ (((unsigned) &STATUS)*8) + 3;
[; ;pic16lf1509.h: 11306: extern volatile __bit nPOR @ (((unsigned) &PCON)*8) + 1;
[; ;pic16lf1509.h: 11308: extern volatile __bit nRI @ (((unsigned) &PCON)*8) + 2;
[; ;pic16lf1509.h: 11310: extern volatile __bit nRMCLR @ (((unsigned) &PCON)*8) + 3;
[; ;pic16lf1509.h: 11312: extern volatile __bit nRWDT @ (((unsigned) &PCON)*8) + 4;
[; ;pic16lf1509.h: 11314: extern volatile __bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic16lf1509.h: 11316: extern volatile __bit nTO @ (((unsigned) &STATUS)*8) + 4;
[; ;pic16lf1509.h: 11318: extern volatile __bit nWPUEN @ (((unsigned) &OPTION_REG)*8) + 7;
[; ;pic.h: 29: extern void __nop(void);
[; ;pic.h: 78: extern unsigned int flash_read(unsigned short addr);
[; ;pic.h: 153: extern __nonreentrant void _delay(unsigned long);
[; ;pic.h: 155: extern __nonreentrant void _delaywdt(unsigned long);
[; ;pic.h: 158: extern __nonreentrant void _delay3(unsigned char);
[; ;pic.h: 193: extern __bank0 unsigned char __resetbits;
[; ;pic.h: 194: extern __bank0 __bit __powerdown;
[; ;pic.h: 195: extern __bank0 __bit __timeout;
[; ;structs.h: 53: struct results
[; ;structs.h: 54: {
[; ;structs.h: 55: double z_real;
[; ;structs.h: 56: double z_imag;
[; ;structs.h: 57: double y_real;
[; ;structs.h: 58: double y_imag;
[; ;structs.h: 59: double z_mod;
[; ;structs.h: 60: double z_arg;
[; ;structs.h: 61: double y_mod;
[; ;structs.h: 62: double y_arg;
[; ;structs.h: 63: };
[; ;structs.h: 65: struct ui_state
[; ;structs.h: 66: {
[; ;structs.h: 67: uint8_t disp1_arr[6];
[; ;structs.h: 68: uint8_t disp2_arr[6];
[; ;structs.h: 69: char suffix1;
[; ;structs.h: 70: char suffix2;
[; ;structs.h: 71: int8_t disp_format;
[; ;structs.h: 72: uint32_t leds;
[; ;structs.h: 73: uint8_t keys;
[; ;structs.h: 74: };
[; ;structs.h: 76: struct config
[; ;structs.h: 77: {
[; ;structs.h: 78: uint8_t fq_sel;
[; ;structs.h: 79: uint8_t amp_sel;
[; ;structs.h: 80: uint8_t do_the_cal;
[; ;structs.h: 81: uint8_t comp_open;
[; ;structs.h: 82: uint8_t comp_short;
[; ;structs.h: 83: uint8_t turn_off;
[; ;structs.h: 84: };
[; ;structs.h: 86: struct hys_buf_struct
[; ;structs.h: 87: {
[; ;structs.h: 88: uint8_t hys;
[; ;structs.h: 89: uint8_t ext_last;
[; ;structs.h: 90: };
[; ;hardware.c: 6: extern struct ui_state ui_state;
[; ;hardware.c: 7: extern uint8_t g_shift;
[v $root$_tc_int `(v ~T0 @X0 0 e ]
[v F4129 `(v ~T0 @X0 1 tf ]
"10 hardware.c
[v _tc_int `IF4129 ~T0 @X0 1 e ]
"11
{
[; ;hardware.c: 10: void interrupt tc_int (void)
[; ;hardware.c: 11: {
[e :U _tc_int ]
[f ]
"12
[v _disp_register `ul ~T0 @X0 1 a ]
"13
[v _i_shift `c ~T0 @X0 1 a ]
"14
[v F4132 `uc ~T0 @X0 1 s multiplex_sel ]
[i F4132
-> -> 0 `i `uc
]
"15
[v _keys_tmp `uc ~T0 @X0 1 a ]
"16
[v F4134 `uc ~T0 @X0 1 s keys_tmp_bck ]
"17
[v F4135 `uc ~T0 @X0 1 s debounce ]
[i F4135
-> -> 0 `i `uc
]
[; ;hardware.c: 12: uint32_t disp_register;
[; ;hardware.c: 13: int8_t i_shift;
[; ;hardware.c: 14: static uint8_t multiplex_sel = 0;
[; ;hardware.c: 15: uint8_t keys_tmp;
[; ;hardware.c: 16: static uint8_t keys_tmp_bck;
[; ;hardware.c: 17: static uint8_t debounce = 0;
[; ;hardware.c: 20: disp_register = 0xFFFFFF;
"20
[e = _disp_register -> -> 16777215 `l `ul ]
[; ;hardware.c: 21: if(multiplex_sel == 0)
"21
[e $ ! == -> F4132 `i -> 0 `i 446  ]
[; ;hardware.c: 22: disp_register = ~((((uint32_t)0x1 << 16) & 0xFF0000) | ((~(uint32_t)ui_state.disp1_arr[0] << 8) & 0x00FF00) | (~(uint32_t)ui_state.disp1_arr[1] & 0x0000FF));
"22
[e = _disp_register ~ | | & << -> -> 1 `i `ul -> 16 `i -> -> 16711680 `l `ul & << ~ -> *U + &U . _ui_state 0 * -> -> -> 0 `i `ui `ux -> -> # *U &U . _ui_state 0 `ui `ux `ul -> 8 `i -> -> 65280 `ui `ul & ~ -> *U + &U . _ui_state 0 * -> -> -> 1 `i `ui `ux -> -> # *U &U . _ui_state 0 `ui `ux `ul -> -> -> 255 `i `l `ul ]
[e :U 446 ]
[; ;hardware.c: 23: if(multiplex_sel == 1)
"23
[e $ ! == -> F4132 `i -> 1 `i 447  ]
[; ;hardware.c: 24: disp_register = ~((((uint32_t)0x1 << 17) & 0xFF0000) | ((~(uint32_t)ui_state.disp1_arr[2] << 8) & 0x00FF00) | (~(uint32_t)ui_state.disp1_arr[3] & 0x0000FF));
"24
[e = _disp_register ~ | | & << -> -> 1 `i `ul -> 17 `i -> -> 16711680 `l `ul & << ~ -> *U + &U . _ui_state 0 * -> -> -> 2 `i `ui `ux -> -> # *U &U . _ui_state 0 `ui `ux `ul -> 8 `i -> -> 65280 `ui `ul & ~ -> *U + &U . _ui_state 0 * -> -> -> 3 `i `ui `ux -> -> # *U &U . _ui_state 0 `ui `ux `ul -> -> -> 255 `i `l `ul ]
[e :U 447 ]
[; ;hardware.c: 25: if(multiplex_sel == 2)
"25
[e $ ! == -> F4132 `i -> 2 `i 448  ]
[; ;hardware.c: 26: disp_register = ~((((uint32_t)0x1 << 18) & 0xFF0000) | ((~(uint32_t)ui_state.disp1_arr[4] << 8) & 0x00FF00) | (~(uint32_t)ui_state.disp1_arr[5] & 0x0000FF));
"26
[e = _disp_register ~ | | & << -> -> 1 `i `ul -> 18 `i -> -> 16711680 `l `ul & << ~ -> *U + &U . _ui_state 0 * -> -> -> 4 `i `ui `ux -> -> # *U &U . _ui_state 0 `ui `ux `ul -> 8 `i -> -> 65280 `ui `ul & ~ -> *U + &U . _ui_state 0 * -> -> -> 5 `i `ui `ux -> -> # *U &U . _ui_state 0 `ui `ux `ul -> -> -> 255 `i `l `ul ]
[e :U 448 ]
[; ;hardware.c: 27: if(multiplex_sel == 3)
"27
[e $ ! == -> F4132 `i -> 3 `i 449  ]
[; ;hardware.c: 28: disp_register = ~((((uint32_t)0x1 << 19) & 0xFF0000) | (~ui_state.leds & 0x00FFFF));
"28
[e = _disp_register ~ | & << -> -> 1 `i `ul -> 19 `i -> -> 16711680 `l `ul & ~ . _ui_state 5 -> -> 65535 `ui `ul ]
[e :U 449 ]
[; ;hardware.c: 29: if(multiplex_sel == 4)
"29
[e $ ! == -> F4132 `i -> 4 `i 450  ]
[; ;hardware.c: 30: disp_register = ~((((uint32_t)0x1 << 20) & 0xFF0000) | ((~(uint32_t)ui_state.disp2_arr[0] << 8) & 0x00FF00) | (~(uint32_t)ui_state.disp2_arr[1] & 0x0000FF));
"30
[e = _disp_register ~ | | & << -> -> 1 `i `ul -> 20 `i -> -> 16711680 `l `ul & << ~ -> *U + &U . _ui_state 1 * -> -> -> 0 `i `ui `ux -> -> # *U &U . _ui_state 1 `ui `ux `ul -> 8 `i -> -> 65280 `ui `ul & ~ -> *U + &U . _ui_state 1 * -> -> -> 1 `i `ui `ux -> -> # *U &U . _ui_state 1 `ui `ux `ul -> -> -> 255 `i `l `ul ]
[e :U 450 ]
[; ;hardware.c: 31: if(multiplex_sel == 5)
"31
[e $ ! == -> F4132 `i -> 5 `i 451  ]
[; ;hardware.c: 32: disp_register = ~((((uint32_t)0x1 << 21) & 0xFF0000) | ((~(uint32_t)ui_state.disp2_arr[2] << 8) & 0x00FF00) | (~(uint32_t)ui_state.disp2_arr[3] & 0x0000FF));
"32
[e = _disp_register ~ | | & << -> -> 1 `i `ul -> 21 `i -> -> 16711680 `l `ul & << ~ -> *U + &U . _ui_state 1 * -> -> -> 2 `i `ui `ux -> -> # *U &U . _ui_state 1 `ui `ux `ul -> 8 `i -> -> 65280 `ui `ul & ~ -> *U + &U . _ui_state 1 * -> -> -> 3 `i `ui `ux -> -> # *U &U . _ui_state 1 `ui `ux `ul -> -> -> 255 `i `l `ul ]
[e :U 451 ]
[; ;hardware.c: 33: if(multiplex_sel == 6)
"33
[e $ ! == -> F4132 `i -> 6 `i 452  ]
[; ;hardware.c: 34: disp_register = ~((((uint32_t)0x1 << 22) & 0xFF0000) | ((~(uint32_t)ui_state.disp2_arr[4] << 8) & 0x00FF00) | (~(uint32_t)ui_state.disp2_arr[5] & 0x0000FF));
"34
[e = _disp_register ~ | | & << -> -> 1 `i `ul -> 22 `i -> -> 16711680 `l `ul & << ~ -> *U + &U . _ui_state 1 * -> -> -> 4 `i `ui `ux -> -> # *U &U . _ui_state 1 `ui `ux `ul -> 8 `i -> -> 65280 `ui `ul & ~ -> *U + &U . _ui_state 1 * -> -> -> 5 `i `ui `ux -> -> # *U &U . _ui_state 1 `ui `ux `ul -> -> -> 255 `i `l `ul ]
[e :U 452 ]
[; ;hardware.c: 35: if(multiplex_sel == 7)
"35
[e $ ! == -> F4132 `i -> 7 `i 453  ]
[; ;hardware.c: 36: disp_register = ~((((uint32_t)0x1 << 23) & 0xFF0000) | ((~ui_state.leds >> 16) & 0x00FFFF));
"36
[e = _disp_register ~ | & << -> -> 1 `i `ul -> 23 `i -> -> 16711680 `l `ul & >> ~ . _ui_state 5 -> 16 `i -> -> 65535 `ui `ul ]
[e :U 453 ]
[; ;hardware.c: 39: for(i_shift = 23; i_shift >= 0; --i_shift)
"39
{
[e = _i_shift -> -> 23 `i `c ]
[e $ >= -> _i_shift `i -> 0 `i 454  ]
[e $U 455  ]
"40
[e :U 454 ]
[; ;hardware.c: 40: {
{
[; ;hardware.c: 41: LATAbits.LATA4 = (disp_register >> i_shift) & 0x1;
"41
[e = . . _LATAbits 0 4 -> & >> _disp_register _i_shift -> -> -> 1 `i `l `ul `uc ]
[; ;hardware.c: 42: LATAbits.LATA5 = 0x0;
"42
[e = . . _LATAbits 0 5 -> -> 0 `i `uc ]
[; ;hardware.c: 43: LATAbits.LATA5 = 0x1;
"43
[e = . . _LATAbits 0 5 -> -> 1 `i `uc ]
"44
}
"39
[e =- _i_shift -> -> 1 `i `c ]
[e $ >= -> _i_shift `i -> 0 `i 454  ]
[e :U 455 ]
"44
}
[; ;hardware.c: 44: }
[; ;hardware.c: 45: LATCbits.LATC0 = 0x1;
"45
[e = . . _LATCbits 0 0 -> -> 1 `i `uc ]
[; ;hardware.c: 46: LATCbits.LATC0 = 0x0;
"46
[e = . . _LATCbits 0 0 -> -> 0 `i `uc ]
[; ;hardware.c: 49: keys_tmp_bck = keys_tmp;
"49
[e = F4134 _keys_tmp ]
[; ;hardware.c: 50: keys_tmp = 0x00;
"50
[e = _keys_tmp -> -> 0 `i `uc ]
[; ;hardware.c: 52: LATCbits.LATC2 = 0x0;
"52
[e = . . _LATCbits 0 2 -> -> 0 `i `uc ]
[; ;hardware.c: 53: if(PORTCbits.RC6 == 0x0)
"53
[e $ ! == -> . . _PORTCbits 0 6 `i -> 0 `i 457  ]
[; ;hardware.c: 54: keys_tmp |= 0x01;
"54
[e =| _keys_tmp -> -> 1 `i `uc ]
[e $U 458  ]
"55
[e :U 457 ]
[; ;hardware.c: 55: else if(PORTCbits.RC7 == 0x0)
[e $ ! == -> . . _PORTCbits 0 7 `i -> 0 `i 459  ]
[; ;hardware.c: 56: keys_tmp |= 0x02;
"56
[e =| _keys_tmp -> -> 2 `i `uc ]
[e :U 459 ]
"57
[e :U 458 ]
[; ;hardware.c: 57: LATCbits.LATC2 = 0x1;
[e = . . _LATCbits 0 2 -> -> 1 `i `uc ]
[; ;hardware.c: 59: LATCbits.LATC3 = 0x0;
"59
[e = . . _LATCbits 0 3 -> -> 0 `i `uc ]
[; ;hardware.c: 60: if(PORTCbits.RC6 == 0x0)
"60
[e $ ! == -> . . _PORTCbits 0 6 `i -> 0 `i 460  ]
[; ;hardware.c: 61: keys_tmp |= 0x04;
"61
[e =| _keys_tmp -> -> 4 `i `uc ]
[e $U 461  ]
"62
[e :U 460 ]
[; ;hardware.c: 62: else if(PORTCbits.RC7 == 0x0)
[e $ ! == -> . . _PORTCbits 0 7 `i -> 0 `i 462  ]
[; ;hardware.c: 63: keys_tmp |= 0x08;
"63
[e =| _keys_tmp -> -> 8 `i `uc ]
[e :U 462 ]
"64
[e :U 461 ]
[; ;hardware.c: 64: LATCbits.LATC3 = 0x1;
[e = . . _LATCbits 0 3 -> -> 1 `i `uc ]
[; ;hardware.c: 66: LATCbits.LATC4 = 0x0;
"66
[e = . . _LATCbits 0 4 -> -> 0 `i `uc ]
[; ;hardware.c: 67: if(PORTCbits.RC6 == 0x0)
"67
[e $ ! == -> . . _PORTCbits 0 6 `i -> 0 `i 463  ]
[; ;hardware.c: 68: keys_tmp |= 0x10;
"68
[e =| _keys_tmp -> -> 16 `i `uc ]
[e $U 464  ]
"69
[e :U 463 ]
[; ;hardware.c: 69: else if(PORTCbits.RC7 == 0x0)
[e $ ! == -> . . _PORTCbits 0 7 `i -> 0 `i 465  ]
[; ;hardware.c: 70: keys_tmp |= 0x20;
"70
[e =| _keys_tmp -> -> 32 `i `uc ]
[e :U 465 ]
"71
[e :U 464 ]
[; ;hardware.c: 71: LATCbits.LATC4 = 0x1;
[e = . . _LATCbits 0 4 -> -> 1 `i `uc ]
[; ;hardware.c: 73: LATCbits.LATC5 = 0x0;
"73
[e = . . _LATCbits 0 5 -> -> 0 `i `uc ]
[; ;hardware.c: 74: if(PORTCbits.RC6 == 0x0)
"74
[e $ ! == -> . . _PORTCbits 0 6 `i -> 0 `i 466  ]
[; ;hardware.c: 75: keys_tmp |= 0x40;
"75
[e =| _keys_tmp -> -> 64 `i `uc ]
[e $U 467  ]
"76
[e :U 466 ]
[; ;hardware.c: 76: else if(PORTCbits.RC7 == 0x0)
[e $ ! == -> . . _PORTCbits 0 7 `i -> 0 `i 468  ]
[; ;hardware.c: 77: keys_tmp |= 0x80;
"77
[e =| _keys_tmp -> -> 128 `i `uc ]
[e :U 468 ]
"78
[e :U 467 ]
[; ;hardware.c: 78: LATCbits.LATC5 = 0x1;
[e = . . _LATCbits 0 5 -> -> 1 `i `uc ]
[; ;hardware.c: 81: if(keys_tmp == keys_tmp_bck)
"81
[e $ ! == -> _keys_tmp `i -> F4134 `i 469  ]
[; ;hardware.c: 82: ++debounce;
"82
[e =+ F4135 -> -> 1 `i `uc ]
[e :U 469 ]
[; ;hardware.c: 83: if(debounce > 3)
"83
[e $ ! > -> F4135 `i -> 3 `i 470  ]
[; ;hardware.c: 84: {
"84
{
[; ;hardware.c: 85: debounce = 0;
"85
[e = F4135 -> -> 0 `i `uc ]
[; ;hardware.c: 86: ui_state.keys = keys_tmp;
"86
[e = . _ui_state 6 _keys_tmp ]
"87
}
[e :U 470 ]
[; ;hardware.c: 87: }
[; ;hardware.c: 90: ++multiplex_sel;
"90
[e =+ F4132 -> -> 1 `i `uc ]
[; ;hardware.c: 91: if(multiplex_sel >= 8)
"91
[e $ ! >= -> F4132 `i -> 8 `i 471  ]
[; ;hardware.c: 92: multiplex_sel = 0;
"92
[e = F4132 -> -> 0 `i `uc ]
[e :U 471 ]
[; ;hardware.c: 94: INTCONbits.TMR0IF = 0x0;
"94
[e = . . _INTCONbits 0 2 -> -> 0 `i `uc ]
[; ;hardware.c: 95: }
"95
[e :UE 445 ]
}
"98
[v _init `(v ~T0 @X0 1 ef1`*S1 ]
"99
{
[; ;hardware.c: 98: void init(struct config *config)
[; ;hardware.c: 99: {
[e :U _init ]
"98
[v _config `*S1 ~T0 @X0 1 r1 ]
"99
[f ]
[; ;hardware.c: 100: OSCCONbits.IRCF = 0xF;
"100
[e = . . _OSCCONbits 0 2 -> -> 15 `i `uc ]
[; ;hardware.c: 101: OSCCONbits.SCS = 0x02;
"101
[e = . . _OSCCONbits 0 0 -> -> 2 `i `uc ]
[; ;hardware.c: 103: ANSELA = 0x00;
"103
[e = _ANSELA -> -> 0 `i `uc ]
[; ;hardware.c: 104: ANSELB = 0x00;
"104
[e = _ANSELB -> -> 0 `i `uc ]
[; ;hardware.c: 105: ANSELC = 0x00;
"105
[e = _ANSELC -> -> 0 `i `uc ]
[; ;hardware.c: 107: TRISCbits.TRISC2 = 0x0;
"107
[e = . . _TRISCbits 0 2 -> -> 0 `i `uc ]
[; ;hardware.c: 108: TRISCbits.TRISC3 = 0x0;
"108
[e = . . _TRISCbits 0 3 -> -> 0 `i `uc ]
[; ;hardware.c: 109: TRISCbits.TRISC4 = 0x0;
"109
[e = . . _TRISCbits 0 4 -> -> 0 `i `uc ]
[; ;hardware.c: 110: TRISCbits.TRISC5 = 0x0;
"110
[e = . . _TRISCbits 0 5 -> -> 0 `i `uc ]
[; ;hardware.c: 111: TRISCbits.TRISC6 = 0x1;
"111
[e = . . _TRISCbits 0 6 -> -> 1 `i `uc ]
[; ;hardware.c: 112: TRISCbits.TRISC7 = 0x1;
"112
[e = . . _TRISCbits 0 7 -> -> 1 `i `uc ]
[; ;hardware.c: 113: TRISCbits.TRISC0 = 0x0;
"113
[e = . . _TRISCbits 0 0 -> -> 0 `i `uc ]
[; ;hardware.c: 114: TRISCbits.TRISC1 = 0x0;
"114
[e = . . _TRISCbits 0 1 -> -> 0 `i `uc ]
[; ;hardware.c: 115: TRISAbits.TRISA4 = 0x0;
"115
[e = . . _TRISAbits 0 4 -> -> 0 `i `uc ]
[; ;hardware.c: 116: TRISAbits.TRISA5 = 0x0;
"116
[e = . . _TRISAbits 0 5 -> -> 0 `i `uc ]
[; ;hardware.c: 117: LATCbits.LATC1 = 0x0;
"117
[e = . . _LATCbits 0 1 -> -> 0 `i `uc ]
[; ;hardware.c: 118: TRISAbits.TRISA2 = 0x0;
"118
[e = . . _TRISAbits 0 2 -> -> 0 `i `uc ]
[; ;hardware.c: 121: TRISBbits.TRISB5 = 0x1;
"121
[e = . . _TRISBbits 0 2 -> -> 1 `i `uc ]
[; ;hardware.c: 122: TRISBbits.TRISB7 = 0x0;
"122
[e = . . _TRISBbits 0 4 -> -> 0 `i `uc ]
[; ;hardware.c: 123: TRISAbits.TRISA2 = 0x0;
"123
[e = . . _TRISAbits 0 2 -> -> 0 `i `uc ]
[; ;hardware.c: 125: TXSTAbits.SYNC = 0x0;
"125
[e = . . _TXSTAbits 0 4 -> -> 0 `i `uc ]
[; ;hardware.c: 126: TXSTAbits.BRGH = 0x1;
"126
[e = . . _TXSTAbits 0 2 -> -> 1 `i `uc ]
[; ;hardware.c: 127: SPBRG = 51;
"127
[e = _SPBRG -> -> 51 `i `us ]
[; ;hardware.c: 128: TXSTAbits.TXEN = 0x1;
"128
[e = . . _TXSTAbits 0 5 -> -> 1 `i `uc ]
[; ;hardware.c: 130: RCSTAbits.SPEN = 0x1;
"130
[e = . . _RCSTAbits 0 7 -> -> 1 `i `uc ]
[; ;hardware.c: 131: RCSTAbits.CREN = 0x1;
"131
[e = . . _RCSTAbits 0 4 -> -> 1 `i `uc ]
[; ;hardware.c: 133: leds_disp_format(ui_state.disp_format);
"133
[e ( _leds_disp_format (1 . _ui_state 4 ]
[; ;hardware.c: 134: leds_fq_sel(config->fq_sel);
"134
[e ( _leds_fq_sel (1 . *U _config 0 ]
[; ;hardware.c: 135: leds_amp_sel(config->amp_sel);
"135
[e ( _leds_amp_sel (1 . *U _config 1 ]
[; ;hardware.c: 137: OPTION_REGbits.TMR0CS = 0x0;
"137
[e = . . _OPTION_REGbits 0 3 -> -> 0 `i `uc ]
[; ;hardware.c: 138: OPTION_REGbits.PSA = 0x0;
"138
[e = . . _OPTION_REGbits 0 1 -> -> 0 `i `uc ]
[; ;hardware.c: 139: OPTION_REGbits.PS = 0x0;
"139
[e = . . _OPTION_REGbits 0 0 -> -> 0 `i `uc ]
[; ;hardware.c: 140: INTCONbits.GIE = 0x1;
"140
[e = . . _INTCONbits 0 7 -> -> 1 `i `uc ]
[; ;hardware.c: 141: INTCONbits.PEIE = 0x1;
"141
[e = . . _INTCONbits 0 6 -> -> 1 `i `uc ]
[; ;hardware.c: 142: INTCONbits.TMR0IE = 0x1;
"142
[e = . . _INTCONbits 0 5 -> -> 1 `i `uc ]
[; ;hardware.c: 144: }
"144
[e :UE 472 ]
}
"147
[v _get_result `(v ~T0 @X0 1 ef1`*S2 ]
"148
{
[; ;hardware.c: 147: void get_result(struct results *results)
[; ;hardware.c: 148: {
[e :U _get_result ]
"147
[v _results `*S2 ~T0 @X0 1 r1 ]
"148
[f ]
[; ;hardware.c: 149: PIR1bits.RCIF = 0x0;
"149
[e = . . _PIR1bits 0 5 -> -> 0 `i `uc ]
[; ;hardware.c: 150: results->z_real = get_res_double();
"150
[e = . *U _results 0 ( _get_res_double ..  ]
[; ;hardware.c: 151: results->z_imag = get_res_double();
"151
[e = . *U _results 1 ( _get_res_double ..  ]
[; ;hardware.c: 152: results->y_real = get_res_double();
"152
[e = . *U _results 2 ( _get_res_double ..  ]
[; ;hardware.c: 153: results->y_imag = get_res_double();
"153
[e = . *U _results 3 ( _get_res_double ..  ]
[; ;hardware.c: 154: results->z_mod = get_res_double();
"154
[e = . *U _results 4 ( _get_res_double ..  ]
[; ;hardware.c: 155: results->z_arg = get_res_double();
"155
[e = . *U _results 5 ( _get_res_double ..  ]
[; ;hardware.c: 156: results->y_mod = get_res_double();
"156
[e = . *U _results 6 ( _get_res_double ..  ]
[; ;hardware.c: 157: results->y_arg = get_res_double();
"157
[e = . *U _results 7 ( _get_res_double ..  ]
[; ;hardware.c: 158: }
"158
[e :UE 473 ]
}
"161
[v _get_res_double `(d ~T0 @X0 1 ef ]
"162
{
[; ;hardware.c: 161: double get_res_double(void)
[; ;hardware.c: 162: {
[e :U _get_res_double ]
[f ]
"163
[v _i_shift `l ~T0 @X0 1 a ]
"164
[v _temp_int32 `l ~T0 @X0 1 a ]
"165
[v F4161 `Cc ~T0 @X0 1 s var_size ]
[i F4161
-> -> 4 `i `c
]
[; ;hardware.c: 163: int32_t i_shift;
[; ;hardware.c: 164: int32_t temp_int32;
[; ;hardware.c: 165: const int8_t var_size = 4;
[; ;hardware.c: 167: for(i_shift = 0, temp_int32 = 0x00000000; i_shift < var_size; ++i_shift)
"167
{
[e ; = _i_shift -> -> 0 `i `l = _temp_int32 -> -> 0 `i `l ]
[e $ < _i_shift -> F4161 `l 475  ]
[e $U 476  ]
"168
[e :U 475 ]
[; ;hardware.c: 168: {
{
[; ;hardware.c: 169: LATAbits.LATA2 = 0x0;
"169
[e = . . _LATAbits 0 2 -> -> 0 `i `uc ]
[; ;hardware.c: 170: while(!PIR1bits.RCIF);
"170
[e $U 478  ]
[e :U 479 ]
[e :U 478 ]
[e $ ! != -> . . _PIR1bits 0 5 `i -> -> -> 0 `i `Vuc `i 479  ]
[e :U 480 ]
[; ;hardware.c: 171: LATAbits.LATA2 = 0x1;
"171
[e = . . _LATAbits 0 2 -> -> 1 `i `uc ]
[; ;hardware.c: 172: temp_int32 |= (int32_t)RCREG << (8 * i_shift);
"172
[e =| _temp_int32 << -> _RCREG `l * -> -> 8 `i `l _i_shift ]
[; ;hardware.c: 173: PIR1bits.RCIF = 0x0;
"173
[e = . . _PIR1bits 0 5 -> -> 0 `i `uc ]
"174
}
"167
[e =+ _i_shift -> -> 1 `i `l ]
[e $ < _i_shift -> F4161 `l 475  ]
[e :U 476 ]
"174
}
[; ;hardware.c: 174: }
[; ;hardware.c: 176: return *((double*)(&temp_int32));
"176
[e ) *U -> &U _temp_int32 `*d ]
[e $UE 474  ]
[; ;hardware.c: 177: }
"177
[e :UE 474 ]
}
"180
[v _send_config `(v ~T0 @X0 1 ef1`*S1 ]
"181
{
[; ;hardware.c: 180: void send_config(struct config *config)
[; ;hardware.c: 181: {
[e :U _send_config ]
"180
[v _config `*S1 ~T0 @X0 1 r1 ]
"181
[f ]
[; ;hardware.c: 182: while(!TXSTAbits.TRMT);
"182
[e $U 482  ]
[e :U 483 ]
[e :U 482 ]
[e $ ! != -> . . _TXSTAbits 0 1 `i -> -> -> 0 `i `Vuc `i 483  ]
[e :U 484 ]
[; ;hardware.c: 183: TXREG = (uint8_t)((config->fq_sel << 0) | (config->amp_sel << 2) | (config->do_the_cal << 4) | (config->comp_open << 5) | (config->comp_short << 6) | (config->turn_off << 7));
"183
[e = _TXREG -> | | | | | << -> . *U _config 0 `i -> 0 `i << -> . *U _config 1 `i -> 2 `i << -> . *U _config 2 `i -> 4 `i << -> . *U _config 3 `i -> 5 `i << -> . *U _config 4 `i -> 6 `i << -> . *U _config 5 `i -> 7 `i `uc ]
[; ;hardware.c: 184: }
"184
[e :UE 481 ]
}
"188
[v _leds_disp_format `(v ~T0 @X0 1 ef1`c ]
"189
{
[; ;hardware.c: 188: void leds_disp_format(int8_t disp_format)
[; ;hardware.c: 189: {
[e :U _leds_disp_format ]
"188
[v _disp_format `c ~T0 @X0 1 r1 ]
"189
[f ]
"190
[v F4167 `Cuc ~T0 @X0 1 s on ]
[i F4167
-> -> 1 `i `uc
]
"191
[v F4168 `Cuc ~T0 @X0 1 s off ]
[i F4168
-> -> 0 `i `uc
]
[; ;hardware.c: 190: static const uint8_t on = 1;
[; ;hardware.c: 191: static const uint8_t off = 0;
[; ;hardware.c: 193: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 21) : (ui_state.leds &= ~((uint32_t)1 << 21));
"193
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 21 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 21 `i ]
[; ;hardware.c: 194: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 19) : (ui_state.leds &= ~((uint32_t)1 << 19));
"194
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 19 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 19 `i ]
[; ;hardware.c: 195: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 5) : (ui_state.leds &= ~((uint32_t)1 << 5));
"195
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 5 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 5 `i ]
[; ;hardware.c: 196: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 3) : (ui_state.leds &= ~((uint32_t)1 << 3));
"196
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 3 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 3 `i ]
[; ;hardware.c: 197: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 22) : (ui_state.leds &= ~((uint32_t)1 << 22));
"197
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 22 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 22 `i ]
[; ;hardware.c: 198: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 23) : (ui_state.leds &= ~((uint32_t)1 << 23));
"198
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 23 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 23 `i ]
[; ;hardware.c: 199: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 6) : (ui_state.leds &= ~((uint32_t)1 << 6));
"199
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 6 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 6 `i ]
[; ;hardware.c: 200: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 7) : (ui_state.leds &= ~((uint32_t)1 << 7));
"200
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 7 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 7 `i ]
[; ;hardware.c: 201: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 20) : (ui_state.leds &= ~((uint32_t)1 << 20));
"201
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 20 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 20 `i ]
[; ;hardware.c: 202: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 18) : (ui_state.leds &= ~((uint32_t)1 << 18));
"202
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 18 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 18 `i ]
[; ;hardware.c: 203: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 4) : (ui_state.leds &= ~((uint32_t)1 << 4));
"203
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 4 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 4 `i ]
[; ;hardware.c: 204: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 2) : (ui_state.leds &= ~((uint32_t)1 << 2));
"204
[e ? == -> F4168 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 2 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 2 `i ]
[; ;hardware.c: 205: switch (disp_format)
"205
[e $U 487  ]
[; ;hardware.c: 206: {
"206
{
[; ;hardware.c: 207: case 0:
"207
[e :U 488 ]
[; ;hardware.c: 208: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 21) : (ui_state.leds &= ~((uint32_t)1 << 21));
"208
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 21 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 21 `i ]
[; ;hardware.c: 209: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 19) : (ui_state.leds &= ~((uint32_t)1 << 19));
"209
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 19 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 19 `i ]
[; ;hardware.c: 210: break;
"210
[e $U 486  ]
[; ;hardware.c: 211: case 1:
"211
[e :U 489 ]
[; ;hardware.c: 212: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 5) : (ui_state.leds &= ~((uint32_t)1 << 5));
"212
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 5 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 5 `i ]
[; ;hardware.c: 213: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 3) : (ui_state.leds &= ~((uint32_t)1 << 3));
"213
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 3 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 3 `i ]
[; ;hardware.c: 214: break;
"214
[e $U 486  ]
[; ;hardware.c: 215: case 2:
"215
[e :U 490 ]
[; ;hardware.c: 216: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 22) : (ui_state.leds &= ~((uint32_t)1 << 22));
"216
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 22 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 22 `i ]
[; ;hardware.c: 217: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 23) : (ui_state.leds &= ~((uint32_t)1 << 23));
"217
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 23 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 23 `i ]
[; ;hardware.c: 218: break;
"218
[e $U 486  ]
[; ;hardware.c: 219: case 3:
"219
[e :U 491 ]
[; ;hardware.c: 220: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 6) : (ui_state.leds &= ~((uint32_t)1 << 6));
"220
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 6 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 6 `i ]
[; ;hardware.c: 221: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 7) : (ui_state.leds &= ~((uint32_t)1 << 7));
"221
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 7 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 7 `i ]
[; ;hardware.c: 222: break;
"222
[e $U 486  ]
[; ;hardware.c: 223: case 4:
"223
[e :U 492 ]
[; ;hardware.c: 224: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 20) : (ui_state.leds &= ~((uint32_t)1 << 20));
"224
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 20 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 20 `i ]
[; ;hardware.c: 225: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 18) : (ui_state.leds &= ~((uint32_t)1 << 18));
"225
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 18 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 18 `i ]
[; ;hardware.c: 226: break;
"226
[e $U 486  ]
[; ;hardware.c: 227: case 5:
"227
[e :U 493 ]
[; ;hardware.c: 228: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 4) : (ui_state.leds &= ~((uint32_t)1 << 4));
"228
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 4 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 4 `i ]
[; ;hardware.c: 229: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 2) : (ui_state.leds &= ~((uint32_t)1 << 2));
"229
[e ? == -> F4167 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 2 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 2 `i ]
[; ;hardware.c: 230: break;
"230
[e $U 486  ]
"231
}
[; ;hardware.c: 231: }
[e $U 486  ]
"205
[e :U 487 ]
[e [\ _disp_format , $ -> -> 0 `i `c 488
 , $ -> -> 1 `i `c 489
 , $ -> -> 2 `i `c 490
 , $ -> -> 3 `i `c 491
 , $ -> -> 4 `i `c 492
 , $ -> -> 5 `i `c 493
 486 ]
"231
[e :U 486 ]
[; ;hardware.c: 232: }
"232
[e :UE 485 ]
}
"234
[v _leds_fq_sel `(v ~T0 @X0 1 ef1`uc ]
"235
{
[; ;hardware.c: 234: void leds_fq_sel(uint8_t fq_sel)
[; ;hardware.c: 235: {
[e :U _leds_fq_sel ]
"234
[v _fq_sel `uc ~T0 @X0 1 r1 ]
"235
[f ]
"236
[v F4218 `Cuc ~T0 @X0 1 s on ]
[i F4218
-> -> 1 `i `uc
]
"237
[v F4219 `Cuc ~T0 @X0 1 s off ]
[i F4219
-> -> 0 `i `uc
]
[; ;hardware.c: 236: static const uint8_t on = 1;
[; ;hardware.c: 237: static const uint8_t off = 0;
[; ;hardware.c: 239: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 0) : (ui_state.leds &= ~((uint32_t)1 << 0));
"239
[e ? == -> F4219 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 0 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 0 `i ]
[; ;hardware.c: 240: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 16) : (ui_state.leds &= ~((uint32_t)1 << 16));
"240
[e ? == -> F4219 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 16 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 16 `i ]
[; ;hardware.c: 241: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 1) : (ui_state.leds &= ~((uint32_t)1 << 1));
"241
[e ? == -> F4219 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 1 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 1 `i ]
[; ;hardware.c: 242: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 17) : (ui_state.leds &= ~((uint32_t)1 << 17));
"242
[e ? == -> F4219 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 17 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 17 `i ]
[; ;hardware.c: 243: switch (fq_sel)
"243
[e $U 496  ]
[; ;hardware.c: 244: {
"244
{
[; ;hardware.c: 245: case 0x0:
"245
[e :U 497 ]
[; ;hardware.c: 246: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 0) : (ui_state.leds &= ~((uint32_t)1 << 0));
"246
[e ? == -> F4218 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 0 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 0 `i ]
[; ;hardware.c: 247: break;
"247
[e $U 495  ]
[; ;hardware.c: 248: case 0x1:
"248
[e :U 498 ]
[; ;hardware.c: 249: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 16) : (ui_state.leds &= ~((uint32_t)1 << 16));
"249
[e ? == -> F4218 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 16 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 16 `i ]
[; ;hardware.c: 250: break;
"250
[e $U 495  ]
[; ;hardware.c: 251: case 0x2:
"251
[e :U 499 ]
[; ;hardware.c: 252: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 1) : (ui_state.leds &= ~((uint32_t)1 << 1));
"252
[e ? == -> F4218 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 1 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 1 `i ]
[; ;hardware.c: 253: break;
"253
[e $U 495  ]
[; ;hardware.c: 254: case 0x3:
"254
[e :U 500 ]
[; ;hardware.c: 255: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 17) : (ui_state.leds &= ~((uint32_t)1 << 17));
"255
[e ? == -> F4218 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 17 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 17 `i ]
[; ;hardware.c: 256: break;
"256
[e $U 495  ]
"257
}
[; ;hardware.c: 257: }
[e $U 495  ]
"243
[e :U 496 ]
[e [\ _fq_sel , $ -> -> 0 `i `uc 497
 , $ -> -> 1 `i `uc 498
 , $ -> -> 2 `i `uc 499
 , $ -> -> 3 `i `uc 500
 495 ]
"257
[e :U 495 ]
[; ;hardware.c: 258: }
"258
[e :UE 494 ]
}
"260
[v _leds_amp_sel `(v ~T0 @X0 1 ef1`uc ]
"261
{
[; ;hardware.c: 260: void leds_amp_sel(uint8_t amp_sel)
[; ;hardware.c: 261: {
[e :U _leds_amp_sel ]
"260
[v _amp_sel `uc ~T0 @X0 1 r1 ]
"261
[f ]
"262
[v F4237 `Cuc ~T0 @X0 1 s on ]
[i F4237
-> -> 1 `i `uc
]
"263
[v F4238 `Cuc ~T0 @X0 1 s off ]
[i F4238
-> -> 0 `i `uc
]
[; ;hardware.c: 262: static const uint8_t on = 1;
[; ;hardware.c: 263: static const uint8_t off = 0;
[; ;hardware.c: 265: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 13) : (ui_state.leds &= ~((uint32_t)1 << 13));
"265
[e ? == -> F4238 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 13 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 13 `i ]
[; ;hardware.c: 266: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 29) : (ui_state.leds &= ~((uint32_t)1 << 29));
"266
[e ? == -> F4238 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 29 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 29 `i ]
[; ;hardware.c: 267: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 14) : (ui_state.leds &= ~((uint32_t)1 << 14));
"267
[e ? == -> F4238 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 14 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 14 `i ]
[; ;hardware.c: 268: switch (amp_sel)
"268
[e $U 503  ]
[; ;hardware.c: 269: {
"269
{
[; ;hardware.c: 270: case 0x0:
"270
[e :U 504 ]
[; ;hardware.c: 271: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 13) : (ui_state.leds &= ~((uint32_t)1 << 13));
"271
[e ? == -> F4237 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 13 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 13 `i ]
[; ;hardware.c: 272: break;
"272
[e $U 502  ]
[; ;hardware.c: 273: case 0x1:
"273
[e :U 505 ]
[; ;hardware.c: 274: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 29) : (ui_state.leds &= ~((uint32_t)1 << 29));
"274
[e ? == -> F4237 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 29 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 29 `i ]
[; ;hardware.c: 275: break;
"275
[e $U 502  ]
[; ;hardware.c: 276: case 0x2:
"276
[e :U 506 ]
[; ;hardware.c: 277: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 14) : (ui_state.leds &= ~((uint32_t)1 << 14));
"277
[e ? == -> F4237 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 14 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 14 `i ]
[; ;hardware.c: 278: break;
"278
[e $U 502  ]
"279
}
[; ;hardware.c: 279: }
[e $U 502  ]
"268
[e :U 503 ]
[e [\ _amp_sel , $ -> -> 0 `i `uc 504
 , $ -> -> 1 `i `uc 505
 , $ -> -> 2 `i `uc 506
 502 ]
"279
[e :U 502 ]
[; ;hardware.c: 280: }
"280
[e :UE 501 ]
}
"282
[v _leds_shift `(v ~T0 @X0 1 ef ]
"283
{
[; ;hardware.c: 282: void leds_shift()
[; ;hardware.c: 283: {
[e :U _leds_shift ]
[f ]
"284
[v F4251 `Cuc ~T0 @X0 1 s on ]
[i F4251
-> -> 1 `i `uc
]
"285
[v F4252 `Cuc ~T0 @X0 1 s off ]
[i F4252
-> -> 0 `i `uc
]
[; ;hardware.c: 284: static const uint8_t on = 1;
[; ;hardware.c: 285: static const uint8_t off = 0;
[; ;hardware.c: 287: if(g_shift == 0x1)
"287
[e $ ! == -> _g_shift `i -> 1 `i 508  ]
[; ;hardware.c: 288: (on == 1) ? (ui_state.leds |= (uint32_t)1 << 30) : (ui_state.leds &= ~((uint32_t)1 << 30));
"288
[e ? == -> F4251 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 30 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 30 `i ]
[e $U 509  ]
"289
[e :U 508 ]
[; ;hardware.c: 289: else
[; ;hardware.c: 290: (off == 1) ? (ui_state.leds |= (uint32_t)1 << 30) : (ui_state.leds &= ~((uint32_t)1 << 30));
"290
[e ? == -> F4252 `i -> 1 `i : =| . _ui_state 5 << -> -> 1 `i `ul -> 30 `i =& . _ui_state 5 ~ << -> -> 1 `i `ul -> 30 `i ]
[e :U 509 ]
[; ;hardware.c: 291: }
"291
[e :UE 507 ]
}
