//=========================================================
// src/InitDevice.c: generated by Hardware Configurator
//
// This file will be regenerated when saving a document.
// leave the sections inside the "$[...]" comment tags alone
// or they will be overwritten!
//=========================================================

// USER INCLUDES
#include <SI_EFM8UB2_Register_Enums.h>
#include "InitDevice.h"

// USER PROTOTYPES
// USER FUNCTIONS

// $[Library Includes]
// [Library Includes]$

//==============================================================================
// enter_DefaultMode_from_RESET
//==============================================================================
extern void enter_DefaultMode_from_RESET(void) {
	// $[Config Calls]
	// Save the SFRPAGE
	uint8_t SFRPAGE_save = SFRPAGE;
	PCA_0_enter_DefaultMode_from_RESET();
	PCACH_0_enter_DefaultMode_from_RESET();
	PCACH_1_enter_DefaultMode_from_RESET();
	PCACH_2_enter_DefaultMode_from_RESET();
	PCACH_3_enter_DefaultMode_from_RESET();
	PCACH_4_enter_DefaultMode_from_RESET();
	PORTS_0_enter_DefaultMode_from_RESET();
	PORTS_1_enter_DefaultMode_from_RESET();
	PORTS_2_enter_DefaultMode_from_RESET();
	PORTS_3_enter_DefaultMode_from_RESET();
	PBCFG_0_enter_DefaultMode_from_RESET();
	ADC_0_enter_DefaultMode_from_RESET();
	HFOSC_0_enter_DefaultMode_from_RESET();
	CLOCK_0_enter_DefaultMode_from_RESET();
	TIMER01_0_enter_DefaultMode_from_RESET();
	TIMER16_2_enter_DefaultMode_from_RESET();
	TIMER16_5_enter_DefaultMode_from_RESET();
	TIMER_SETUP_0_enter_DefaultMode_from_RESET();
	SMBUS_0_enter_DefaultMode_from_RESET();
	SMBUS_1_enter_DefaultMode_from_RESET();
	SPI_0_enter_DefaultMode_from_RESET();
	UART_0_enter_DefaultMode_from_RESET();
	EXTINT_0_enter_DefaultMode_from_RESET();
	INTERRUPT_0_enter_DefaultMode_from_RESET();
	// Restore the SFRPAGE
	SFRPAGE = SFRPAGE_save;
	// [Config Calls]$

}

extern void PCA_0_enter_DefaultMode_from_RESET(void) {
	// $[PCA0MD - PCA Mode]
	/***********************************************************************
	 - Disable Watchdog Timer
	 - System clock divided by 4
	 - PCA continues to function normally while the system controller is in
	 Idle Mode
	 - Disable the CF interrupt
	 - Disable Watchdog Timer
	 - Watchdog Timer Enable unlocked
	 ***********************************************************************/
	SFRPAGE = 0x00;
	PCA0MD &= ~PCA0MD_WDTE__BMASK;
	PCA0MD = PCA0MD_CPS__SYSCLK_DIV_4 | PCA0MD_CIDL__NORMAL
			| PCA0MD_ECF__OVF_INT_DISABLED | PCA0MD_WDTE__DISABLED
			| PCA0MD_WDLCK__UNLOCKED;
	// [PCA0MD - PCA Mode]$

	// $[PCA0H - PCA Counter/Timer High Byte]
	// [PCA0H - PCA Counter/Timer High Byte]$

	// $[PCA0L - PCA Counter/Timer Low Byte]
	// [PCA0L - PCA Counter/Timer Low Byte]$

	// $[PCA0CN0 - PCA Control 0]
	/***********************************************************************
	 - Start the PCA Counter/Timer running
	 ***********************************************************************/
	PCA0CN0 |= PCA0CN0_CR__RUN;
	// [PCA0CN0 - PCA Control 0]$

}

extern void PCACH_0_enter_DefaultMode_from_RESET(void) {
	// $[PCA0CPM0 - PCA Channel 0 Capture/Compare Mode]
	/***********************************************************************
	 - Disable negative edge capture
	 - Disable CCF0 interrupts
	 - Disable match function
	 - 8-bit PWM selected
	 - Disable positive edge capture
	 - Enable comparator function
	 - Enable PWM function
	 - Disable toggle function
	 ***********************************************************************/
	PCA0CPM0 = PCA0CPM0_CAPN__DISABLED | PCA0CPM0_ECCF__DISABLED
			| PCA0CPM0_MAT__DISABLED | PCA0CPM0_PWM16__8_BIT
			| PCA0CPM0_CAPP__DISABLED | PCA0CPM0_ECOM__ENABLED
			| PCA0CPM0_PWM__ENABLED | PCA0CPM0_TOG__DISABLED;
	// [PCA0CPM0 - PCA Channel 0 Capture/Compare Mode]$

	// $[PCA0CPL0 - PCA Channel 0 Capture Module Low Byte]
	/***********************************************************************
	 - PCA Channel 0 Capture Module Low Byte = 0xFF
	 ***********************************************************************/
	PCA0CPL0 = (0xFF << PCA0CPL0_PCA0CPL0__SHIFT);
	// [PCA0CPL0 - PCA Channel 0 Capture Module Low Byte]$

	// $[PCA0CPH0 - PCA Channel 0 Capture Module High Byte]
	/***********************************************************************
	 - PCA Channel 0 Capture Module High Byte = 0xFF
	 ***********************************************************************/
	PCA0CPH0 = (0xFF << PCA0CPH0_PCA0CPH0__SHIFT);
	// [PCA0CPH0 - PCA Channel 0 Capture Module High Byte]$

	// $[PCA0 Start/Run restore]
	// [PCA0 Start/Run restore]$

}

extern void PCACH_1_enter_DefaultMode_from_RESET(void) {
	// $[PCA0CPM1 - PCA Channel 1 Capture/Compare Mode]
	/***********************************************************************
	 - Disable negative edge capture
	 - Disable CCF1 interrupts
	 - Disable match function
	 - 8-bit PWM selected
	 - Disable positive edge capture
	 - Enable comparator function
	 - Enable PWM function
	 - Disable toggle function
	 ***********************************************************************/
	PCA0CPM1 = PCA0CPM1_CAPN__DISABLED | PCA0CPM1_ECCF__DISABLED
			| PCA0CPM1_MAT__DISABLED | PCA0CPM1_PWM16__8_BIT
			| PCA0CPM1_CAPP__DISABLED | PCA0CPM1_ECOM__ENABLED
			| PCA0CPM1_PWM__ENABLED | PCA0CPM1_TOG__DISABLED;
	// [PCA0CPM1 - PCA Channel 1 Capture/Compare Mode]$

	// $[PCA0CPL1 - PCA Channel 1 Capture Module Low Byte]
	/***********************************************************************
	 - PCA Channel 1 Capture Module Low Byte = 0xFF
	 ***********************************************************************/
	PCA0CPL1 = (0xFF << PCA0CPL1_PCA0CPL1__SHIFT);
	// [PCA0CPL1 - PCA Channel 1 Capture Module Low Byte]$

	// $[PCA0CPH1 - PCA Channel 1 Capture Module High Byte]
	/***********************************************************************
	 - PCA Channel 1 Capture Module High Byte = 0xFF
	 ***********************************************************************/
	PCA0CPH1 = (0xFF << PCA0CPH1_PCA0CPH1__SHIFT);
	// [PCA0CPH1 - PCA Channel 1 Capture Module High Byte]$

	// $[PCA0 Start/Run restore]
	// [PCA0 Start/Run restore]$

}

extern void PCACH_2_enter_DefaultMode_from_RESET(void) {
	// $[PCA0CPM2 - PCA Channel 2 Capture/Compare Mode]
	/***********************************************************************
	 - Disable negative edge capture
	 - Disable CCF2 interrupts
	 - Disable match function
	 - 8-bit PWM selected
	 - Disable positive edge capture
	 - Enable comparator function
	 - Enable PWM function
	 - Disable toggle function
	 ***********************************************************************/
	PCA0CPM2 = PCA0CPM2_CAPN__DISABLED | PCA0CPM2_ECCF__DISABLED
			| PCA0CPM2_MAT__DISABLED | PCA0CPM2_PWM16__8_BIT
			| PCA0CPM2_CAPP__DISABLED | PCA0CPM2_ECOM__ENABLED
			| PCA0CPM2_PWM__ENABLED | PCA0CPM2_TOG__DISABLED;
	// [PCA0CPM2 - PCA Channel 2 Capture/Compare Mode]$

	// $[PCA0CPL2 - PCA Channel 2 Capture Module Low Byte]
	/***********************************************************************
	 - PCA Channel 2 Capture Module Low Byte = 0xFF
	 ***********************************************************************/
	PCA0CPL2 = (0xFF << PCA0CPL2_PCA0CPL2__SHIFT);
	// [PCA0CPL2 - PCA Channel 2 Capture Module Low Byte]$

	// $[PCA0CPH2 - PCA Channel 2 Capture Module High Byte]
	/***********************************************************************
	 - PCA Channel 2 Capture Module High Byte = 0xFF
	 ***********************************************************************/
	PCA0CPH2 = (0xFF << PCA0CPH2_PCA0CPH2__SHIFT);
	// [PCA0CPH2 - PCA Channel 2 Capture Module High Byte]$

	// $[PCA0 Start/Run restore]
	// [PCA0 Start/Run restore]$

}

extern void PCACH_3_enter_DefaultMode_from_RESET(void) {
	// $[PCA0CPM3 - PCA Channel 3 Capture/Compare Mode]
	/***********************************************************************
	 - Disable negative edge capture
	 - Disable CCF3 interrupts
	 - Disable match function
	 - 8-bit PWM selected
	 - Disable positive edge capture
	 - Enable comparator function
	 - Enable PWM function
	 - Disable toggle function
	 ***********************************************************************/
	PCA0CPM3 = PCA0CPM3_CAPN__DISABLED | PCA0CPM3_ECCF__DISABLED
			| PCA0CPM3_MAT__DISABLED | PCA0CPM3_PWM16__8_BIT
			| PCA0CPM3_CAPP__DISABLED | PCA0CPM3_ECOM__ENABLED
			| PCA0CPM3_PWM__ENABLED | PCA0CPM3_TOG__DISABLED;
	// [PCA0CPM3 - PCA Channel 3 Capture/Compare Mode]$

	// $[PCA0CPL3 - PCA Channel 3 Capture Module Low Byte]
	/***********************************************************************
	 - PCA Channel 3 Capture Module Low Byte = 0xFF
	 ***********************************************************************/
	PCA0CPL3 = (0xFF << PCA0CPL3_PCA0CPL3__SHIFT);
	// [PCA0CPL3 - PCA Channel 3 Capture Module Low Byte]$

	// $[PCA0CPH3 - PCA Channel 3 Capture Module High Byte]
	/***********************************************************************
	 - PCA Channel 3 Capture Module High Byte = 0xFF
	 ***********************************************************************/
	PCA0CPH3 = (0xFF << PCA0CPH3_PCA0CPH3__SHIFT);
	// [PCA0CPH3 - PCA Channel 3 Capture Module High Byte]$

	// $[PCA0 Start/Run restore]
	// [PCA0 Start/Run restore]$

}

extern void PORTS_0_enter_DefaultMode_from_RESET(void) {
	// $[P0 - Port 0 Pin Latch]
	/***********************************************************************
	 - P0.0 is low. Set P0.0 to drive low
	 - P0.1 is high. Set P0.1 to drive or float high
	 - P0.2 is low. Set P0.2 to drive low
	 - P0.3 is high. Set P0.3 to drive or float high
	 - P0.4 is high. Set P0.4 to drive or float high
	 - P0.5 is high. Set P0.5 to drive or float high
	 - P0.6 is high. Set P0.6 to drive or float high
	 - P0.7 is high. Set P0.7 to drive or float high
	 ***********************************************************************/
	P0 = P0_B0__LOW | P0_B1__HIGH | P0_B2__LOW | P0_B3__HIGH | P0_B4__HIGH
			| P0_B5__HIGH | P0_B6__HIGH | P0_B7__HIGH;
	// [P0 - Port 0 Pin Latch]$

	// $[P0MDOUT - Port 0 Output Mode]
	/***********************************************************************
	 - P0.0 output is push-pull
	 - P0.1 output is open-drain
	 - P0.2 output is open-drain
	 - P0.3 output is open-drain
	 - P0.4 output is push-pull
	 - P0.5 output is open-drain
	 - P0.6 output is open-drain
	 - P0.7 output is open-drain
	 ***********************************************************************/
	P0MDOUT = P0MDOUT_B0__PUSH_PULL | P0MDOUT_B1__OPEN_DRAIN
			| P0MDOUT_B2__OPEN_DRAIN | P0MDOUT_B3__OPEN_DRAIN
			| P0MDOUT_B4__PUSH_PULL | P0MDOUT_B5__OPEN_DRAIN
			| P0MDOUT_B6__OPEN_DRAIN | P0MDOUT_B7__OPEN_DRAIN;
	// [P0MDOUT - Port 0 Output Mode]$

	// $[P0MDIN - Port 0 Input Mode]
	/***********************************************************************
	 - P0.0 pin is configured for digital mode
	 - P0.1 pin is configured for digital mode
	 - P0.2 pin is configured for digital mode
	 - P0.3 pin is configured for digital mode
	 - P0.4 pin is configured for digital mode
	 - P0.5 pin is configured for digital mode
	 - P0.6 pin is configured for digital mode
	 - P0.7 pin is configured for analog mode
	 ***********************************************************************/
	P0MDIN = P0MDIN_B0__DIGITAL | P0MDIN_B1__DIGITAL | P0MDIN_B2__DIGITAL
			| P0MDIN_B3__DIGITAL | P0MDIN_B4__DIGITAL | P0MDIN_B5__DIGITAL
			| P0MDIN_B6__DIGITAL | P0MDIN_B7__ANALOG;
	// [P0MDIN - Port 0 Input Mode]$

	// $[P0SKIP - Port 0 Skip]
	/***********************************************************************
	 - P0.0 pin is skipped by the crossbar
	 - P0.1 pin is skipped by the crossbar
	 - P0.2 pin is skipped by the crossbar
	 - P0.3 pin is skipped by the crossbar
	 - P0.4 pin is not skipped by the crossbar
	 - P0.5 pin is not skipped by the crossbar
	 - P0.6 pin is skipped by the crossbar
	 - P0.7 pin is skipped by the crossbar
	 ***********************************************************************/
	P0SKIP = P0SKIP_B0__SKIPPED | P0SKIP_B1__SKIPPED | P0SKIP_B2__SKIPPED
			| P0SKIP_B3__SKIPPED | P0SKIP_B4__NOT_SKIPPED
			| P0SKIP_B5__NOT_SKIPPED | P0SKIP_B6__SKIPPED | P0SKIP_B7__SKIPPED;
	// [P0SKIP - Port 0 Skip]$

}

extern void PORTS_1_enter_DefaultMode_from_RESET(void) {
	// $[P1 - Port 1 Pin Latch]
	/***********************************************************************
	 - P1.0 is high. Set P1.0 to drive or float high
	 - P1.1 is high. Set P1.1 to drive or float high
	 - P1.2 is low. Set P1.2 to drive low
	 - P1.3 is high. Set P1.3 to drive or float high
	 - P1.4 is high. Set P1.4 to drive or float high
	 - P1.5 is high. Set P1.5 to drive or float high
	 - P1.6 is low. Set P1.6 to drive low
	 - P1.7 is low. Set P1.7 to drive low
	 ***********************************************************************/
	P1 = P1_B0__HIGH | P1_B1__HIGH | P1_B2__LOW | P1_B3__HIGH | P1_B4__HIGH
			| P1_B5__HIGH | P1_B6__LOW | P1_B7__LOW;
	// [P1 - Port 1 Pin Latch]$

	// $[P1MDOUT - Port 1 Output Mode]
	/***********************************************************************
	 - P1.0 output is push-pull
	 - P1.1 output is open-drain
	 - P1.2 output is push-pull
	 - P1.3 output is push-pull
	 - P1.4 output is open-drain
	 - P1.5 output is open-drain
	 - P1.6 output is push-pull
	 - P1.7 output is push-pull
	 ***********************************************************************/
	P1MDOUT = P1MDOUT_B0__PUSH_PULL | P1MDOUT_B1__OPEN_DRAIN
			| P1MDOUT_B2__PUSH_PULL | P1MDOUT_B3__PUSH_PULL
			| P1MDOUT_B4__OPEN_DRAIN | P1MDOUT_B5__OPEN_DRAIN
			| P1MDOUT_B6__PUSH_PULL | P1MDOUT_B7__PUSH_PULL;
	// [P1MDOUT - Port 1 Output Mode]$

	// $[P1MDIN - Port 1 Input Mode]
	// [P1MDIN - Port 1 Input Mode]$

	// $[P1SKIP - Port 1 Skip]
	/***********************************************************************
	 - P1.0 pin is not skipped by the crossbar
	 - P1.1 pin is not skipped by the crossbar
	 - P1.2 pin is not skipped by the crossbar
	 - P1.3 pin is skipped by the crossbar
	 - P1.4 pin is not skipped by the crossbar
	 - P1.5 pin is not skipped by the crossbar
	 - P1.6 pin is not skipped by the crossbar
	 - P1.7 pin is not skipped by the crossbar
	 ***********************************************************************/
	P1SKIP = P1SKIP_B0__NOT_SKIPPED | P1SKIP_B1__NOT_SKIPPED
			| P1SKIP_B2__NOT_SKIPPED | P1SKIP_B3__SKIPPED
			| P1SKIP_B4__NOT_SKIPPED | P1SKIP_B5__NOT_SKIPPED
			| P1SKIP_B6__NOT_SKIPPED | P1SKIP_B7__NOT_SKIPPED;
	// [P1SKIP - Port 1 Skip]$

}

extern void PORTS_2_enter_DefaultMode_from_RESET(void) {
	// $[P2 - Port 2 Pin Latch]
	/***********************************************************************
	 - P2.0 is low. Set P2.0 to drive low
	 - P2.1 is low. Set P2.1 to drive low
	 - P2.2 is low. Set P2.2 to drive low
	 - P2.3 is high. Set P2.3 to drive or float high
	 - P2.4 is low. Set P2.4 to drive low
	 - P2.5 is high. Set P2.5 to drive or float high
	 - P2.6 is high. Set P2.6 to drive or float high
	 - P2.7 is high. Set P2.7 to drive or float high
	 ***********************************************************************/
	P2 = P2_B0__LOW | P2_B1__LOW | P2_B2__LOW | P2_B3__HIGH | P2_B4__LOW
			| P2_B5__HIGH | P2_B6__HIGH | P2_B7__HIGH;
	// [P2 - Port 2 Pin Latch]$

	// $[P2MDOUT - Port 2 Output Mode]
	/***********************************************************************
	 - P2.0 output is push-pull
	 - P2.1 output is push-pull
	 - P2.2 output is push-pull
	 - P2.3 output is open-drain
	 - P2.4 output is push-pull
	 - P2.5 output is open-drain
	 - P2.6 output is open-drain
	 - P2.7 output is open-drain
	 ***********************************************************************/
	P2MDOUT = P2MDOUT_B0__PUSH_PULL | P2MDOUT_B1__PUSH_PULL
			| P2MDOUT_B2__PUSH_PULL | P2MDOUT_B3__OPEN_DRAIN
			| P2MDOUT_B4__PUSH_PULL | P2MDOUT_B5__OPEN_DRAIN
			| P2MDOUT_B6__OPEN_DRAIN | P2MDOUT_B7__OPEN_DRAIN;
	// [P2MDOUT - Port 2 Output Mode]$

	// $[P2MDIN - Port 2 Input Mode]
	/***********************************************************************
	 - P2.0 pin is configured for digital mode
	 - P2.1 pin is configured for digital mode
	 - P2.2 pin is configured for digital mode
	 - P2.3 pin is configured for digital mode
	 - P2.4 pin is configured for digital mode
	 - P2.5 pin is configured for analog mode
	 - P2.6 pin is configured for digital mode
	 - P2.7 pin is configured for digital mode
	 ***********************************************************************/
	P2MDIN = P2MDIN_B0__DIGITAL | P2MDIN_B1__DIGITAL | P2MDIN_B2__DIGITAL
			| P2MDIN_B3__DIGITAL | P2MDIN_B4__DIGITAL | P2MDIN_B5__ANALOG
			| P2MDIN_B6__DIGITAL | P2MDIN_B7__DIGITAL;
	// [P2MDIN - Port 2 Input Mode]$

	// $[P2SKIP - Port 2 Skip]
	/***********************************************************************
	 - P2.0 pin is not skipped by the crossbar
	 - P2.1 pin is not skipped by the crossbar
	 - P2.2 pin is skipped by the crossbar
	 - P2.3 pin is skipped by the crossbar
	 - P2.4 pin is skipped by the crossbar
	 - P2.5 pin is skipped by the crossbar
	 - P2.6 pin is not skipped by the crossbar
	 - P2.7 pin is not skipped by the crossbar
	 ***********************************************************************/
	P2SKIP = P2SKIP_B0__NOT_SKIPPED | P2SKIP_B1__NOT_SKIPPED
			| P2SKIP_B2__SKIPPED | P2SKIP_B3__SKIPPED | P2SKIP_B4__SKIPPED
			| P2SKIP_B5__SKIPPED | P2SKIP_B6__NOT_SKIPPED
			| P2SKIP_B7__NOT_SKIPPED;
	// [P2SKIP - Port 2 Skip]$

}

extern void PORTS_3_enter_DefaultMode_from_RESET(void) {
	// $[P3 - Port 3 Pin Latch]
	// [P3 - Port 3 Pin Latch]$

	// $[P3MDOUT - Port 3 Output Mode]
	// [P3MDOUT - Port 3 Output Mode]$

	// $[P3MDIN - Port 3 Input Mode]
	// [P3MDIN - Port 3 Input Mode]$

	// $[P3SKIP - Port 3 Skip]
	// [P3SKIP - Port 3 Skip]$

}

extern void PBCFG_0_enter_DefaultMode_from_RESET(void) {
	// $[XBR1 - Port I/O Crossbar 1]
	/***********************************************************************
	 - Weak Pullups enabled 
	 - Crossbar enabled
	 - CEX0, CEX1, CEX2, CEX3 routed to Port pins
	 - ECI unavailable at Port pin
	 - T0 unavailable at Port pin
	 - T1 unavailable at Port pin
	 ***********************************************************************/
	XBR1 = XBR1_WEAKPUD__PULL_UPS_ENABLED | XBR1_XBARE__ENABLED
			| XBR1_PCA0ME__CEX0_CEX1_CEX2_CEX3 | XBR1_ECIE__DISABLED
			| XBR1_T0E__DISABLED | XBR1_T1E__DISABLED;
	// [XBR1 - Port I/O Crossbar 1]$

	// $[XBR0 - Port I/O Crossbar 0]
	/***********************************************************************
	 - UART0 TX, RX routed to Port pins P0.4 and P0.5
	 - SPI I/O routed to Port pins
	 - SMBus 0 I/O routed to Port pins
	 - CP0 unavailable at Port pin
	 - Asynchronous CP0 unavailable at Port pin
	 - CP1 unavailable at Port pin
	 - Asynchronous CP1 unavailable at Port pin
	 - SYSCLK unavailable at Port pin
	 ***********************************************************************/
	XBR0 = XBR0_URT0E__ENABLED | XBR0_SPI0E__ENABLED | XBR0_SMB0E__ENABLED
			| XBR0_CP0E__DISABLED | XBR0_CP0AE__DISABLED | XBR0_CP1E__DISABLED
			| XBR0_CP1AE__DISABLED | XBR0_SYSCKE__DISABLED;
	// [XBR0 - Port I/O Crossbar 0]$

	// $[XBR2 - Port I/O Crossbar 2]
	/***********************************************************************
	 - UART1 I/O unavailable at Port pin
	 - SMBus1 I/O routed to Port pins
	 ***********************************************************************/
	XBR2 = XBR2_URT1E__DISABLED | XBR2_SMB1E__ENABLED;
	// [XBR2 - Port I/O Crossbar 2]$

}

extern void ADC_0_enter_DefaultMode_from_RESET(void) {
	// $[ADC0CF - ADC0 Configuration]
	/***********************************************************************
	 - Data in the ADC0H:ADC0L registers is right-justified
	 - SAR Clock Divider = 0x05
	 ***********************************************************************/
	ADC0CF = ADC0CF_ADLJST__RIGHT_JUSTIFIED | (0x05 << ADC0CF_ADSC__SHIFT);
	// [ADC0CF - ADC0 Configuration]$

	// $[ADC0GTH - ADC0 Greater-Than High Byte]
	// [ADC0GTH - ADC0 Greater-Than High Byte]$

	// $[ADC0GTL - ADC0 Greater-Than Low Byte]
	// [ADC0GTL - ADC0 Greater-Than Low Byte]$

	// $[ADC0LTH - ADC0 Less-Than High Byte]
	// [ADC0LTH - ADC0 Less-Than High Byte]$

	// $[ADC0LTL - ADC0 Less-Than Low Byte]
	// [ADC0LTL - ADC0 Less-Than Low Byte]$

	// $[AMX0N - AMUX0 Negative Multiplexer Selection]
	/***********************************************************************
	 - Ground 
	 ***********************************************************************/
	AMX0N = AMX0N_AMX0N__GND;
	// [AMX0N - AMUX0 Negative Multiplexer Selection]$

	// $[AMX0P - AMUX0 Positive Multiplexer Selection]
	/***********************************************************************
	 - VDD Supply Voltage
	 ***********************************************************************/
	AMX0P = AMX0P_AMX0P__VDD;
	// [AMX0P - AMUX0 Positive Multiplexer Selection]$

	// $[ADC0CN0 - ADC0 Control]
	// [ADC0CN0 - ADC0 Control]$

}

extern void HFOSC_0_enter_DefaultMode_from_RESET(void) {
	// $[HFO0CN - High Frequency Oscillator Control]
	/***********************************************************************
	 - SYSCLK can be derived from Internal H-F Oscillator divided by 1 
	 ***********************************************************************/
	HFO0CN |= HFO0CN_IFCN__SYSCLK_DIV_1;
	// [HFO0CN - High Frequency Oscillator Control]$

}

extern void LFOSC_0_enter_DefaultMode_from_RESET(void) {
	// $[LFO0CN - Low Frequency Oscillator Control]
	/***********************************************************************
	 - Internal L-F Oscillator Enabled
	 - Divide by 1 selected
	 ***********************************************************************/
	LFO0CN |= LFO0CN_OSCLEN__ENABLED | LFO0CN_OSCLD__DIVIDE_BY_1;
	// [LFO0CN - Low Frequency Oscillator Control]$

	// $[Wait for LFOSC Ready]
	while ((LFO0CN & LFO0CN_OSCLRDY__BMASK) != LFO0CN_OSCLRDY__SET)
		;
	// [Wait for LFOSC Ready]$

}

extern void CLOCK_0_enter_DefaultMode_from_RESET(void) {
	// $[CLKSEL - Clock Select]
	/***********************************************************************
	 - Clock 
	 - USB clock 
	 - Enabling the Crossbar SYSCLK signal outputs SYSCLK synchronized with
	 the Port I/O
	 ***********************************************************************/
	CLKSEL = CLKSEL_CLKSL__HFOSC | CLKSEL_USBCLK__HFOSC
			| CLKSEL_OUTCLK__SYSCLK_SYNC_IO;
	// [CLKSEL - Clock Select]$

}

extern void CIP51_0_enter_DefaultMode_from_RESET(void) {
	// $[PFE0CN - Prefetch Engine Control]
	/***********************************************************************
	 - Each byte of a firmware flash write is written individually
	 - Disable the prefetch engine 
	 ***********************************************************************/
	PFE0CN = PFE0CN_FLBWE__BLOCK_WRITE_DISABLED | PFE0CN_PFEN__DISABLED;
	// [PFE0CN - Prefetch Engine Control]$

}

extern void SPI_0_enter_DefaultMode_from_RESET(void) {
	// $[SPI0CKR - SPI0 Clock Rate]
	/***********************************************************************
	 - SPI0 Clock Rate = 0x03
	 ***********************************************************************/
	SFRPAGE = 0x00;
	SPI0CKR = (0x03 << SPI0CKR_SPI0CKR__SHIFT);
	// [SPI0CKR - SPI0 Clock Rate]$

	// $[SPI0CFG - SPI0 Configuration]
	/***********************************************************************
	 - Data centered on second edge of SCK period
	 - SCK line high in idle state
	 - Enable master mode. Operate as a master
	 ***********************************************************************/
	SPI0CFG |= SPI0CFG_CKPHA__DATA_CENTERED_SECOND | SPI0CFG_CKPOL__IDLE_HIGH
			| SPI0CFG_MSTEN__MASTER_ENABLED;
	// [SPI0CFG - SPI0 Configuration]$

	// $[SPI0CN0 - SPI0 Control]
	/***********************************************************************
	 - Enable the SPI module
	 - 3-Wire Slave or 3-Wire Master Mode
	 ***********************************************************************/
	SPI0CN0 &= ~SPI0CN0_NSSMD__FMASK;
	SPI0CN0 |= SPI0CN0_SPIEN__ENABLED;
	// [SPI0CN0 - SPI0 Control]$

}

extern void EXTINT_0_enter_DefaultMode_from_RESET(void) {
	// $[IT01CF - INT0/INT1 Configuration]
	/***********************************************************************
	 - INT0 input is active high
	 - Select P0.2
	 - INT1 input is active high
	 - Select P0.2
	 ***********************************************************************/
	IT01CF = IT01CF_IN0PL__ACTIVE_HIGH | IT01CF_IN0SL__P0_2
			| IT01CF_IN1PL__ACTIVE_HIGH | IT01CF_IN1SL__P0_2;
	// [IT01CF - INT0/INT1 Configuration]$

}

extern void INTERRUPT_0_enter_DefaultMode_from_RESET(void) {
	// $[EIE1 - Extended Interrupt Enable 1]
	// [EIE1 - Extended Interrupt Enable 1]$

	// $[EIP1 - Extended Interrupt Priority 1]
	// [EIP1 - Extended Interrupt Priority 1]$

	// $[IE - Interrupt Enable]
	/***********************************************************************
	 - Enable each interrupt according to its individual mask setting
	 - Enable interrupt requests generated by the INT0 input
	 - Disable external interrupt 1
	 - Disable all SPI0 interrupts
	 - Disable all Timer 0 interrupt
	 - Disable all Timer 1 interrupt
	 - Disable Timer 2 interrupt
	 - Disable UART0 interrupt
	 ***********************************************************************/
	IE = IE_EA__ENABLED | IE_EX0__ENABLED | IE_EX1__DISABLED
			| IE_ESPI0__DISABLED | IE_ET0__DISABLED | IE_ET1__DISABLED
			| IE_ET2__DISABLED | IE_ES0__DISABLED;
	// [IE - Interrupt Enable]$

	// $[IP - Interrupt Priority]
	// [IP - Interrupt Priority]$

	// $[EIE2 - Extended Interrupt Enable 2]
	/***********************************************************************
	 - Enable interrupt requests generated by SMB1
	 - Disable Timer 4interrupts
	 - Disable Timer 5 interrupts
	 - Disable UART1 interrupt
	 - Disable all VBUS interrupts
	 ***********************************************************************/
	EIE2 = EIE2_ESMB1__ENABLED | EIE2_ET4__DISABLED | EIE2_ET5__DISABLED
			| EIE2_ES1__DISABLED | EIE2_EVBUS__DISABLED;
	// [EIE2 - Extended Interrupt Enable 2]$

	// $[EIP2 - Extended Interrupt Priority 2]
	/***********************************************************************
	 - SMB1 interrupt set to low priority level
	 - Timer 4 interrupt set to low priority level
	 - Timer 5 interrupt set to high priority level
	 - UART1 interrupt set to low priority level
	 - VBUS interrupt set to low priority level
	 ***********************************************************************/
	EIP2 = EIP2_PSMB1__LOW | EIP2_PT4__LOW | EIP2_PT5__HIGH | EIP2_PS1__LOW
			| EIP2_PVBUS__LOW;
	// [EIP2 - Extended Interrupt Priority 2]$

}

extern void TIMER16_5_enter_DefaultMode_from_RESET(void) {
	// $[Timer Initialization]
	// Save Timer Configuration
	uint8_t TMR5CN0_TR5_save;
	SFRPAGE = 0x0F;
	TMR5CN0_TR5_save = TMR5CN0 & TMR5CN0_TR5__BMASK;
	// Stop Timer
	TMR5CN0 &= ~(TMR5CN0_TR5__BMASK);
	// [Timer Initialization]$

	// $[TMR5CN0 - Timer 5 Control]
	// [TMR5CN0 - Timer 5 Control]$

	// $[TMR5H - Timer 5 High Byte]
	// [TMR5H - Timer 5 High Byte]$

	// $[TMR5L - Timer 5 Low Byte]
	// [TMR5L - Timer 5 Low Byte]$

	// $[TMR5RLH - Timer 5 Reload High Byte]
	/***********************************************************************
	 - Timer 5 Reload High Byte = 0x48
	 ***********************************************************************/
	TMR5RLH = (0x48 << TMR5RLH_TMR5RLH__SHIFT);
	// [TMR5RLH - Timer 5 Reload High Byte]$

	// $[TMR5RLL - Timer 5 Reload Low Byte]
	/***********************************************************************
	 - Timer 5 Reload Low Byte = 0xE5
	 ***********************************************************************/
	TMR5RLL = (0xE5 << TMR5RLL_TMR5RLL__SHIFT);
	// [TMR5RLL - Timer 5 Reload Low Byte]$

	// $[TMR5CN0]
	/***********************************************************************
	 - Start Timer 5 running
	 ***********************************************************************/
	TMR5CN0 |= TMR5CN0_TR5__RUN;
	// [TMR5CN0]$

	// $[Timer Restoration]
	// Restore Timer Configuration
	TMR5CN0 |= TMR5CN0_TR5_save;
	// [Timer Restoration]$

}

extern void TIMER_SETUP_0_enter_DefaultMode_from_RESET(void) {
	// $[CKCON0 - Clock Control 0]
	/***********************************************************************
	 - System clock divided by 12
	 - Counter/Timer 0 uses the clock defined by the prescale field, SCA
	 - Timer 2 high byte uses the clock defined by T2XCLK in TMR2CN0
	 - Timer 2 low byte uses the system clock
	 - Timer 3 high byte uses the clock defined by T3XCLK in TMR3CN0
	 - Timer 3 low byte uses the clock defined by T3XCLK in TMR3CN0
	 - Timer 1 uses the clock defined by the prescale field, SCA
	 ***********************************************************************/
	SFRPAGE = 0x00;
	CKCON0 = CKCON0_SCA__SYSCLK_DIV_12 | CKCON0_T0M__PRESCALE
			| CKCON0_T2MH__EXTERNAL_CLOCK | CKCON0_T2ML__SYSCLK
			| CKCON0_T3MH__EXTERNAL_CLOCK | CKCON0_T3ML__EXTERNAL_CLOCK
			| CKCON0_T1M__PRESCALE;
	// [CKCON0 - Clock Control 0]$

	// $[CKCON1 - Clock Control 1]
	/***********************************************************************
	 - Timer 4 high byte uses the clock defined by T4XCLK in TMR4CN0
	 - Timer 4 low byte uses the clock defined by T4XCLK in TMR4CN0
	 - Timer 5 high byte uses the clock defined by T5XCLK in TMR5CN
	 - Timer 5 low byte uses the system clock
	 ***********************************************************************/
	SFRPAGE = 0x0F;
	CKCON1 = CKCON1_T4MH__EXTERNAL_CLOCK | CKCON1_T4ML__EXTERNAL_CLOCK
			| CKCON1_T5MH__EXTERNAL_CLOCK | CKCON1_T5ML__SYSCLK;
	// [CKCON1 - Clock Control 1]$

	// $[TMOD - Timer 0/1 Mode]
	/***********************************************************************
	 - Mode 0, 13-bit Counter/Timer
	 - Mode 2, 8-bit Counter/Timer with Auto-Reload
	 - Timer Mode
	 - Timer 0 enabled when TR0 = 1 irrespective of INT0 logic level
	 - Timer Mode
	 - Timer 1 enabled when TR1 = 1 irrespective of INT1 logic level
	 ***********************************************************************/
	SFRPAGE = 0x00;
	TMOD = TMOD_T0M__MODE0 | TMOD_T1M__MODE2 | TMOD_CT0__TIMER
			| TMOD_GATE0__DISABLED | TMOD_CT1__TIMER | TMOD_GATE1__DISABLED;
	// [TMOD - Timer 0/1 Mode]$

	// $[TCON - Timer 0/1 Control]
	/***********************************************************************
	 - INT0 is edge triggered
	 - INT1 is edge triggered
	 - Start Timer 1 running
	 ***********************************************************************/
	TCON |= TCON_IT0__EDGE | TCON_IT1__EDGE | TCON_TR1__RUN;
	// [TCON - Timer 0/1 Control]$

}

extern void SMBUS_0_enter_DefaultMode_from_RESET(void) {
	// $[SMB0ADR - SMBus 0 Slave Address]
	/***********************************************************************
	 - General Call Address is ignored
	 - SMBus Hardware Slave Address = 0x34
	 ***********************************************************************/
	SMB0ADR = SMB0ADR_GC__IGNORED | (0x34 << SMB0ADR_SLV__SHIFT);
	// [SMB0ADR - SMBus 0 Slave Address]$

	// $[SMB0ADM - SMBus 0 Slave Address Mask]
	/***********************************************************************
	 - Automatic slave address recognition and hardware acknowledge is
	 enabled
	 - SMBus Slave Address Mask = 0x7F
	 ***********************************************************************/
	SMB0ADM = SMB0ADM_EHACK__ADR_ACK_AUTOMATIC | (0x7F << SMB0ADM_SLVM__SHIFT);
	// [SMB0ADM - SMBus 0 Slave Address Mask]$

	// $[SMB0CF - SMBus 0 Configuration]
	/***********************************************************************
	 - Timer 2 Low Byte Overflow
	 - Enable the SMBus module
	 - Enable bus free timeouts
	 - Enable SDA extended setup and hold times
	 ***********************************************************************/
	SMB0CF |= SMB0CF_SMBCS__TIMER2_LOW | SMB0CF_ENSMB__ENABLED
			| SMB0CF_SMBFTE__FREE_TO_ENABLED | SMB0CF_EXTHOLD__ENABLED;
	// [SMB0CF - SMBus 0 Configuration]$

}

extern void SMBUS_1_enter_DefaultMode_from_RESET(void) {
	// $[SMB1ADR - SMBus 1 Slave Address]
	// [SMB1ADR - SMBus 1 Slave Address]$

	// $[SMB1ADM - SMBus 1 Slave Address Mask]
	// [SMB1ADM - SMBus 1 Slave Address Mask]$

	// $[SMB1CF - SMBus 1 Configuration]
	/***********************************************************************
	 - Timer 2 Low Byte Overflow
	 - Slave states are inhibited
	 - Enable the SMBus module
	 - Enable bus free timeouts
	 ***********************************************************************/
	SFRPAGE = 0x0F;
	SMB1CF |= SMB1CF_SMBCS__TIMER2_LOW | SMB1CF_INH__SLAVE_DISABLED
			| SMB1CF_ENSMB__ENABLED | SMB1CF_SMBFTE__FREE_TO_ENABLED;
	// [SMB1CF - SMBus 1 Configuration]$

}

extern void TIMER16_4_enter_DefaultMode_from_RESET(void) {
	// $[Timer Initialization]
	// Save Timer Configuration
	uint8_t TMR4CN0_TR4_save;
	SFRPAGE = 0x0F;
	TMR4CN0_TR4_save = TMR4CN0 & TMR4CN0_TR4__BMASK;
	// Stop Timer
	TMR4CN0 &= ~(TMR4CN0_TR4__BMASK);
	// [Timer Initialization]$

	// $[TMR4CN0 - Timer 4 Control]
	// [TMR4CN0 - Timer 4 Control]$

	// $[TMR4H - Timer 4 High Byte]
	// [TMR4H - Timer 4 High Byte]$

	// $[TMR4L - Timer 4 Low Byte]
	// [TMR4L - Timer 4 Low Byte]$

	// $[TMR4RLH - Timer 4 Reload High Byte]
	/***********************************************************************
	 - Timer 4 Reload High Byte = 0xFC
	 ***********************************************************************/
	TMR4RLH = (0xFC << TMR4RLH_TMR4RLH__SHIFT);
	// [TMR4RLH - Timer 4 Reload High Byte]$

	// $[TMR4RLL - Timer 4 Reload Low Byte]
	/***********************************************************************
	 - Timer 4 Reload Low Byte = 0x18
	 ***********************************************************************/
	TMR4RLL = (0x18 << TMR4RLL_TMR4RLL__SHIFT);
	// [TMR4RLL - Timer 4 Reload Low Byte]$

	// $[TMR4CN0]
	// [TMR4CN0]$

	// $[Timer Restoration]
	// Restore Timer Configuration
	TMR4CN0 |= TMR4CN0_TR4_save;
	// [Timer Restoration]$

}

extern void TIMER16_2_enter_DefaultMode_from_RESET(void) {
	// $[Timer Initialization]
	// Save Timer Configuration
	uint8_t TMR2CN0_TR2_save;
	TMR2CN0_TR2_save = TMR2CN0 & TMR2CN0_TR2__BMASK;
	// Stop Timer
	TMR2CN0 &= ~(TMR2CN0_TR2__BMASK);
	// [Timer Initialization]$

	// $[TMR2CN0 - Timer 2 Control]
	// [TMR2CN0 - Timer 2 Control]$

	// $[TMR2H - Timer 2 High Byte]
	// [TMR2H - Timer 2 High Byte]$

	// $[TMR2L - Timer 2 Low Byte]
	// [TMR2L - Timer 2 Low Byte]$

	// $[TMR2RLH - Timer 2 Reload High Byte]
	/***********************************************************************
	 - Timer 2 Reload High Byte = 0xFF
	 ***********************************************************************/
	TMR2RLH = (0xFF << TMR2RLH_TMR2RLH__SHIFT);
	// [TMR2RLH - Timer 2 Reload High Byte]$

	// $[TMR2RLL - Timer 2 Reload Low Byte]
	/***********************************************************************
	 - Timer 2 Reload Low Byte = 0xE8
	 ***********************************************************************/
	TMR2RLL = (0xE8 << TMR2RLL_TMR2RLL__SHIFT);
	// [TMR2RLL - Timer 2 Reload Low Byte]$

	// $[TMR2CN0]
	/***********************************************************************
	 - Start Timer 2 running
	 ***********************************************************************/
	TMR2CN0 |= TMR2CN0_TR2__RUN;
	// [TMR2CN0]$

	// $[Timer Restoration]
	// Restore Timer Configuration
	TMR2CN0 |= TMR2CN0_TR2_save;
	// [Timer Restoration]$

}

extern void PCACH_4_enter_DefaultMode_from_RESET(void) {
	// $[PCA0CPM4 - PCA Channel 4 Capture/Compare Mode]
	/***********************************************************************
	 - Disable negative edge capture
	 - Disable CCF4 interrupts
	 - Enable match function
	 - 8-bit PWM selected
	 - Disable positive edge capture
	 - Disable comparator function
	 - Disable PWM function
	 - Disable toggle function
	 ***********************************************************************/
	PCA0CPM4 = PCA0CPM4_CAPN__DISABLED | PCA0CPM4_ECCF__DISABLED
			| PCA0CPM4_MAT__ENABLED | PCA0CPM4_PWM16__8_BIT
			| PCA0CPM4_CAPP__DISABLED | PCA0CPM4_ECOM__DISABLED
			| PCA0CPM4_PWM__DISABLED | PCA0CPM4_TOG__DISABLED;
	// [PCA0CPM4 - PCA Channel 4 Capture/Compare Mode]$

	// $[PCA0CPL4 - PCA Channel 4 Capture Module Low Byte]
	// [PCA0CPL4 - PCA Channel 4 Capture Module Low Byte]$

	// $[PCA0CPH4 - PCA Channel 4 Capture Module High Byte]
	PCA0CPH4 = 0x00;
	// [PCA0CPH4 - PCA Channel 4 Capture Module High Byte]$

	// $[PCA0 Start/Run restore]
	// [PCA0 Start/Run restore]$

}

extern void TIMER01_0_enter_DefaultMode_from_RESET(void) {
	// $[Timer Initialization]
	//Save Timer Configuration
	uint8_t TCON_save;
	TCON_save = TCON;
	//Stop Timers
	TCON &= ~TCON_TR0__BMASK & ~TCON_TR1__BMASK;

	// [Timer Initialization]$

	// $[TH0 - Timer 0 High Byte]
	// [TH0 - Timer 0 High Byte]$

	// $[TL0 - Timer 0 Low Byte]
	// [TL0 - Timer 0 Low Byte]$

	// $[TH1 - Timer 1 High Byte]
	/***********************************************************************
	 - Timer 1 High Byte = 0x30
	 ***********************************************************************/
	TH1 = (0x30 << TH1_TH1__SHIFT);
	// [TH1 - Timer 1 High Byte]$

	// $[TL1 - Timer 1 Low Byte]
	// [TL1 - Timer 1 Low Byte]$

	// $[Timer Restoration]
	//Restore Timer Configuration
	TCON |= (TCON_save & TCON_TR0__BMASK) | (TCON_save & TCON_TR1__BMASK);

	// [Timer Restoration]$

}

extern void UART_0_enter_DefaultMode_from_RESET(void) {
	// $[SCON0 - UART0 Serial Port Control]
	/***********************************************************************
	 - UART0 reception enabled
	 ***********************************************************************/
	SCON0 |= SCON0_REN__RECEIVE_ENABLED;
	// [SCON0 - UART0 Serial Port Control]$

}

