Design Name | mux |
Fitting Status | Successful |
Software Version | P.20131013 |
Device Used | XC9572XL-5-VQ64 |
Date | 5-11-2019, 8:56AM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
38/72 (53%) | 135/360 (38%) | 5/72 (7%) | 51/52 (99%) | 66/216 (31%) |
|
|
Signal mapped onto global clock net (GCK1) | CLK |
Macrocells in high performance mode (MCHP) | 38 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 38 |