Z8 MCU

Pinout

With suggested placement of latch and memory chip for ease of wiring.

Not tested yet!

VCC ‑‑> 1    Z8   
   MCU   		 40 <‑‑ P3.6
XTAL2 <-- 2 39 <-- P3.1
XTAL1 --> 3 38 --> P2.7
SOUTP3.7 <-- 4 37 --> P2.6
SINP3.0 <-- 5 36 --> P2.5
RESET --> 6 35 --> P2.4
R/W <-- 7 34 --> P2.3
DS <-- 8 33 --> P2.2
AS <-- 9 32 --> P2.1
P3.5 <-> 10 31 --> P2.0
GND --- 11 30 <-- P3.3 A14 --> 1 28-pin
JEDEC
RAM		 28 <-- VCC
P3.2 <-> 12 29 --> P3.4 OE ‑‑> 1  74HCT 
573		 20 <‑‑ VCC A12 --> 2 27 <-- R/W
A8P0.0 <‑> 13 28 <-> P1.7AD7 ‑‑> D7 --> 2 19 ‑‑> A7 ‑‑> 3 26 <-- A13
A9P0.1 <‑> 14 27 <-> P1.6AD6 --> D6 --> 3 18 --> A6 --> 4 25 <-- A8
A10P0.2 <-> 15 26 <-> P1.5AD5 --> D5 --> 4 17 --> A5 --> 5 24 <-- A9
A11P0.3 --> 16 25 <-> P1.4AD4 --> D4 --> 5 16 --> A4 --> 6 23 <-- A11
A12P0.4 --> 17 24 <-> P1.3AD3 --> D3 --> 6 15 --> A3 --> 7 22 <-- CS
A13P0.5 <-- 18 23 <-> P1.2AD2 -->D2 --> 7 14 --> A2 --> 8 21 <-- A10
A14P0.6 <-- 19 22 <-> P1.1AD1 -->D1 --> 8 13 --> A1 --> 9 20 <-- OE
A15P0.7 <-- 20 21 <-> P1.0AD0 -->D0 --> 9 12 --> A0 --> 10 19 <-- D7
GND --- 10 11 <-- ALE D0 --> 11 18 <-> D6
D1 <-> 13 17 <-> D5
D2 <-> 13 16 <-> D4
GND --- 14 15 <‑> D3

Note the address latch enable signal (ALE) is the inverted AS. The latch OE can be wired to ground.