J069 SVC

Using the SVC

The I/O map of the SVC is as follows:

  READ WRITE
Base address + 0 Data read Data write
Base address + 1 Status Flag Address Pointer
Base address + 2 - -
Base address + 3 Interrupt Status Flag Start Interrupt register

A full description of the SVC’s text controller device is given in Appendix D of this manual. The function of the registers are described in the following paragraphs.

Control Modes

The controller can operate in two modes, called 9128 mode and 9153 mode. In 9128 mode, setting the top bit of a character enables an attribute (such as reverse video for example), for that character. Only one attribute can be selected, by writing to register 12. In 9153 mode there is a choice of attributes, but selecting the attributes for succeeding characters takes up one character position, which is displayed as a blank.

Initialising the SVC

The basic driver in Appendix C (lines 9080 to 9230) provides a useful example of how to initialise the SVC. Writing to a register on the SVC is accomplished by writing the register number to the SVC's Address Pointer, then writing to the register by writing the data byte to base address + 0. All registers are "write only" except register 13. Values written to register 13 are transferred to the screen as characters at a location defined by the cursor address. To read a character back from the screen register 13 must be read twice. Bit 7 of the status register must be set to 1 before the cursor or character registers can be accessed. The following table describes a typical initialisation sequence.

Register   Value    Function

06H	00H	Reset the text controller
08H	00H	Set top of screen address to zero (scroll register)
09H	00H	Cursor lower 8 bits to zero
0AH	80H	Cursor upper 3 bits to zero, status line enabled
0BH	00H	Set screen fill address to zero
0DH	20H	Start screen fill to spaces
0CH	00H	Set misc. screen parameters
OEH	00H	Set cursor auto increment off
OFH	01H	Enable 9153 attribute mode
Note: The field refresh rate upon reset will be incorrect until register 8 bit 7 is cleared to zero.

Character Transfer by Polling

You must wait until the "DONE bit" (bit 7 of Status Flag at base address + 1) is high before the cursor or character registers are accessed.

Characters are written to the screen at the cursor position by setting the Address Pointer to 0D (hex), then writing the data to the Data Write register. The cursor position may be altered by setting the Address Pointer to 09 (hex), waiting for DONE bit high, write lower 8 bits of the cursor address to Data Write register, write 0A to the Address Pointer, wait for DONE bit high, then logical-OR the upper 3 bits of cursor address and write to Data Write.

Note that the physical cursor address written to the SVC is relative to the physical start of video memory. If the scroll offset register is set to zero the cursor wit l be in the correct position with respect to the text. However, this may Lead to confusion if the scroll offset register is not zero.

Imagine that the text on the screen has been scrolled ten times by adjusting the scroll offset register. The CRT controller will then collect the first character to be displayed (top, left, on the screen) from row ten in video memory. The last character to be displayed (bottom, right, on the screen) from the end of row 9. If the cursor is to be positioned at the start (top, left) of the video monitor display, it actually needs to be placed at row ten column zero instead of row zero column zero.

A logical cursor is therefore required. The logical cursor is used to define a desired cursor position on the displayed image i.e. if the logical cursor address is zero the cursor must appear in the top left-hand corner of the screen irrespective of the scroll offset.

The following code generates an absolute (physical) address from a logical address and the scroll offset:

Note % identifies a 16-bit integer variable.

9320 IF svc_lcur% < 1920 THEN GOTO 9350			; is cursor off screen ?
9330 svc_lcur% = svc_lcur% - 80				; yes - subtract a line and
9340 svc_itos : GOTO 9320				; scroll, then try again.
9350 tcur%=svc_lcur%+svc_tosa%				; logical address+scroll offset
9360 IF tcur% > 1919 THEN tcur%=tcur%-1920		; wrap around end of screen
							; tcur% is written to the
							; SVC's cursor registers.

Character Transfer by Interrupts

Bit 0 of the Interrupt Status FLAG indicates an interrupt is requested if set, all other bits are indeterminate. Any value written to the Start Interrupt register will invoke an interrupt on the next falling edge of HSYNC. Transferring characters by the SVC's interrupt generating mechanism is a simple but effective way to output characters in a real-time system. A software maintained circular output buffer is neccessary. When a character is written to the SVC, a write must also occur to the start interrupt register. An interrupt will occur when the SVC is ready to accept the next character. Characters are output in this manner until the circular buffer is empty. At this point the usual write to the start interrupt register is not made, therefore no further interrupts will occur. The process is restarted when characters are written into an empty circular buffer, in which case you must write to the start interrupt register.

Using Character Attributes

An attribute is a particular property (e.g. reverse, underlined, half-intensity) that a character can have. There are two ways the SVC can control attributes. In the "tag bit" mode, the attribute register is used to apply a single set of attributes according to the state of character bit 7. In the "embedded attribute" mode, certain screen data (all displayed as spaces) can be used to change the screen attributes within a screen. The "tag bit" mode has the advantage that all the "tagged" characters can have their attribute changed simultaneously by a changing the ATTDAT register. The "embedded attribute" mode has the advantage that more than on set of attributes can be displayed at one time.

The intensity of monitors are not always very linear, so the variable resistor VR1 is provide to adjust the half-intensity level produced by half-intensity attributes.