The SG84 is based around the Hitachi HD63484 Advanced Cathode Ray Tube Controller (ACRTC). This is really two processors in one chip. The ACRTC contains both a sophisticated display controller, and a complex graphics processor. It handles the Interface between the host processor and the rest of the graphics system. It also performs the drawing algorithms, DMA requests, FIFO queuing, zooming, etc. The SG84 is capable of two frame-date access modes.
1. Single access mode
Each access is either a display or drawing access. You can program the relative priority of these two processes. Drawing-priority mode allows drawing to access the frame data at any time, but this may create 'snow on the screen. Display-priority mode will produce a flicker-free display, but at the expense of drawing speed. This mode is used for 8-bit pixels.
2. Interleaved (dual access mode 0)
Display and drawing cycles alternate, the shift registers grabbing twice the data needed for a single cycle period and displaying (shifting) it over the two cycles. This mode is used for 4-bit pixels.
IC2 is an eight-bit comparator which decodes the I/O address. IC9 is the STEbus interface PAL. It generates correctly timed chip selects and control signals for the ACRTC and the colour palette, as well as the test connector. IC1 is the data buffer.
IC11 is driven by the master clock signal (at twice the dot clock frequency) from either the on-board oscillator or an external source. This is divided down to provide the true dot clock (DCLK) and the two-clock (2CLK) needed by the ACRTC and the shift registers respectively.
The two PAL devices IC5 and IC6 latch and multiplex the ACRTC address lines into the DRAMs. These are strobed in by !RAS and !CAS, the timing signals generated by IC7. IC16 and IC19 separate the high and low 16-bits of the 32-bit word read from the DRAMs. This is needed because the ACRTC can only access a 16-bit word at a time.
The ACRTC display attributes are latched in IC8 during the HSYNC period. The attributes determine the cursor type, display flashing, horizontal zoom factor, bus per pixel and a user option output bit (OPT). IC18 controls the horizontal zooming by counting up to 15 from the horizontal zoom factor.