PAL16L8
32016 (16 BIT INTERFACE) FOR IBM PC
(C) 1986,87 GEORGE SCOLARO
CONTROL PAL FOR 74LS646 32016-PC PARALLEL LINK		16:40 870103
/PPORT /TSO /DDIN /ISELP /DBE /IOR /IOW FULL0 FULL1 GND
NC /G646A /G646B /CBA0 /CBA1 /CWAITA /C0 /C1 /CAB VCC

IF (VCC) C0	= PPORT * TSO * /DDIN * /FULL0 * /FULL1
		+ PPORT * TSO * DDIN * FULL0 * FULL1
		+ ISELP * IOR * FULL0
		+ ISELP * IOW * /FULL0

IF (VCC) C1	= PPORT * TSO * /DDIN * /FULL0 * /FULL1
		+ PPORT * TSO * DDIN * FULL0 * FULL1
		+ ISELP * IOR * /FULL0 * FULL1
		+ ISELP * IOW * FULL0 * /FULL1

IF (VCC) G646A	= PPORT * TSO * DDIN * DBE	;32000 READ OF LATCH
		+ ISELP * IOR * FULL0

IF (VCC) G646B	= PPORT * TSO * DDIN * DBE	;32000 READ OF LATCH
		+ ISELP * IOR * /FULL0 * FULL1

IF (VCC) CBA0	= ISELP * IOW * /FULL0

IF (VCC) CBA1	= ISELP * IOW * FULL0 * /FULL1

IF (VCC) CWAITA	=  FULL0 * PPORT * /DDIN
		 +  FULL1 * PPORT * /DDIN	;generate this signal
		 + /FULL0 * PPORT * DDIN
		 + /FULL1 * PPORT * DDIN	;asap

IF (VCC) CAB	= PPORT * TSO * /DDIN

FUNCTION TABLE
/PPORT /DBE /TSO /DDIN /ISELP /IOR /IOW FULL0 FULL1 /G646A /G646B /CBA0
/CBA1 /CWAITA /C0 /C1 /CAB
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H X XX H XX XX HH XX X XX X  ; NO CLOCK IF NO 32000 OR PC SELECT
L H LH H XX LL XX XX X LL X  ; CLOCK BOTH FLOPS IF 32000 WRITE
L H LL H XX HH XX XX X LL X  ; DITTO IF 32000 READ
H X XX L LH HX XX XX X LH X  ; CLOCK 1ST FLOP IF PC READ & 1ST LATCH FULL
H X XX L LH LH XX XX X HL X  ; DO 2ND FLOP IF PC READ, 1ST EMPTY & 2ND FULL
H X XX L HL LX XX XX X LH X  ; CLOCK 1ST FLOP IF PC WRITE & 1ST LATCH EMPTY
H X XX L HL HL XX XX X HL X  ; DO 2ND FLOP IF PC WRITE, 1ST FULL & 2ND EMPTY
L L LL H XX XX LL XX X XX X  ; GATE BOTH LATCHES ON IF 32000 READ
H L XX L LH HX LH XX X XX X  ; GATE 1ST LATCH IF PC READ & LATCH 1 FULL
H X XX L LH LH HL XX X XX X  ; DITTO FOR 2ND LATCH IF LATCH 1 EMPTY & 2 FULL
X X XX L HL LX XX LH X XX X  ; CLOCK DATA B -> A ON A PC WRITE 1ST BYTE
X X XX L HL HL XX HL X XX X  ; CLOCK DATA B -> A ON A PC WRITE 2ND BYTE
L X XL X XX LX XX XX L XX X  ; CWAIT ON A READ IF NOT FULL0
L X XH X XX HX XX XX L XX X  ; CWAIT ON A WRITE AND FULL0
L X XL X XX XL XX XX L XX X  ; CWAIT ON A READ IF NOT FULL1
L X XH X XX XH XX XX L XX X  ; CWAIT ON A WRITE AND FULL1
L X LH X XX XX XX XX X XX L  ; CLOCK DATA A -> B ON A 32000 WRITE
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DESCRIPTION
This pal generates the control clock signals for the 74LS646 transceivers.
Depending on the status of the two flip flops the pal generates the
clock signal for the appropriate 74LS646.
The pal also generates CWAIT (for the 32032) if either of the 74LS646's are
empty on a read or full on a write.
The signals /TSO and /DDIN are used to synthetically generate /RD and /WR
because we get better timing margin.
	RD  = TSO *  DDIN
	WR  = TSO * /DDIN