J058 SCRAM
Note: + = the standard link connection, as supplied.
* = the signal is active low.
The board is described as if you were viewing it from the component side with the 64-way bus connector to the right.
Figure 1. Links, Options and RAM positions.
PL1
+ LK1A 00000 7FFFF ( 0K-512K ) LK1B 80000 FFFFF (512K-1024K)
Figure 2. Link areas 1 and 2 o o o o o o o o o o 2H 2G 2F 2E 2D 2C 2B 2A 1B 1A o o o o o o o o o o
address if LK1A made address if LK1B made + LK2A 0XXXX 0K to 64K 8XXXX 512K to 576K LK2B 2XXXX 256K to 320K AXXXX 768K to 832K LK2C 4XXXX 128K to 192K CXXXX 640K to 704K LK2D 6XXXX 384K to 448K EXXXX 896K to 960K LK2E 1XXXX 64K to 128K 9XXXX 576K to 640K LK2F 3XXXX 320K to 384K BXXXX 832K to 896K LK2G 5XXXX 192K to 256K DXXXX 704K to 768K LK2H 7XXXX 448K to 512K FXXXX 960K to 1024K
LK3 Attention request line driven by RTC
Figure 3 Link area 3 LK3D RTC pulls ATNRQ0* Low to interrupt o D o LK3C RTC pulls ATNRQ1* low to interrupt o C o LK3B RTC pulls ATNRQ2* low to interrupt o B o + LK3A RTC pulls ATNRQ3* Low to interrupt o A o
LK4 This governs how memory is decoded. It should be jumpered according to the following table.
Figure 4 Link Area 4
o E o o D o o C o o B o o A o
Table 1. Address range within 64K boundary
Size Address range LK4A LK4B LK4C LK4D LK4E 2K 0K to 12K j j j 2K 16K to 28K j j j + 2K 32K to 44K j j j 2K 48K to 60K j j j 8K 0K to 48K j j
'j' indicates that a particular jumper is inserted. The address range is relative to the memory base address.
LK5
Figure 5. Link area 5 + LK5F Make only if IC20 present o F o + LK5E Make only if IC21 present o E o + LK5D Nake only if IC22 present o D o + LK5C Make only if IC23 present o C o + LK5B Make only if IC24 present o B o + LK5A Make only if IC25 present o A o
LK6
LK6 determines whether the onboard battery is connected to VSTBY on the bus. If it is connected then the SCRAM battery can power other low-current devices when the system power is off. Care should be taken that no other sources of power are connected to VSTBY if LK6 is made, since high voltages or currents can destroy the SCRAM board.
Figure 6. Link area 6 o o
LK7 Figure 7. Link area 7 LK7A Make for 8K RAM only o C o + LK7B Make for 2K RAM only o B o LK7C Make for 8K RAM or 8K EPROM o A o
Each memory socket has a jumper to select its power source, so that the board can carry EPROMs and CMOS RAM at the same time, without exhausting the battery on power-down.
Jumpering an A link selects power from the 5V rail. Jumpering a B link selects the battery backed power supply.
Figure 9. Link areas 8 to 13 LK8 refers to IC20 LK9 IC21 o LK10 IC22 B LK11 IC23 o LK12 IC24 A LK13 IC25 o
CONNECT link B and DISCONNECT link A if the local device has a low power-down current. CONNECT link A and DISCONNECT link B if the local device is an EPROM, or if it will not be used to store data that is required to be retained on power-down.
There are 16 registers in the RTC, 14 concerned with timekeeping and two usable as RAM. In addition, up to 48 more registers of RAM exist in the RTC. Of these, 48, 16 or none may also be accessed. This means that the RTC may occupy 16, 32 or 64 locations in I/O space. This block of locations may be located anywhere in I/O space, providing that the base address is at a 16, 32 or 64 byte boundary, depending on the block size. Jumpers in link area 14 set both the base address and the size of the block.
LK14
+ LK14H2 select if A4 low LK14H1 ignore A4 Figure 8. + LK14G2 select iF A5 low Link area 14 LK14G1 ignore A5 + LK14F select if A6 low o H2 o H1 o LK14E select if A7 low o G2 o G1 o LK14D2 select if A8 low o F o + LK14D1 ignore A8 o E o LK14C2 Select if A9 low o D2 o D1 o + LK14C1 ignore A9 o C2 o C1 o LK14B2 select if A10 low o B2 o B1 o + LK14B1 ignore A10 o A2 o A1 o LK14A2 select if A11 low + LK14A1 ignore A11
With the jumpers as shown here, the base address is X80
(hexadecimal), and the clock registers occupy a total of 16
address locations. The X indicates
that the top nibble is ignored. Note that some operating systems
do not access the SCRAM at the standard address as above. You
MUST check with the appropriate software manual.
If any of the jumpers LK14 A2, B2, C2, D2, E, F, G2, H2 is inserted, the corresponding comparison address bits (A11 to A4) must be low for the board to be selected, as shown above. For example, the base address of the board is 000 if all these jumpers are inserted, and the clock registers occupy a total of 16 address locations.
If any of the above jumpers is removed, the corresponding address bit must be high for the board to be selected. For example, with no LK14 jumpers, the base address is FF0 (hexadecimal), and the clock registers occupy a total of 16 address locations.
If jumpers A1, B1, C1, D1 are inserted, the top 4 bits of the 12-bit STEbus are not used in the comparison, so with these jumpers and jumpers E, F, G2 and H2 in, the base address is XF0 and the clock registers occupy a total of 16 address locations.
With the jumpers as shown above, the base address is X80 (hexadecimal) and the clock registers occupy a total of 16 address locations.
Jumpers G and H select whether the clock registers occupy 16, 32 or 64 address locations, and where the locations are. This is done by comparing address bits A5 and A4 with logic high or low, or by ignoring them. For example, if jumpers G1 and H1 are made, A5 and A4 are ignored, so the clock registers occupy 64 address locations. The following table shows how to set these jumpers.
Table 2. Link Area 14 Jumpers G and H
Address locations starting address
G1 G2 H1 H2 64 base + 0 J J 32 base + 32 J 32 base + 0 J J 16 base + 48 16 base + 32 J 16 base + 16 J + 16 base + 0 J J
NOTE: Where the base address is defined by address bits A11-A6.
The '1' position of each jumper causes the comparator to compare an address line with itself, thus causing it to effectively ignore that 'bit' of the address. Leaving the '2' position unjumpered causes that input to be pulled high, so the comparator can only respond when that address line is high. Jumpering the '2' position pulls that input low, so the comparator only responds when that address line is also low.
The LKA input is compared to A12, the LKB input to A11, and so on down to the LKH input, which is compared to A4. A3, A2, A1 and A0 are irrelevant, since at least 16 bytes (the clock registers) will always be wanted.