# Darśana — Raspberry Pi Pico 2 Pin Mapping  
*Revision: 2025-11-10*

This document defines all GPIO assignments used in the Darśana mainboard,  
implemented around the **Raspberry Pi Pico 2 (RP2350)** microcontroller.  

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## 🧩 1. Header Pin Map (by Physical Pin Number)

| Pin# | GPIO / Function | Signal | Connected Device / Purpose | Direction / Notes |
|------|-----------------|---------|-----------------------------|-------------------|
| 1 | **GP0** | **CS_FRAM** | FRAM (FM25Vxx) chip select | Output |
| 2 | **GP1** | **ADC_SEL_EN_N** |  | Output |
| 3 | **GND** | **DGND** | Digital ground | — |
| 4 | **SPI0 SCK** | — | ADC / FRAM / IOX shared control bus | Clock |
| 5 | **SPI0 TX (MOSI)** | — | ADC / FRAM / IOX bus | Master Out |
| 6 | **SPI0 RX (MISO)** | — | ADC / FRAM / IOX bus | Master In |
| 7 | **GP5** | **ADC_SEL0** | | Output |
| 8 | **GND** | **DGND** | Digital ground | — |
| 9 | **GP6** | **ADC_SEL1** |  | Output |
| 10 | **GP7** | **CS_IOX1** | MCP23S17 #1 chip select | Output |
| 11 | **GP8** | **CS_IOX2** | MCP23S17 #2 chip select | Output |
| 12 | **GP9** | **LED_OE0** | LED segment buffer enable (OE)| Output |
| 13 | **GND** | **DGND** | Digital ground | — |
| 14 | **GP10** | **LED_OE1** | LED segment buffer enable (OE) | Output |
| 15 | **GP11** | **LED_OE2** | LED segment buffer enable (OE) | Output |
| 16 | **GP12** | **CS_OLED** | OLED chip select | Output |
| 17 | **GP13** | **DC_OLED** | OLED data/command select | Output |
| 18 | **GND** | **DGND** | Digital ground | — |
| 19 | **SPI1 SCK** | — | LED / OLED control bus | Clock |
| 20 | **SPI1 TX (MOSI)** | — | LED / OLED control bus | Master Out |

| 21 | **UART0 TX** | **MIDI_OUT** | DIN-5 MIDI OUT | Output |
| 22 | **UART0 RX** | **MIDI_IN** | DIN-5 MIDI IN (opto-isolated) | Input |
| 23 | **GND** | **DGND** | Digital ground | — |
| 24 | **PIO** | **I2S_LRCLK** | PCM5122 left/right clock | Output (PIO) |
| 25 | **PIO** | **I2S_BCLK** | PCM5122 bit clock | Output (PIO) |
| 26 | **PIO** | **I2S_DIN** | PCM5122 data | Output (PIO) |
| 27 | **GP21** | Reserved for future I²S ADC DOUT (audio input expansion) |
| 28 | **GND** | **DGND** | Digital ground | — |
| 29 | **GP22** | Reserved for future use | - |
| 30 | **RUN** | Not connected | — |
| 31 | **I2C1 SDA** | — | DAC / Headphone AMP control (PCM5122 / TPA6130A2) | Pull-up |
| 32 | **I2C1 SCL** | — | DAC / Headphone AMP control (PCM5122 / TPA6130A2) | Pull-up |
| 33 | **GND** | **DGND** | Digital ground | — |
| 34 | **GP28** | Reserved for future use | - |
| 35 | **ADC_VREF** | — | Not connected | — |
| 36 | **3V3(OUT)** | **+3V3_SYS** | 3.3 V logic rail | Power |
| 37 | **3V3_EN** | — | Not connected | — |
| 38 | **GND** | **DGND** | Digital ground | — |
| 39 | **VSYS** | Not connected | - |
| 40 | **VBUS** | **+5V_SYS** | 5 V bus from USB-C | Power |

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## 🧠 2. Bus Summary

### SPI0 — *ADC / FRAM / IO Expander Control Bus*
- **SCK:** Pin 4  
- **TX (MOSI):** Pin 5  
- **RX (MISO):** Pin 6  
- **Chip Select Lines:**  
  - CS_FRAM — GP0 / Pin 1
  - **ADC_Select Lines:**  
    - ADC_SEL_EN_N — GP1 / Pin 2  
    - ADC_SEL0 — GP5 / Pin 7  
    - ADC_SEL1 — GP6 / Pin 9  

### SPI1 — *LED / OLED Control Bus*
- **SCK:** Pin 19  
- **TX (MOSI):** Pin 20  
- **OLED Controls:**  
  - CS_OLED — GP12 / Pin 16  
  - DC_OLED — GP13 / Pin 17  
- **LED Select Lines:**  
  - LED_OE0 — GP9 / Pin 12  
  - LED_OE1 — GP10 / Pin 14  
  - LED_OE2 — GP11 / Pin 15  

### I²S (via PIO) — *PCM5122 DAC*
- **LRCLK:** Pin 24  
- **BCLK:** Pin 25  
- **DIN:** Pin 26  
- (Reserved): Pin 27  

### I²C1 — *Control Bus*
- **SDA:** Pin 31  
- **SCL:** Pin 32  
- Used for control of **PCM5122** DAC and **TPA6130A2** headphone amplifier.  

### MIDI (DIN-5)
- **MIDI_OUT (UART0 TX):** Pin 21  
- **MIDI_IN (UART0 RX):** Pin 22  

### Reserved GPIOs
- **GP21 (Pin 27):** Reserved for future I2S ADC DOUT
- **GP22 (Pin 29):** Reserved for future use
- **GP28 (Pin 34):** Reserved for future use

These pins are left unconnected on the PCB for potential future analog or digital input expansion.

### Power & Grounds
- **3V3(OUT):** Pin 36  
- **VBUS:** Pin 40  
- **GND:** Pins 3, 8, 13, 18, 23, 28, 33, 38  

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© 2025 Hiroyuki Oyama — *Darśana Concept Project*
