// sync_rom_512.v
// (c) 2017 David R. Hunter
// 08/20/17   D. Hunter
//
// synchronous single port 512 byte RAM acting as a ROM
// using the Altera TriMatrix memory
//
//`define SIM

module sync_rom_512(data,addr,clk,q);
	 input	[7:0] data;
	 input	[8:0] addr;
	 input	clk;
	 output reg	[7:0] q;

	 // initialize RAM with the VIP OS program

	// use this for simulation
//`ifdef SIM
//   reg     [7:0] memdata[0:511];
//
//	initial
//	begin
//		$readmemh("vip.mem",memdata);
//	end
//`else	
	(* ram_init_file = "vip.mif" *) reg [7:0] memdata[0:511];
//`endif
	

	 always @(posedge clk)
		begin	
			q <= memdata[addr];
		end


endmodule
