/* Author : Gaurav Sharma h2016075@pilani.bits-pilani.ac.in Himanshu Shekhar h2016071@pilani.bits-pilani.ac.in. */ #ifndef EXT_INT_H #define EXT_INT_H #include #include #define EXTINT_EINT2_MASK 0x4 #define EXTMODE_EXTMODE2_MASK 0x0 #define EXTPOLAR_EXTPOLAR2_MASK 0x4 // Vector Control Register bit definitions #define VIC_ENABLE (1 << 5) // Convert Channel Number to Bit Value #define VIC_BIT(chan) (1 << (chan)) #define VIC_EINT2 16 volatile uint8_t boolean_value=0; void Ext_ISR(void) __irq; void init_ext_interrupt() { boolean_value = 0; EXTMODE = EXTMODE_EXTMODE2_MASK; EXTPOLAR &= ~EXTPOLAR_EXTPOLAR2_MASK; PINSEL0 = (PINSEL0 & ~(3 << 30)) | (1 << 31); /* initialize the interrupt vector */ VICIntSelect &= ~ VIC_BIT(VIC_EINT2); // EINT0 selected as IRQ VICVectAddr5 = (unsigned int)Ext_ISR; // address of the ISR VICVectCntl5 = VIC_ENABLE | VIC_EINT2; VICIntEnable = VIC_BIT(VIC_EINT2); // EINT0 interrupt enabled EXTINT &= ~EXTINT_EINT2_MASK; } void enable_signal() { boolean_value = 1; } void disable_signal() { boolean_value = 0; } uint8_t get_signal() { return boolean_value; } void Ext_ISR(void) __irq { enable_signal(); EXTINT |= EXTINT_EINT2_MASK; //clear interrupt VICVectAddr = 0; } #endif