; JED2EQN -- JEDEC file to Boolean Equations disassembler (Version V063)
; Copyright (c) National Semiconductor Corporation 1990-1993
; Disassembled from J070-U11.jed. Date: 2022-05-28

;
; Initial analysis: not tested yet!
;

chip J070-U11 PAL16L8

; Address decoder

A15	=	1	
A14	=	2	
A13	=	3	
A12	=	4	
A11	=	5	
A10	=	6	
EPR	=	7	; EPROM disable
STS	=	8	;
/VMA	=	9	
GND	=	10	
/ENDR	=	11	; sense
/ROM	=	12	; select ROM
/RAM	=	13	; select RAM
/UTIL1	=	14	; PTM_and_UART
/UTIL2	=	15	; control_latch
CM1	=	16	; goes high for STEbus i/o access
/STE	=	17	; STEbus active
/HB	=	18	; High block of memory (28K from address 0x8000)
/LB	=	19	; Low  block of memory (32K from address 0x0000)
VCC	=	20	

;
; intermediate equations
;

STEbus_io_1k	=	A15	*  A14	*  A13	* /A12	* /A11	* /A10	; E000-E3FF
control_latch	=	A15	*  A14	*  A13	* /A12	* /A11	*  A10	; E400
PTM_and_UART	=	A15	*  A14	*  A13	* /A12	*  A11	* /A10	; E800-E807, EA00-EA01
RAM_1k		=	A15	*  A14	*  A13	* /A12	*  A11	*  A10	; EC00-EFFF
ROM_4k		=	A15	*  A14	*  A13	*  A12
;
equations

LB	=	VMA	* /A15			*		STS	; 0000-07FF = IC22: 32K

HB	=	VMA	*  A15	* /A14		*		/EPR	; IC20 is 32K in size but
	+	VMA	*  A15	*  A14	* /A13	*		/EPR	; only 28K accessible

;
; STEbus replaces first 32K if STS low, and
; next 16+8=28K if EPR is high. 
;
STE	=	VMA	* /A15			*		/STS
	+	VMA	*  A15	* /A14		*		EPR
	+	VMA	*  A15	*  A14	* /A13	*		EPR
	+	VMA	*  STEbus_io_1k

/CM1	=	VMA	*  STEbus_io_1k

UTIL2	=	VMA	*  control_latch

UTIL1	=	VMA	*  PTM_and_UART

RAM	=	VMA	*  RAM_1k

ROM	=	VMA	*  ROM_4k

CM1.oe	=	ENDR	


/LB.oe		=	vcc
/HB.oe		=	vcc
/STE.oe		=	vcc
/UTIL2.oe	=	vcc
/UTIL1.oe	=	vcc
/RAM.oe	=	vcc
/ROM.oe	=	vcc