; JED2EQN -- JEDEC file to Boolean Equations disassembler (Version V063) ; Copyright (c) National Semiconductor Corporation 1990-1993 ; Disassembled from J191-V1-I3-U13-Lattice-PAL16V8D-25-CS5DC1.JED. Date: 2022-03-12 ;$GALMODE REGISTERED ; Board: J191 version 1 issue 3 ; ; Location: U13 ; ; Function: ; ; Status: disassembled from JEDEC data from PAL, partially analysed, not tested yet. ; ; There will probably be a like for being default master ; and for release-when-done/release-on-request ; chip J191-U13 GAL16V8 CLK = 1 ; LK17 = 2 ; arbiter_disabled = 3 ; LK16 CHECK SENSE OF DISABLED/ENABLED i5 = 5 ; i6 = 6 ; /BUSREQ0 = 7 ; LK12A /BUSREQ1 = 8 ; LK12B /BUSACK_in = 9 ; LK11 center pin GND = 10 ; /OE = 11 ; grounded on PCB /f12 = 12 ; /unused_pin_13 = 13 ; /BUSACK1 = 14 ; LK11A /BUSACK0 = 15 ; LK11B /rf16 = 16 ; /rf_BUSREQ1 = 17 ; /rf_BUSREQ0 = 18 ; /bus_granted = 19 ; VCC = 20 ; @ues ffffffffffffffff @ptd unused equations bus_granted = /arbiter_disabled * /rf16 * rf_BUSREQ0 * rf_BUSREQ1 * /BUSACK0 * /BUSACK1 + /arbiter_disabled * /rf16 * bus_granted ; latch if rf16 false + arbiter_disabled * /i5 * BUSACK_in * /f12 + /LK17 * /i5 ; ; Clock the bus request lines (to reduce metastability issues?) ; rf_BUSREQ0 := arbiter_disabled + /BUSREQ0 rf_BUSREQ1 := arbiter_disabled + /BUSREQ1 rf16 := arbiter_disabled + i5 * i6 + i5 * rf16 ; latch while i5 ; ; grant on BUSACK0 if BUSACK0 true and rf_BUSREQ1 false ; BUSACK0 := /rf_BUSREQ1 * /BUSACK1 * /bus_granted ; grant to master 0 if not granted to master 1 + /rf_BUSREQ1 * BUSACK0 ; latch while rf_BUSREQ1 false BUSACK1 := /rf_BUSREQ0 * /BUSACK0 * /bus_granted * rf_BUSREQ1 ; grant to master 1 if not granted to master 0 and rf_BUSREQ1 is true + /rf_BUSREQ0 * BUSACK1 ; latch while rf_BUSREQ0 false f12 = i5 + f12 * /arbiter_disabled ; latch while arbiter enabled + f12 * BUSACK_in ; latch while BUSACK_in + f12 * /LK17 ; latch while not LK17 unused_pin_13 := gnd ; unused? /rf_BUSREQ1.oe = OE /rf16.oe = OE /BUSACK0.oe = OE /BUSACK1.oe = OE /unused_pin_13.oe = OE /f12.oe = vcc