; JED2EQN -- JEDEC file to Boolean Equations disassembler (Version V063) ; Copyright (c) National Semiconductor Corporation 1990-1993 ; Disassembled from J191-V1-I3-U23-AMD-PALCE22V10H-25PC-CSAB47.JED. Date: 2022-03-12 ; ; Board: J191 version 1 issue 3 ; ; Location: U23 ; ; Function: large-scale address decoder (down to 512K blocks) ; ; Status: disassembled from JEDEC data from PAL, but not tested yet. ; chip J191-U23 PAL22V10 CLK = 1 ; no CPU pin A23 = 2 ; CPU pin 52 A22 = 3 ; CPU pin 51 A21 = 4 ; CPU pin 50 A20 = 5 ; CPU pin 48 A19 = 6 ; CPU pin 47 /AS = 7 ; CPU pin 6. Address Strobe RnW = 8 ; CPU pin 9. Read not Write /UDS = 9 ; CPU pin 7. Upper Data Strobe /LDS = 10 ; CPU pin 8. Lower Data Strobe ; ; not CPU pins: ; /FC210_INTACK = 11 ; also pin 6 of U24 GND = 12 ; EPO = 13 ; UART pin controls lower echo of EPROM. q0 = 14 ; q1 = 15 ; q2 = 16 ; q3 = 17 ; /DATACK = 18 ; CPU pin 10 /RTC_CS = 19 ; pin 5 of DS1221, probably /RTC_CS /UART_CS = 20 ; /STEbus = 21 ; pin 7 of U11 = (STEbus controller?) /ROM_EN = 22 ; /ROM_OE = 23 ; VCC=24 ; intermediate equations: ; ; ROM space is 512K ; can appear at bottom 512K if EPO is low, during cold boot. ; Otherwise at 1024K up if EP0 is high. ; ; AAAA A ; 2222 1 ; 3210 9 ; lowest_512K = /A23 * /A22 * /A21 * /A20 * /A19 third_512K = /A23 * /A22 * /A21 * A20 * /A19 STEbus_space = /A23 * /A22 * A21 ; ; The STEbus space is 2 megabytes. ; A20 is buffered to CM1, selecting memory or I/O space. ; penultimate_512K = A23 * A22 * A21 * A20 * /A19 ultimate_512K = A23 * A22 * A21 * A20 * A19 ; ; ; equations global.re = /UDS * /LDS ; reset if no data strobes asserted. ; ; ; The ROM_OE is tied to ground. ; Looks like the designer resered a pin for this, ; then decided to use just the ROM_CE. ; ; ROM_OE = gnd ; never true. /ROM_OE.oe = gnd ; output disabled. ROM_EN = /FC210_INTACK * AS * third_512K * RnW * EPO + /FC210_INTACK * AS * lowest_512K * RnW * /EPO STEbus = /FC210_INTACK * AS * STEbus_space UART_CS = /FC210_INTACK * AS * penultimate_512K RTC_CS = /FC210_INTACK * AS * ultimate_512K ; ; DATACK is delayed for slow devices like the RTC and ROM. ; ; DATACK = /FC210_INTACK * RTC_CS * q3 * /q2 * /q1 * /q0 ; count = 1000 + /FC210_INTACK * ROM_EN * ROM_OE * /q3 * /q2 * q1 * /q0 ; count = 0010. Never happens because ROM_OE is never true. + /FC210_INTACK * ROM_EN * /ROM_OE * /q3 * q2 * /q1 * /q0 ; count = 0100 + /FC210_INTACK * AS * lowest_512K * EPO + /FC210_INTACK * DATACK * UDS + /FC210_INTACK * DATACK * LDS /DATACK.oe = /FC210_INTACK * AS * /STEbus * /UART_CS ; open collector. q3 := q2 * q1 * q0 ; goes high if count is 0111 + q3 * /q2 ; or 10xx + q3 * /q1 ; or 1x1x + q3 * /q0 ; or 1xx1 q2 := /q2 * q1 * q0 ; goes high if count is x011 + q2 * /q1 ; or x10x + q2 * /q0 ; or x1x0 + q3 * q2 * q1 * q0 ; sticks at count 1111 q1 := /q1 * q0 ; toggles + q1 * /q0 + q3 * q2 * q1 * q0 ; sticks at count 1111 q0 := /q0 ; toggles usually + q3 * q2 * q1 * q0 ; sticks at count 1111 /STEbus.oe = vcc /ROM_EN.oe = vcc /UART_CS.oe = vcc /RTC_CS.oe = vcc q3.oe = vcc q2.oe = vcc q1.oe = vcc q0.oe = vcc