PARTNO    nop;
                NAME      nop;
                DATE      1998-11-12;
                REV       01 ;
                DESIGNER  isb ;
device g22v10;
pin 1 = !rd;    /* from CPU */
pin 2 = !nop;   /* from DECODE.PLD */
pin 3 = id0;    /* from keyboard or KEYFIX pld */
pin 4 = id1;    /* from keyboard or KEYFIX pld */
pin 5 = id2;    /* from keyboard or KEYFIX pld */
pin 6 = id3;    /* from keyboard or KEYFIX pld */
pin 7 = id4;    /* from keyboard or KEYFIX pld */
pin 8 = id5;    /* not connected */
pin 9 = id6;    /* from SW6 */
pin 10 = id7;   /* from cassette input circuit */
pin 11 = !iorq; /* from CPU */
pin 23 = !kbd;         /* to KEYFIX pld */
pin 22 = outputenable; /* not connected */
pin 21 = d4;	       /* to CPU */
pin 20 = d3;	       /* to CPU */
pin 19 = d5;	       /* to CPU */
pin 18 = d6;	       /* to CPU */
pin 17 = d2;	       /* to CPU */
pin 16 = d7;	       /* to CPU */
pin 15 = d0;	       /* to CPU */
pin 14 = d1;	       /* to CPU */
pin 13 = a0;	       /* from CPU */
// The keyboard is read at the standard ZX81 address, 
// i.e. when doing an I/O read with A0 low.
kbd = iorq & rd & !a0;
// The data bus is driven if the keyboard is being read
// or the NOP signal is asserted (during video)
outputenable = kbd # nop;
d0.oe=outputenable;
d1.oe=outputenable;
d2.oe=outputenable;
d3.oe=outputenable;
d4.oe=outputenable;
d5.oe=outputenable;
d6.oe=outputenable;
d7.oe=outputenable;
// This is a good way to conserve pins.
// If not a nop cycle, the data is simply the input pins,
// If it is a nop cycle, the data is zero.
d0 = !nop & id0;
d1 = !nop & id1;
d2 = !nop & id2;
d3 = !nop & id3;
d4 = !nop & id4;
d5 = !nop & id5;
d6 = !nop & id6;
d7 = !nop & id7;