; JED2EQN -- JEDEC file to Boolean Equations disassembler (Version V063)
; Copyright (c) National Semiconductor Corporation 1990-1993
; Disassembled from SPEC_Y.JED. Date: Date: 2025-09-17

; Step-by-step implementation
;
; 2025-10-27 First draft, untested.
; Single 22V10 should be enough to get things going.
; Will need a ROM, RAM and 8-bit latch (LS374, LS574) as well.
;

chip G007 GAL22V10

; inputs

CLK	= 1	; 
/MREQ	= 2
/RFSH	= 3
A15	= 4
A14	= 5
A13	= 6
A12	= 7
A11	= 8
A10	= 9
A9	= 10
A8	= 11
; GND	= 12		; don't do this, the compiler thinks you are defining a pin
/M1	= 13
;
; Pins above can only be inputs.
;
; VCC		= 24	; don't do this, the compiler thinks you are defining a pin
MEM_RFSH	= 23	; connect to pin 1 to clock A8 
graphics	= 22
/VID_OE		= 21
VID_LATCH	= 20
G007_NOP	= 19
/ZX81_RAM_CS	= 18
/ZX81_ROM_CS	= 17	
/G007_ROM_CS	= 16
patches		= 15
/G007_RAM_CS	= 14	; For RAM on the G007 board, replacing external RAM packs.


; Note: Run out of pins on a single 22V10.
; So I have no pins to control the D7/D6 buffers (LS126, LS125) on the G007 board.
; This is not a problem if 
; 1. The RAM 'pack' is on the G007 board itself
; 2. There are no boards after the G007 board.
; If happy to have no boards after this one,
; then one can omit the D6/D7 buffers.
;
;
;
;
;
; Intermediate expressions:
;
@define		G007_enabled	" GND "		; Pseudo-variable. Set to 1 to enable G007 features
;

@define		first_8k		" /A15 * /A14 * /A13    "		; 0K to 8K

@define		second_8k		" /A15 * /A14 *  A13    "		; 8K to 16K

@define		ROM_patch_0Cxx		" /A12 *  A11 *  A10 * /A9 * /A8 * G007_enabled "
					; see signal on U8b_pin_6, active low

@define		ROM_patches_00xx_or_02xx	" /A12 * /A11 * /A10 *       /A8  * graphics"
						; on U8A pin 5	

@define		force_nop			" M1 * A15 * graphics "
						; see U4B pin 6

@define		video_RAM_space		" A15 "	; normal Sinclair behaviour

; @define		video_RAM_space		" A15 * A14 "	; Allows 16K of executable memory space


; G007-1.EQN
; Simplest system:
; 1st 8K is normal ZX81 BASIC.
; 2nd 8K is G007 space
; 
; Simplest way to disable G007 features is to disable the ROM patches.
; Then BASIC can never turn on graphics mode.

;
; This term says it is safe for to read the bus
; when the data bus is not being driven by the graphis data latch or forcing a NOP code.
;
@define		safe_to_read	" /VID_OE * /G007_NOP "

equations

;
; Internal variables in lower case.
; They do not have to drive any external pin.
;
graphics.d	=	A8

patches		=	ROM_patches_00xx_or_02xx	 * graphics
		+	ROM_patch_0Cxx			 * G007_enabled

;
; External pins in upper case
;
ZX81_ROM_CS	=	safe_to_read * MREQ * first_8k  * /patches	

ZX81_RAM_CS	=	safe_to_read * MREQ * second_8k * /A11		; 0x2000, 0x3000
		+	safe_to_read * MREQ * first_8k  * ROM_patches_00xx_or_02xx  * graphics


G007_ROM_CS	=	safe_to_read * MREQ * second_8k *  A11		; 0x2800, 0x3800
		+	safe_to_read * MREQ * first_8k  *  ROM_patch_0Cxx 


; DONE:
;
MEM_RFSH	=	 RFSH * MREQ		; Clock for latching A8. (see U6B, U2C)

VID_LATCH	=	/RFSH * MREQ * CLK	; clocking data in outside of refresh.

;VID_OE		=	GND				; forcibly disable

VID_OE		=	 RFSH * graphics		; read latched data out during refresh.



G007_NOP	=	 M1 * video_RAM_space * graphics		; running machine code above 8000h in high-res mode.

;
; This equation enables 16K of  RAM at the normal 4000-7FFF and an alias at C000-FFFF.
;
; A standard 
;
G007_RAM_CS		=	safe_to_read * MREQ * A14

; Because of the safe_to_read term, this RAM can be on the ZX81 side of the D7/D6 buffers.
;
;


;
; Static RAM chips come in sizes 2K, 8K, 32K.
; A way to get 32K of a 32K RAM chip 
; is to force the RAM chip A14 low in the video RAM space.
; Something like this:
;
; G007_RAM_A14		=	A15 * /M1	; Normal ZX81 video 
;
; which allows A14 to be high at or above 8000 hex only if not running machine code.
; You can use this space for data, which is more useful than aliased memory.
;
;
;
;
;